About: Gate oxide is a(n) research topic. Over the lifetime, 40353 publication(s) have been published within this topic receiving 601517 citation(s).
Papers published on a yearly basis
TL;DR: The fabrication of transparent field-effect transistors using a single-crystalline thin-film transparent oxide semiconductor, InGaO3(ZnO)5, as an electron channel and amorphous hafnium oxide as a gate insulator provides a step toward the realization of transparent electronics for next-generation optoelectronics.
Abstract: We report the fabrication of transparent field-effect transistors using a single-crystalline thin-film transparent oxide semiconductor, InGaO 3 (ZnO) 5 , as an electron channel and amorphous hafnium oxide as a gate insulator. The device exhibits an on-to-off current ratio of ∼10 6 and a field-effect mobility of ∼80 square centimeters per volt per second at room temperature, with operation insensitive to visible light irradiation. The result provides a step toward the realization of transparent electronics for next-generation optoelectronics.
Abstract: The scaling of complementary metal oxide semiconductor transistors has led to the silicon dioxide layer, used as a gate dielectric, being so thin (14?nm) that its leakage current is too large It is necessary to replace the SiO2 with a physically thicker layer of oxides of higher dielectric constant (?) or 'high K' gate oxides such as hafnium oxide and hafnium silicate These oxides had not been extensively studied like SiO2, and they were found to have inferior properties compared with SiO2, such as a tendency to crystallize and a high density of electronic defects Intensive research was needed to develop these oxides as high quality electronic materials This review covers both scientific and technological issues?the choice of oxides, their deposition, their structural and metallurgical behaviour, atomic diffusion, interface structure and reactions, their electronic structure, bonding, band offsets, electronic defects, charge trapping and conduction mechanisms, mobility degradation and flat band voltage shifts The oxygen vacancy is the dominant electron trap It is turning out that the oxides must be implemented in conjunction with metal gate electrodes, the development of which is further behind Issues about work function control in metal gate electrodes are discussed
Abstract: We have demonstrated a 70-nm n-channel tunneling field-effect transistor (TFET) which has a subthreshold swing (SS) of 52.8 mV/dec at room temperature. It is the first experimental result that shows a sub-60-mV/dec SS in the silicon-based TFETs. Based on simulation results, the gate oxide and silicon-on-insulator layer thicknesses were scaled down to 2 and 70 nm, respectively. However, the ON/ OFF current ratio of the TFET was still lower than that of the MOSFET. In order to increase the on current further, the following approaches can be considered: reduction of effective gate oxide thickness, increase in the steepness of the gradient of the source to channel doping profile, and utilization of a lower bandgap channel material
•28 Feb 2005
Abstract: The present invention relates to an amorphous oxide and a thin film transistor using the amorphous oxide. In particular, the present invention provides an amorphous oxide having an electron carrier concentration less than 10 18 /cm 3 , and a thin film transistor using such an amorphous oxide. In a thin film transistor having a source electrode 6 , a drain electrode 5 , a gate electrode 4 , a gate insulating film 3 , and a channel layer 2 , an amorphous oxide having an electron carrier concentration less than 10 18 /cm 3 is used in the channel layer 2.
Abstract: Operation is demonstrated of a field‐effect transistor made of transparant oxidic thin films, showing an intrinsic memory function due to the usage of a ferroelectric insulator. The device consists of a high mobility Sb‐doped n‐type SnO2 semiconductor layer, PbZr0.2Ti0.8O3 as a ferroelectric insulator, and SrRuO3 as a gate electrode, each layer prepared by pulsed laser deposition. The hysteresis behavior of the channel conductance is studied. Using gate voltage pulses of 100 μs duration and a pulse height of ±3 V, a change of a factor of two in the remnant conductance is achieved. The dependence of the conductance on the polarity of the gate pulse proves that the memory effect is driven by the ferroelectric polarization. The influence of charge trapping is also observed and discussed.
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