scispace - formally typeset
Topic

Hardware register

About: Hardware register is a(n) research topic. Over the lifetime, 977 publication(s) have been published within this topic receiving 15071 citation(s).

...read more

Papers
  More

Journal ArticleDOI: 10.1504/IJWMC.2007.013798
Abstract: A new stream cipher, Grain, is proposed. The design targets hardware environments where gate count, power consumption and memory is very limited. It is based on two shift registers and a non-linear output function. The cipher has the additional feature that the speed can be increased at the expense of extra hardware. The key size is 80 bits and no attack faster than exhaustive key search has been identified. The hardware complexity and throughput compares favourably to other hardware oriented stream ciphers like E0 and A5/1.

...read more

Topics: Stream cipher (69%), Cipher (64%), Hardware register (58%) ...read more

526 Citations


Patent
25 Jun 2001-
Abstract: A system and method for configuring an instrument to perform measurement functions, wherein the instrument includes a programmable hardware element. A graphical program is first created, wherein the graphical program implements a measurement function. The graphical program may include a front panel and a block diagram. The method then generates a hardware description based on at least a portion of the graphical program. The hardware description describes a hardware implementation of the at least a portion of the graphical program. The method then configures the programmable hardware element in the instrument utilizing the hardware description to produce a configured hardware element. The configured hardware element thus implements a hardware implementation of the at least a portion of the graphical program. The instrument then acquires a signal from an external source, and the programmable hardware element in the instrument executes to perform the measurement function on the signal. The front panel may be used by a user to control the instrument during the measurement.

...read more

Topics: Hardware compatibility list (63%), Hardware architecture (63%), Hardware register (59%) ...read more

380 Citations


Patent
W. Olin Sibert1Institutions (1)
30 Apr 2013-
Abstract: A hardware Secure Processing Unit (SPU) is described that can perform both security functions and other information appliance functions using the same set of hardware resources. Because the additional hardware required to support security functions is a relatively small fraction of the overall device hardware, this type of SPU can be competitive with ordinary non-secure CPUs or microcontrollers that perform the same functions. A set of minimal initialization and management hardware and software is added to, e.g., a standard CPU/microcontroller. The additional hardware and/or software creates an SPU environment and performs the functions needed to virtualize the SPU's hardware resources so that they can be shared between security functions and other functions performed by the same CPU.

...read more

245 Citations


Patent
29 Nov 2000-
Abstract: Techniques and systems for analysis, diagnosis and debugging fabricated hardware designs at a Hardware Description Language (HDL) level are described. Although the hardware designs (which were designed in HDL) have been fabricated in integrated circuit products with limited input/output pins, the techniques and systems enable the hardware designs within the integrated circuit products to be comprehensively analyzed, diagnosed, and debugged at the HDL level at speed. The ability to debug hardware designs at the HDL level facilitates correction or adjustment of the HDL description of the hardware designs.

...read more

Topics: Hardware compatibility list (72%), Hardware architecture (68%), Hardware register (67%) ...read more

226 Citations


Patent
29 Oct 2001-
Abstract: A system and method for configuring a device to perform a function, where the device includes a programmable hardware element and one or more fixed hardware resources. A program is stored which represents the function. A hardware configuration program is generated based on the program, specifying a configuration for the programmable hardware element that implements the function, and usage of the fixed hardware resources by the programmable hardware element in performing the function. A deployment program deploys the hardware configuration program onto the programmable hardware element, where, after deployment, the device is operable to perform the function, where the programmable hardware element directly performs a first portion of the function, and the programmable hardware element invokes the fixed hardware resources to perform a second portion of the function. An optional measurement module couples to the device and performs signal conditioning and/or conversion logic on an acquired signal for the device.

...read more

224 Citations


Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20205
20193
20184
201717
201622
201554

Top Attributes

Show by:

Topic's top 5 most impactful authors

Brian Keith Odom

15 papers, 1K citations

Hugo A. Andrade

14 papers, 859 citations

Matthew Novacek

8 papers, 629 citations

Cary Paul Butler

6 papers, 354 citations

Michael L. Santori

5 papers, 195 citations

Network Information
Related Topics (5)
Network on a chip

6.8K papers, 130K citations

86% related
Reconfigurable computing

7.8K papers, 126K citations

86% related
System on a chip

11.3K papers, 147.3K citations

86% related
Instruction set

10.6K papers, 196.5K citations

85% related
Memory architecture

4.8K papers, 102.4K citations

85% related