Showing papers on "High-bit-rate digital subscriber line published in 1988"

ISDN remote switching unit for accommodating analog and digital lines

Abstract: An ISDN remote switching unit for accommodating analogue telephone subscriber lines and ISDN digital subscriber lines comprises at least one signal converter for each of the conventional analogue subscriber so that a line signal, an address signal and tone signal of each conventional analogue subscriber are converted into a signaling system of the ISDN digital subscribers line, and a traffic concentrator connected to the signal converter and disposed remote from a host exchange station, whereby the signaling system between the remote station and the host station is unified for both the analogue telephone subscriber and the ISDN digital subscriber.

Circuit for subscriber line interface circuits in a digital time-division multiplex communication switching center

Abstract: A circuit for subscriber line interface circuits in a digital time-division multiplex communication switching center is disclosed. In the case of reception of the same information on the same time slot allocation via a number of subscriber line interface circuits, a transmit time slot as well as a receive time slot is alloted, but access of the transmit driver stages of the subscriber line interface circuits to the bus conductors leading to the switching center is prevented in order to avoid damaging interacting final stages in the transmit driver stages of the subscriber line interface circuits.

A tutorial on digital subscriber line transceiver for ISDN

Abstract: An integral part of ISDN (integrated-services digital network) is the provision of full-duplex digital transmission capability at the basic access information rate of 144 kb/s over voice-grade metallic subscriber lines with all the associated disturbances from echo, intersymbol interference, and crosstalk, among other things. The authors provide an overview of the transmission environment and discuss the structure of transceivers for such use. Line coding, equalization, echo cancellation, and timing recovery are discussed at some length. A few numerical examples are given to illustrate the theoretically optimal transmission performance that can be attained with minimum mean-squared error equalization. Considerations regarding VLSI implementation of transceivers are briefly addressed. >

Full-duplex data over local loops

Abstract: An overview is provided of digital subscriber loops (DSLs), which are an essential part of the evolution from the integrated digital network (IDN) to the integrated services digital network (ISDN). Transmission impairments inherent in the subscriber loops are outlined, and their design is considered. Each of the essential elements in a DSL system is discussed in some detail, with emphasis on the tradeoffs of various design approaches. >

ISDN echo cancellation circuit (IEC), a transceiver for the subscriber loop

Abstract: The digital part of a two-chip U-interface transceiver for the subscriber loop is presented. According to the ISDN (integrated-services digital network) standard all communication control and algorithmic requirements are implemented for a 144-kb/s full duplex data transmission. The chip is implemented in a double-metal 2- mu m CMOS technology with an area of 8.2 mm*7.3 mm containing 58000 transistors, 15000 of which are implemented in a cell approach, the rest in hand-tuned digital signal processor. >

Upgrading strategy generalization for b-ISDN fiber-optic subscriber loop systems

Abstract: Strategies for developing broadband subscriber loops economically are investigated. Proposed strategies aim at a practical implementation of fiber-optic subscriber loops. System implementation cost is reduced by restricted use of expensive optical components. The system can be upgraded in accordance with the trends of optical component cost reduction. An optimum upgrading strategy is selected with respect to several network parameters in subscriber loops. Sensitivity analysis is also carried out for some typical subscriber distribution models. >

Circuit arrangement for the subscriber line circuits of a digital time division multiplex telecommunication exchange

Abstract: Where the same information is received by several subscriber line circuits (SLIC/ALAP), and thus subscriber terminals (TE) in the same time slot (broadcasting), both a transmitting time slot and a receiving time slot are allocated as in the case of a normal connection, but an access of the transmitting branches of the subscriber line circuits to the bus line (PCMA; PCMB) leading to the switching network is prevented in order to avoid output stages in the transmitting branches of the subscriber line circuits which operate against one another from being damaged. … …