Topic
Injection locking
About: Injection locking is a research topic. Over the lifetime, 4567 publications have been published within this topic receiving 60942 citations.
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TL;DR: In this paper, a two-port FET oscillator with distinct input and output ports was used in active arrays for spatial power combining with a single injection signal supplied to the first oscillator, which exhibited a locking bandwidth of greater than 500 MHz with a 0-dBm injection signal.
Abstract: Investigations of two-port FET oscillators and their use in active arrays for spatial power combining are reported. The two-port oscillator considered consists of a single FET oscillator with distinct input and output ports. This type of oscillator exhibits increased locking bandwidth over alternative approaches. Results are given for a prototype five-element linear array operating at 6 GHz. In this case, the entire array is synchronized by a single injection signal supplied to the first oscillator. The array exhibited a locking bandwidth of greater than 500 MHz with a 0-dBm injection signal. However, the radiation pattern had sidelobe levels below -10 dB for only 300 MHz of this range. Variation of the main lobe with frequency is shown. The main lobe direction variation is about 7% per 100 MHz of frequency change. >
30 citations
05 Jun 2011
TL;DR: In this paper, the authors present a unified phase noise model for injection-locked oscillators (ILO) and show that an ILO is identical to a type-I first-order PLL in its noise behavior within the lock range.
Abstract: This paper presents a simple, unified phase noise model for injection-locked oscillators (ILO). We show that an ILO is identical to a type-I first-order PLL in its noise behavior within the lock range. The model predicts the phase noise of injection-locked oscillators (ILO), injection-locked frequency dividers (ILFD), and injection-locked frequency multipliers (ILFM) as a function of the injection source phase noise and the oscillator phase noise. Measurement results from a discrete 57MHz Colpitts ILO, an integrated 6.5GHz ILFD, and an integrated 24GHz ILFM are presented to validate the theoretical predictions.
30 citations
TL;DR: In this article, a phase-locked output with narrow linewidth was obtained when the frequency detuning between the two lasers is less than 4 GHz, and this simple locking scheme could find application in a variety of photonics applications.
Abstract: Fabry-Perot InAs quantum-dot lasers grown on GaAs substrates are mutually coupled with a delay of several nanoseconds. Stable phase-locked output with narrow linewidth is obtained when the frequency detuning between the two lasers is less than 4 GHz. This simple locking scheme could find application in a variety of photonics applications.
30 citations
TL;DR: The nonlinear dynamics of an optically injected semiconductor laser are explored for radio-over-fiber uplink transmission and Microwave PSK to optical PSK is achieved at the double-locked laser, which allows all-optical demodulation without any high-speed microwave electronics.
Abstract: The nonlinear dynamics of an optically injected semiconductor laser are explored for radio-over-fiber uplink transmission. Under optical injection locking, the laser at the base station is operated in the period-one oscillation state, where its intensity oscillates at a tunable microwave frequency. When the oscillation is tuned to the subcarrier frequency, it is further locked by the uplink microwave signal. By simply using an ordinary 2.5-Gbps-grade semiconductor laser, uplink transmission of the phase-shift keying (PSK) signal at a subcarrier of 16 GHz with bit-error rate of less than 10−11 is demonstrated experimentally. Microwave PSK to optical PSK is achieved at the double-locked laser, which allows all-optical demodulation without any high-speed microwave electronics.
30 citations
TL;DR: In this article, a high-order (Divide-by-four) frequency divider with a self-oscillating subharmonic mixer loop consisting of cascode field effect transistors (FETs) is presented.
Abstract: In this paper, V-band high-order frequency divider monolithic microwave integrated circuits (MMICs) showing wide bandwidth and low-power dissipation are presented. For high-order (divide-by-four) frequency division, a super-harmonic signal is injected into a self-oscillating subharmonic mixer loop consisting of cascode field-effect transistors (FETs). Cascode FET-based harmonic injection locking allows high-frequency operation, simple circuit configuration, reduced FET count, and thus, low dc power consumption. Bias circuits and quarter-wavelength stubs are used to effectively suppress unwanted harmonic and spurious signals in the oscillation loop. A simple analysis method employing two-tone harmonic-balance simulation and an ideal directional coupler is developed to optimize the performance of the high-order divider. The designed V-band frequency dividers are fabricated with a commercial 0.15-/spl mu/m GaAs pseudomorphic high electron-mobility transistor foundry. The measurement of a divide-by-four MMIC shows a bandwidth of 2.81 GHz around 64.0 GHz under very small dc power consumption of 7.5 mW. The circuit concept has been extended to a divide-by-five MMIC by adding a frequency doubler in the feedback loop, which shows the bandwidth of 1.02 GHz at V-band. To the best of our knowledge, the frequency dividers of this study show the best performance in terms of division order and dc power consumption among the reported millimeter-wave analog frequency dividers at V-band and above.
30 citations