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Injection locking

About: Injection locking is a research topic. Over the lifetime, 4567 publications have been published within this topic receiving 60942 citations.


Papers
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Journal ArticleDOI
TL;DR: In this article, the power scaling of diode-pumped monolithic Nd:YAG ring laser to a single-frequency output power of nearly 2 W in cw operation is demonstrated by using a new ring laser design and applying four 1 W diode lasers.

99 citations

PatentDOI
John E. Bjorkholm1
TL;DR: In this paper, a singly resonant optical parametric oscillator (SRO) is used to tune a high power, pulsed source and tune it to a predetermined desired frequency, and radiation of that frequency is injected into a mode of the SRO from a stabilized, low power injection source.
Abstract: A singly resonant optical parametric oscillator (SRO) is pumped by a high power, pulsed source and is tuned approximately to a predetermined desired frequency. Radiation of that frequency is injected into a mode of the SRO from a stabilized, low-power injection source. The output of the SRO is a pulsed, high-power signal with frequency equal to the predetermined frequency to a high degree of accuracy.

99 citations

Journal ArticleDOI
TL;DR: In this paper, the effects of injection locking on the nonlinear distortions of a DFB laser were investigated experimentally, where the second harmonic distortion and third harmonic distortion were measured as functions of modulation frequency for both the free-running and injection-locked laser.
Abstract: The effects of optical injection locking on the nonlinear distortions of directly modulated semiconductor distributed feedback (DFB) lasers are investigated experimentally. The second harmonic distortion (SHD) and third harmonic distortion (THD), as well as the third-order intermodulation distortion (IMD3), are measured as functions of modulation frequency for both the free-running and injection-locked lasers. Under strong injection locking with -8-dB injection ratio, the SHD and THD of the DFB laser have been suppressed by 15 dB from 2 to 4 GHz. Moreover, nearly 15-dB reduction in IMD3 has been observed from 1.4 to 3.0 GHz with the same injection conditions. We also found that the injection locking is not effective in reducing the low-frequency distortions.

99 citations

Journal ArticleDOI
TL;DR: In this paper, a low voltage and wide locking range injection-locked frequency divider using a standard 018/spl mu/m complementary metal oxide semiconductor (CMOS) process is presented.
Abstract: A low voltage and wide locking range injection-locked frequency divider using a standard 018-/spl mu/m complementary metal oxide semiconductor (CMOS) process is presented The wide locking range and the low-voltage operation are performed by adding an injection nMOS between the differential outputs of the divider that contains on-chip transformers which result in positive feedback loops to swing the output signals above the supply and below the ground potential This dual-swing capability maximizes the carrier power and achieves low-voltage performance The measurement results show that at the supply voltage of 075-V, the divider free-running frequency is 202 GHz, and at the incident power of 0 dBm the locking range is about 149 GHz (3688%), from the incident frequency 327 to 464GHz

99 citations

Patent
04 Dec 1998
TL;DR: In this article, an oscillator with temperature compensation produces a stable clock frequency over wide variations of ambient temperature, and it includes an oscillation generator, two independent current generators, a transition detector and a clock inhibitor.
Abstract: An oscillator with temperature compensation produces a stable clock frequency over wide variations of ambient temperature, and it includes an oscillation generator, two independent current generators, a transition detector and a clock inhibitor. The outputs of the two programmable, independent current generators are combined to provide a capacitor charging current that is independent of temperature. The oscillator is capable of three modes of operation: fast mode, slow/low power mode and sleep mode, which are controlled by the transition detector in response to external control signals. When the transition detector transitions from one mode to another, it controls the clock inhibitor to block a clock output of the oscillator generator for a predetermined number of clock cycles to allow the clock output to stabilize. The oscillator is implemented on a single, monolithic integrated circuit.

98 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202333
202276
2021107
2020145
2019169
2018146