Topic
Injection locking
About: Injection locking is a research topic. Over the lifetime, 4567 publications have been published within this topic receiving 60942 citations.
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TL;DR: An injection locking-based pump recovery system for phase-sensitive amplified links, capable of handling 40 dB effective span loss, is demonstrated and enables, for the first time, WDM compatible phase- sensitive amplified links over significant lengths.
Abstract: An injection locking-based pump recovery system for phase-sensitive amplified links, capable of handling 40 dB effective span loss, is demonstrated. Measurements with 10 GBd DQPSK signals show penalty-free recovery of a pump wave, phase modulated with two sinusoidal RF-tones at 0.1 GHz and 0.3 GHz, with 64 dB amplification. The operating power limit for the pump recovery system is experimentally investigated and is governed by the noise transfer and phase modulation transfer characteristics of the injection-locked laser. The corresponding link penalties are explained and quantified. This system enables, for the first time, WDM compatible phase-sensitive amplified links over significant lengths.
41 citations
TL;DR: In this paper, the first phase shift transceiver operating from 71 to 86 GHz using injection-locked oscillators (ILOs) for phase shifting was presented, and a folded-cascode ILO was proposed to extend the locking range of an array of oscillators.
Abstract: This paper presents the first phased array transceiver operating from 71 to 86 GHz using injection-locked oscillators (ILOs) for phase shifting. A folded-cascode ILO is proposed to extend the locking range of an array of oscillators. Frequency multiplication covers a 10-GHz tuning range with 23-dB power gain. Each ILO path covers more than ±300° and exhibits low amplitude variation with respect to phase shift range ( $3.4\times2.1$ mm2 area implementing in the 90-nm BiCMOS technology and consuming 386.4 mW in the TX mode and 286 mW in the RX mode per element.
41 citations
TL;DR: In this article, a rational harmonic mode-locking of an Erbium-doped fiber ring laser (EDFL) at repetition frequency of 40 GHz was demonstrated by using a purely loss-modulated Fabry-Pe/spl acute/rot laser diode (FPLD) at 1 GHz.
Abstract: Rational harmonic mode-locking of an Erbium-doped fiber ring laser (EDFL) at repetition frequency of 40 GHz is demonstrated by using a purely loss-modulated Fabry-Pe/spl acute/rot laser diode (FPLD) at 1 GHz. The FPLD is neither lasing nor gain-switching, which requires a threshold modulation power of 18 dBm to initiate harmonic mode-locking of the EDFL. After chirp compensation, the nearly transform-limited pulsewidth and spectral linewidth of 3 ps and 1.3 nm are obtained at repetition frequency of 40 GHz, which corresponds to a time-bandwidth product of 0.31. The EDFL gradually evolves from harmonic mode-locking to injection-locking mode as the FPLD changes from loss-modulation to gain-switching mode by increasing its dc driving current.
41 citations
TL;DR: A fully integrated V-band phase-locked loop (PLL) MMIC with good phase noise and low-power consumption is developed using 0.15-/spl mu/m GaAs pHEMTs, one of the highest frequency monolithic PLLs that integrates all the required elements on a single chip.
Abstract: A fully integrated V-band phase-locked loop (PLL) MMIC with good phase noise and low-power consumption is developed using 0.15-/spl mu/m GaAs pHEMTs. For V-band frequency division,a wideband divide-by-3 frequency divider is proposed using cascode FET-based harmonic injection locking. The fourth subharmonic mixer using anti-parallel diode pair is employed as a high-frequency phase detector. In this way, the required frequency of the reference oscillator is lowered to one twelfth of V-band output signal. An RC low-pass filter and DC amplifier are also integrated to effectively suppress the spurious and harmonic signals, and to increase the loop gain. To reduce the circuit interactions and frequency pulling effect, buffer amplifiers are used at the output of VCO and frequency divider. The fabricated V-band PLL MMIC shows the locking range of 840 MHz around 60.1GHz under a very low power dissipation of 370 mW. Good phase noise of -95.5 dBc/Hz is measured at 100 kHz offset. The chip size is as small as 2.35/spl times/1.80 mm/sup 2/. To the best of our knowledge, the PLL MMIC of this work is one of the highest frequency monolithic PLLs that integrates all the required elements on a single chip.
41 citations
TL;DR: In this paper, a frequency measurement chain was used to measure the frequency of a hyperfine line of the nu /sub 3/P(7) CH/sub 4/ multiplet, which was resolved by a linear optical Ramsey resonance technique.
Abstract: A frequency-measurement chain was used to measure the frequency of a hyperfine line of the nu /sub 3/P(7) CH/sub 4/ multiplet, which was resolved by a linear optical Ramsey resonance technique. A frequency of 88, 376, 181, 599.7+or-1 kHz is found. The Ramsey experiment was used as a clock; to approximately 100 s the stability of this optical clock is equal to a high-performance commercial Cs clock. It is concluded that the frequency division necessary for optical transitions to be used as a clock does not necessarily introduce the noise and errors which would a priori rule out optical transitions as candidates for good clocks. >
41 citations