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Insulator (electricity)

About: Insulator (electricity) is a research topic. Over the lifetime, 15941 publications have been published within this topic receiving 108950 citations. The topic is also known as: electrical insulator.


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Patent
13 Jul 2006
TL;DR: A lead pin of a circuit includes a pin, an insulator that surrounds the pin, and a conductor that surrounding the insulator, the conductor including non-uniformity.
Abstract: A lead pin of a circuit includes a pin, an insulator that surrounds the pin, and a conductor that surrounds the insulator, the conductor including non-uniformity.

30 citations

Journal ArticleDOI
TL;DR: In this article, the results of a comprehensive study of electrical aging of both low-density polyethylene (LDPE) and chemically crosslinked polyethylenes (XLPE) aged in a humid environment at an AC stress of 6 kV/mm for an extended time were presented.
Abstract: Polyethylene, one of the most widely used electrical insulating materials, is known, despite its excellent physical properties, to exhibit structural degradation when submitted to a continued electrical (AC) stress in a humid environment. Although much work has been done to correlate the inception and growth of water trees with the breakdown in polyethylene, little attention appears to have been given to identify, through an appropriate model, the deterioration of the electrical and dielectrical parameters with the progressive aging of the insulator. This paper reports the results of a comprehensive study of electrical aging of both low-density polyethylene (LDPE) and chemically crosslinked polyethylene (XLPE) aged in humid environment at an AC stress of 6 kV/mm for an extended time. For this study, dielectric spectroscopy in the frequency range of 10 -5 Hz to 10 6 Hz has been employed to provide appropriate electrical analog models of the aging. An agreement, at least qualitative, is found with the dielectric and the thermally stimulated discharge current (TSDC) behavior.

30 citations

Journal ArticleDOI
TL;DR: In this paper, the authors investigated the insulation characteristics of epoxy resins, which is widely used for GIS insulating spacers, and determined the resistivity of the epoxy insulator surface layer under dc voltage on an experimental basis.
Abstract: Now that gas insulated switchgear (GIS) for ac systems are becoming increasingly compact as specifications are rationalized, more consideration of their insulation characteristics for residual dc voltage is required. Furthermore, with dc power transmission technology drawing more and more global attention, clarifying the insulation characteristics of GIS for dc voltage is increasingly important. In this paper, to understand the insulation characteristics of epoxy resin, which is widely used for GIS insulating spacers, factors determining the resistivity of the epoxy insulator surface layer under dc voltage were initially investigated on an experimental basis. Consequently, it emerged that the bulk resistance was more dominant than the surface resistance for the dc resistance of epoxy resin due to the dependency of the test sample resistance value on their radius. Since the electric field might be concentrated if some part of this insulator surface layer showed non-uniform resistivity, the influence of the curing agent, one of the potential causes of this non-uniformity, was subsequently investigated with its content as a parameter. As a result, the volume resistivity in the long-term region was likely to decline or vary for epoxy resin containing less curing agent due to the presence of numerous polarized components unreacted with curing agent. In addition, the presence of micro protrusions or similar, if any, on the insulator surface or electrode is considered to cause electrification due to the concentration of electric field on the surface layer. Accordingly, the relationship between their surface roughness and electrification level was investigated using gaps between insulators or an electrode and an insulator facing each other, respectively. Consequently, where the surface roughness of the insulator or electrode was high, a current component with a large damping time constant, considered attributable to electrical charges moving across the gap, appeared after the charging current components and an electrification condition was observed.

30 citations

Journal ArticleDOI
TL;DR: In this article, a consistent device model to describe currentvoltage characteristics of metal/insulator/metal systems is developed, where the insulator and the metal electrodes are described within the same theoretical framework by using density of states distributions.
Abstract: A consistent device model to describe current-voltage characteristics of metal/insulator/metal systems is developed. In this model the insulator and the metal electrodes are described within the same theoretical framework by using density of states distributions. This approach leads to differential equations for the electric field which have to be solved in a self consistent manner by considering the continuity of the electric displacement and the electrochemical potential in the complete system. The model is capable of describing the current-voltage characteristics of the metal/insulator/metal system in forward and reverse bias for arbitrary values of the metal/ insulator injection barriers. In the case of high injection barriers, approximations are provided offering a tool for comparison with experiments. Numerical calculations are performed exemplary using a simplified model of an organic semiconductor.

29 citations

Patent
Charles T Naber1
12 Oct 1972
TL;DR: In this article, a multilevel conductor structure and a method of insulating an upper level of conductors from a lower level ofconductors on a silicon substrate of an integrated circuit was proposed.
Abstract: The present invention relates to a multilevel conductor structure and to a method of insulating an upper level of conductors from a lower level of conductors on a silicon substrate of an integrated circuit. An undoped silicon oxide insulator layer and a doped silicon oxide insulator layer are successively placed on the lower level of conductors and the structure is heated to a temperature which is sufficient to cause the doped oxide insulator layer to soften and to flow above the lower conductors to produce tapered steps over the edges of the lower level of conductors. An upper level of conductor is then formed on the tapered doped silicon oxide insulator layer. The undoped silicon oxide insulator layer formed between the doped silicon oxide insulator layer and the lower level of conductors prevents doping atoms of the doped silicon oxide insulator layer from penetrating into source or drain regions of the silicon substrate which are usually in the vicinity of the lower level of conductors to change their conductivity.

29 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023368
2022892
2021224
2020478
2019561
2018629