Showing papers on "Interface (computing) published in 1980"

Sensors, Controls, and Man-Machine Interface for Advanced Teleoperation

Abstract: Some advances have been made in teleoperator technology through the introduction of various sensors, computers, automation, and new man-machine interface devices and techniques for remote manipulator control. The development of dexterous articulated mechanisms, smart sensors, flexible computer controls, intelligent man-machine interfaces, and innovative system designs for advanced teleoperation is, however, far from complete, and poses many interdisciplinary challenges. This article summarizes the state of the art, gives a brief outline of the basic problems, and presents the results of teleoperator research and development at the Jet Propulsion Laboratory.

Digital data communication system

Abstract: A digital data communication system including a data source and a source interface, a digital data bus, for transferring encoded information from the data source to one or more receivers, each having a receiver interface. The source interface is adaptable for controlling the rise and fall times of the signals on the bus at a plurality of frequencies. It is directly coupled to the bus and terminates the bus in its characteristic impedance. The receiver interface operates at a plurality of frequencies and is directly coupled to the bus.

DoD standard Transmission Control Protocol.

Abstract: : The Transmission Control Protocol (TCP) is intended for use as a highly reliable host-to-host protocol between hosts in packet-switched computer communication networks, and especially in interconnected systems of such networks. This document describes the functions to be performed by the Transmission Control Protocol, the program that implements it, and its interface to programs or users that require its services. Computer communication systems are playing an increasingly important role in military, government, and civilian environments. This document primarily focuses its attention on military computer communication requirements, especially robustness in the presence of communication unreliability and availability in the presence of congestion, but many of these problems are found in the civilian and government sector as well. As strategic and tactical computer communication networks are developed and deployed, it is essential to provide means of interconnecting them and to provide standard interprocess communication protocols which can support a broad range of applications.

Serial storage interface apparatus for coupling a serial storage mechanism to a data processor input/output bus

Abstract: Serial storage interface apparatus for coupling a serial storage mechanism, such as a charge coupled storage device or a magnetic bubble storage device, to a data processor input/output (I/O) bus. Speed control circuitry is provided for causing the serial storage mechanism to operate at a higher speed when the data processor is responding more rapidly to data transfer requests from the interface apparatus and at a lower speed when the data processor is responding less rapidly to data transfer requests from the interface apparatus. This speed adjustment feature reduces the amount of data buffering required for interfacing a serial storage mechanism to an asynchronous variable response time I/O bus system.

A prototype Spatial Data Management System

Abstract: Spatial Data Management is a technique for organizing and retrieving information by positioning it in a spatial framework. Data is accessed in a Spatial Data Management System (SDMS) via pictorial representations which are arranged in space and viewed through a computer graphics system. These pictures can be created by an interactive graphical editor, allowing an SDMS to serve as a personal repository of diagrams, text, and photographs. Pictograms can also be generated from data in a symbolic database management system, allowing SDMS to be used as an interface to large, shared databases.A prototype SDMS has been constructed which employs a set of color, raster scan displays driven by a large minicomputer. The user can create and examine data surfaces which are larger than the display screen, traversing a surface and zooming in and out to control the level of detail displayed. The prototype system provides a uniform mechanism for accessing a wide variety of data types in a manner which does not require the use of a formal command or query language.

Intelligent test head for automatic test system

Abstract: An intelligent test head which can be plugged into an existing computer-controlled automatic test system that is adapted to carry out certain tests on integrated circuits and discrete devices, the test head making it possible for the system to execute special tests which the system is otherwise incapable of performing. The existing system includes a main frame computer associated with a programmer. A device under test is linked by a pin electronics board to the computer through a relay interface board which acts to selectively couple a forcing supply, a function generator or other testing sources to the device, which sources are appropriate to the normal test capabilities of the system. When plugged into the system, the intelligent test head is interposed between the pin electronics board and the device then under test. The head includes a microprocessor and firmware associated therewith which stores the various test functions and the necessary timing and sequencing for the special tests, the head also being provided with a function generator and other testing sources. The microprocessor is intercoupled with the main frame computer through a translation module so that data acquired by the special function test head can be translated into the same machine language format that the main frame computer uses to communicate within itself.

CPU Channel monitoring system

Abstract: A computer monitoring system connects into the channel (24), serving as a link between a CPU (10) and peripheral devices (12), (14), (16). Channel signals are extracted in a channel interface module (18), altered to be compatible with the logic in a data collection module (20) and sent to a data collection module (20) along with event codes generated within the channel interface module (18) to indicate certain sequences and/or combinations of signals occurring on the channel (24). The data collection module (20) is programmable to select those peripheral devices it wants to monitor and the type of information to be collected. The data collection module (20) also includes circuitry for counting the number of successive search commands performed for a device without collecting the information contained therein for each command as well as circuitry for measuring the percentage of activity of each device and the channel as a whole.

Video inspection system

Abstract: A video inspection system comprising a TV camera for producing a digital video image of a subject, an interface, having a direct memory access channel, for structuring the digital data, a high speed random access memory for storing the digital data, a bus oriented processor for performing high speed processing of the digital data in the memory, a digital computer for controlling the operation of the system and an operator terminal for communicating with the system.

Electronic controller and portable programmer system for a pneumatically-powered point-to-point robot

Abstract: An electronic controller and portable programmer system for a pneumatically-powered point-to-point robot is disclosed. The microprocessor-based controller includes a read-only memory for storing the main control program, a non-volatile memory (EAROM) for storing a sequence of robot functions forming a user program, an output interface for transmitting control signals to the robot solenoid values, and an input interface for receiving feedback pressure signals to indicate that the various robot functions have been completed. The portable programmer provides a teach control unit, which is used to enter, edit, and test the user program. The teach control unit includes a matrix keyboard, a display, circuit means for decoding the keyboard and driving the display, and an interface for providing serial communication with the controller.

Microprocessor based process control system

Abstract: A microprocessor numerical control system having a prom module which contains the operating program of the system and a processor module which contains a microprocessor generating multiplexed data and address information on an internal bus. The processor module further includes bus control logic and address and data transceivers which interface the internal bus with the system's address data and control buses. The processor module further includes a variety of timing and interrupt control circuits which permits selective communication with other modules in the system. The system further includes a peripherial interface module having thereon logic to communicate with a CRT, keyboard, audible and visual indicators and an A to D converter which may be used to input feedrate override information into the processor memory. The peripherial interface module further provides interface circuitry between the processor module and a CRT display and has the capability of displaying on the display, in response to operator commands, input via the keyboard, a character display having a height which is twice that which is displayed in the normal mode of operation. The system further includes a servo output module for generating commands to drive associated motors on each of the axes of the machine tool and a transducer module which provides feedback information from these machine axes. In addition, the system further includes an input signal and an output signal module that are used to indicate and/or command the various states or modes of operation of the machine.

Programmable bootstrap loading system

Abstract: A programmable bootstrap loader device for loading or transferring programsnto the main memory of a computer system includes a processor-peripheral interface for decoding instructions of the computer system and for generating control signals to operate peripheral equipment coupled to the system An alterable or programmable memory stores a set of instructions which makes up a bootstrap loader program, is not lost when power to the system is shut off An alterable memory access circuit is coupled between the processor-peripheral interface and the alterable memory to enable an operator to alter discrete instructions of the stored bootstrap loader program

Intelligent field interface device for fluid storage facility

Abstract: An intelligent field interface device for use in a fluid storage facility is disclosed. A bidirectional standard serial communication bus (20) provides communication between a plurality of the interface devices (17) and a central location (18). Surge and lightning protection (50, 51) as well as a high degree of electrical and magnetic isolation (45) are provided between the power supplies of the system. Each device includes a local one chip microcomputer (35) which has a field set address (56) and communicates through optoisolation (27) with the bus through a UART (28). Analog multiplexing (40) of RTD outputs (176-179) or outputs of other transducers (162) is provided to a local to analog to digital converter (36) so that all measured tank parameters may be transmitted digitally back to the control location. An arrangement for both testing and operating a motor operated valve (110) through a two-wire circuit (141, 132) including a limit switch (119) is also shown.

Scratch pad memory for cassette of magnetic tape recording

Abstract: The invention relates to a scratch pad memory system having a table of contents for identifying program material recorded on a magnetic tape in a cassette or cartridge with program material being recorded or changed responsive to user command. The scratch pad memory system comprising an address register, a read only storage, and having an interface for read/write storage and a text displaying terminal coupled to a television receiver for display of program material.

Advanced data link controller having a plurality of multi-bit status registers

Abstract: A bit-oriented data link controller provides the interface between a microcomputer or terminal and a data communications link. The data link controller is capable of accommodating the three most commonly available bit-oriented data link control protocols, namely SDLC, HDLC, and ADCCP. The data link controller provides the data communications interface for both primary and secondary stations in stand-alone, polling, and loop configurations.

Control circuitry for data transfer in an advanced data link controller

Abstract: A bit-oriented data link controller provides the interface between a microcomputer or terminal and a data communications link The data link controller is capable of accommodating the three most commonly available bit-oriented data link control protocols, namely SDLC, HDLC, and ADCCP The data link controller provides the data communications interface for both primary and secondary stations in stand-alone, polling, and loop configurations

Abstract Interface Specifications for the A-7E Device Interface Module.

Abstract: : As part of the experimental redesign of the flight software for the Navy's A-7 aircraft, software modules were designed to encapsulate the characteristics of hardware devices connected to the computer. The purpose of these device interface modules is to allow the remainder of the software to remain unchanged when devices are changed or replaced. To achieve this purpose, the modules were designed according to the abstract interface principle, documented according to a standard organization and reviewed by a systematic procedure based on the properties expected of abstract interfaces. This report contains: (a) an explanation of the abstract interface approach, (b) a description of the standard organization for interface specifications, (c) a description of the review procedure, and (d) interface specifications for all the device interface modules in the A-7 software. As well as serving as development and maintenance documentation for the A-7 redesign, this document is intended to serve as a model for the other people interested in applying the abstract interface approach on other software projects. (Author)

High speed data interface buffer for digitally controlled electron beam exposure system

Abstract: An electron beam exposure system for forming integrated circuit patterns in which pattern data provided by either a control processor or a mass storage device is transferred through a pattern buffer interface which contains a large buffer memory, the reading and writing of which is automatically controlled by read and write logic contained within the interface. Data is transferred to the interface over busses having a data width less than the data width capable of being stored at an addressable location in the buffer memory. Automatic assembly of larger units of data is controlled by logic within the interface which requires only initialization by the control processor. Automatic address sequencing for subsequent data transfers is carried out under control of self-incrementing storage address registers and self-decrementing word count registers. Transfers of data to the electron beam column, through a pattern generator, is provided in addressable data units, while transfers to the control processor or mass storage device are provided as sub-units of an addressable data unit compatable with their respective buss widths.

Interface apparatus employing a video tape drive to back-up a disc drive and including error detecting and correcting circuitry

Abstract: An interface apparatus between a video tape recorder and a disc drive having a non-removable magnetic storage medium and a controller is disclosed. The video tape recorder provides memory back-up to data stored on the disc drive. The interface apparatus comprises a data bus for transferring the data between a shift register in the interface to the controller of the disc drive. The shift register transforms the parallel data from the controller to serial data when data is being written onto the VTR, and transforms the serial data from the VTR to parallel format when data is being read into the disc drive. The interface appartus has a clock for generating video signals. In addition, a circuit separates the sync and data portions of the video signal when the video signal is read from the tape of the VTR into the controller. A CRC generator checks for errors in the transmission of data to and from the video tape recorder. A control state machine which is responsive to the read/write signal from the controller generates a start bit, a data clock and shift signal to shift the shift register in its appropriate timing. The start bit is used when data is being written from the disc drive to the tape recorder. The apparatus can also be used in a computer system.

Uniform interfaces for distributed systems

Abstract: At the University of Rochester we have had five years of experience in the design and implementation of a multiple machine, multiple network system called RIG. It has been useful to distinguish two types of system service: The first is provided directly to the user through a user interface, or user-system interface. The user obtains these services by typing commands or requests which are satisfied by actions initiated by the user interface. The user interface should provide a common viewpoint for the user of distributed resources. The second type of system service is provided by programs or processes executing on behalf of the user. The user's program obtains these services by executing "system calls." The system software that interprets and satisfies these calls implements the system interface or program execution environment. In RIG, equal emphasis was given to user and system interfaces. Each was made as uniform and coherent as possible across all available resources. It is the purpose of this thesis to present certain mechanisms and paradigms for building distributed systems with uniform interfaces. Building on a base of processes communicating solely via messages, four key contributions to research in distributed systems are described: (1) Virtual Terminals are presented as the means for managing a large number of application programs per user. The Virtual Terminal Management System provides extensive facilities for editing text, the ability to save all output in disk-based data structures, and sophisticated mechanisms for the management of screen space. (2) Principles of command interaction are outlined which facilitate the use of distributed resources. Together with the Virtual Terminal Management System, the command interface serves to present an elegant, robust, and consistent interface between RIG and the user. (3) Mechanisms for resource management are presented which are well suited to a distributed environment. In particular, resource management is viewed fundamentally as a problem of process management. Processes may be created "by name" and registration facilities enable any process to register its interest in, for example, the death of any other process. (4) Paradigms are presented for how processes should be written and communicate. Of particular importance are the simple yet powerful mechanisms for error and exceptional conditional handling. Registration facilities are provided which enable any process to register its interest in exceptional events which occur with regard to any other process.

Data processing system with a slave computer using data registers as the sole operand store

Abstract: In a data processing system having a slave computer connecting to a host central processing unit and a host main memory, the slave computer has no internal random access memory and includes an arithmetic logic operating means. The arithmetic logic operating means calculates an address of the host main memory. A DMA interface directly makes an access to the host main memory to fetch operand data into the slave computer. The arithmetic logic operating means computes the operand data under control of a microprogram control section and directly loads the computed result to the host main memory through the DMA interface.

Driving circuit for cathode ray tube

Abstract: A microprocessor numerical control system having a prom module which contains the operating program of the system and a processor module which contains a microprocessor generating multiplexed data and address information on an internal bus. The processor module further includes bus control logic and address and data transceivers which interface the internal bus with the system's address data and control buses. The processor module further includes a variety of timing and interrupt control circuits which permits selective communication with other modules in the system. The system further includes a peripheral interface module having thereon logic to communicate with a CRT, keyboard, audible and visual indicators and an A to D converter which may be used to input feedrate override information into the processor memory. The peripheral interface module further provides interface circuitry between the processor module and a CRT display and has the capability of displaying on the display, in response to operator commands, input via the keyboard, a character display having a height which is twice that which is displayed in the normal mode of operation. The system further includes a servo output module for generating commands to drive associated motors on each of the axes of the machine tool and a transducer module which provides feedback information from these machine axes. In addition, the system further includes an input signal and an output signal module that are used to indicate and/or command the various states or modes of operation of the machine.

Word processing system employing a plurality of general purpose processor circuits

Abstract: A data processing system embodying the present invention includes a plurality of data processing stations. Each station includes a first communications interface connected to a common communication channel and a second communications interface for communicating with one or more associated controlled units. Each station also includes a processor and a memory; the processor and the interfaces being operatively connected to the memory, so that each may access the memory, and to a contention resolving circuit for resolving memory access conflicts. The system also includes a first controlled unit comprising a mass storage device and a controlled unit communications interface connected to the second communications interface of a first one of the plurality of processors; a second controlled unit comprising a keyboard for entering data and a first, single line, display for displaying data and a controlled unit communications interface connected to the second communications interface of a second of the plurality of processors; and a third controlled unit comprising a second, multi-line, display for displaying data and a controlled unit communications interface connected to the second communications interface of a third of a plurality of processors.

Experiments with voice input for command and control: Using voice input to operate a distributed computer network

Abstract: : This report describes an experiment in which military officers used voice recognition equipment to verbally enter commands to a computer network similar to that of a command and control center, or a shipboard information center. Results suggest that voice input can result in faster operation and fewer errors for such activities and give the operator more time to do other things. In addition, operators are very comfortable using voice input because of the more natural man-machine interface. (Author)

The INTEL® 8087 numeric data processor

Abstract: The INTEL® 8087 is a high performance general purpose numeric data processor. It is used with the INTEL® 8086, or the INTEL® 8088, microprocessors to extend their instruction sets with over 100 instructions (not counting addressing mode). The 8087 has all of the 8086 addressing modes and through a coprocessing interface is able to execute numeric instructions concurrently with the 8086 (or 8088). The high performance overlapped execution is transparent to the user who sees the 8087 simply as an extension of the 8086 (8088). Furthermore, the 8087 is the only chip that must be added to an 8086-based system to provide numerics capability with a performance enhancement over software of more than 100. In addition to high performance, great care was taken to ensure that the 8087 could be used in any application involving numbers---including commercial calculations. This required an unprecedented level of accuracy and reliability to be built into the processor. The intent was to greatly simplify the production of high performance but reliable numeric software.