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Showing papers on "Interface (computing) published in 1982"


Patent
04 Oct 1982
TL;DR: In this paper, the authors present an interface mechanism between two processors, such as a host processor (70) and a processor (31) in an intelligent controller for mass storage devices (40), and utilizing a set of data structures employing a dedicated communications region (80A) in host memory.
Abstract: An interface mechanism (10) between two processors, such as a host processor (70) and a processor (31) in an intelligent controller (30) for mass storage devices (40), and utilizing a set of data structures employing a dedicated communications region (80A) in host memory (80). Interprocessor commands and responses are communicated as packets over an I/O bus (60) of the host (70), to and from the communication region (80A), through a pair of ring-type queues (80D) and (80E). The entry of each ring location (e.g., 132, 134, 136, 138) points to another location in the communications region where a command or response is placed. The filling and emptying of ring entries (132-138) is controlled through the use of an `ownership` byte or bit (278) associated with each entry. The ownership bit (278) is placed in a first state when the message source (70 or 31) has filled the entry and in a second state when the entry has been emptied. Each processor keeps track of the rings' status, to prevent the sending of more messages than the rings can hold. These rings permit each processor to operate at its own speed, without creating race conditions and obviate the need for hardware interlock capability on the I/O bus (60).

186 citations


Patent
15 Mar 1982
TL;DR: In this paper, the authors present a control system for teleconferencing that includes at least a pair of controllable video sources for deriving video signals from controlled regions of the associated site, an audio transducer responsive to a remotely generated audio signal for generating perceptible sound, and an interface for coupling digital representations of locally generated audio and video signals to a communication link linking the sites and for coupling digitally generated representations of remotely generated video signals.
Abstract: Control of teleconference is facilitated so as to allow relatively unskilled operators to implement such control. The invention includes at least a pair of teleconferencing sites, each of which includes at least a pair of controllable video sources for deriving video signals from controllable regions of the associated site, an audio source for deriving an audio signal from the associated site, at least a pair of video displays for controllably displaying either locally or remotely generated images, an audio transducer responsive to a remotely generated audio signal for generating perceptible sound, an interface for coupling digital representations of locally generated audio and video signals to a communication link linking the sites and for coupling digital representations of remotely generated audio and video signals, a control device including a digital microprocessor and controlling, among other things, a video matrix switch, the video matrix switch having plural video inputs and outputs for controllably coupling at least a locally generated video signal to the interface and for controllably coupling locally and/or remotely generated video to said displays. The control device also includes a control video display with a touch sensitive screen for controlling the video sources and video matrix switch in response to touches on the touch sensitive screen by an operator and further including, in the form of a program in said microprocessor, apparatus to interpret commands initiated by operator touches of the touch sensitive screen and for thereafter implementing the commands if elements of the command are consistent with each other and with available resources as well as message formatting which are responsive to the logic for formatting digital messages destined for the video sources and the video matrix switch.

182 citations


Patent
21 May 1982
TL;DR: In this article, a data processing system has a flexible internal structure, protected from and effecitvely invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users.
Abstract: A data processing system having a flexible internal structure, protected from and effecitvely invisible to users, with multilevel control and stack mechanisms and capability of performing multiple, concurrent operations, and providing a flexible, simplified interface to users. The system is internally comprised of a plurality of separate, independent processors, each having a separate microinstruction control and at least one separate, independent port to a central communications and memory node. The communications and memory node is an independent processor having separate, independent microinstruction control and comprised of a plurality of independently operating, microinstruction controlled processors capable of performing multiple, concurrent memory and communications operations. Addressing mechanisms allow permanent, unique identification of information and an extremely large address space accessible and common to all such systems. Addresses are independent of system physical configuration. Information is identified to bit granular level and to information type and format. Protection mechanisms provide variable access rights associated with individual bodies of information. User language instructions are transformed into dialect coded, uniform, intermediate level instructions to provide equal facility of execution for all user languages. Operands are referred to by uniform format names which are transformed, by internal mechanisms transparent to users, into addresses.

134 citations


Patent
05 Apr 1982
TL;DR: In this paper, a digital processor system including several function modules where each module includes circuitry to perform at least one computational task and the circuitry to transfer information containing that modules respective computational task capability to a global memory upon initialization of each module and further circuitry to interface to the global memory with circuitry to determine each modules address.
Abstract: A digital processor system including several function modules where each module includes circuitry to perform at least one computational task and the circuitry to transfer information containing that modules respective computational task capability to a global memory upon initialization of each module and further circuitry to interface to the global memory upon initialization together with circuitry to interface to the global memory to determine each modules address. Further included is an information bus connected to the function modules and the to global memory. This system configuration allows for the system to self-configure upon power up intialization.

131 citations


Patent
26 Jul 1982
TL;DR: In this paper, a built-in test system employs dual-mode feedback shift registers to supply test vectors and evaluate test responses of functional and interface networks of a logic system, which are supplied to a quotient bit compressor which generates a system response signature for comparison with an expected fault-free signature to produce a system pass/fail status signal.
Abstract: A built-in test system employs dual-mode feedback shift registers to supply test vectors and evaluate test responses of functional and interface networks of a logic system. Test responses are supplied to a quotient bit compressor which generates a system response signature for comparison with an expected fault-free signature to produce a system pass/fail status signal.

100 citations


Proceedings ArticleDOI
15 Mar 1982
TL;DR: There is little dispute that the main channels of intercommunication of people with the world at large are: sight, sound, and touch; and for people with other people: eye-contact, speech, gesture.
Abstract: There is little dispute that the main channels of intercommunication of people with the world at large are: sight, sound, and touch; and for people with other people: eye-contact, speech, gesture.Advanced human-computer interfaces increasingly implicate speech i/o, and touch or some form of manual input.

97 citations


Patent
20 Sep 1982
TL;DR: In this article, a programmable controller for closed-loop positioning control has a main processor unit, and an I/O interface rack in which a master positioning module and three SIs are mounted and connected to servomechanisms to control motion along three axes of a controlled machine.
Abstract: A programmable controller for closed-loop positioning control has a main processor unit, and an I/O interface rack in which a master I/O positioning module and three satellite I/O modules are mounted and connected to servomechanisms to control motion along three axes of a controlled machine. Move data is transmitted from the main processor unit to the master I/O positioning module in data blocks, with the number of transmissions varying, depending upon a mode of axis coupling that is used in controlling the particular machine. The master I/O positioning module converts move data from a user program format to a binary format and transfers it to the satellite I/O modules, each of which performs closed-loop positioning control of a respective axis of motion. The processor on each satellite I/O module also determines a position prior to the end of each move to apply a user-programmed deceleration when needed to blend moves having different velocities.

76 citations


Patent
01 Feb 1982
TL;DR: In this paper, the system comprises a programmed computer, a processing section connected to the telephone line, and an interface circuit for providing communication between the processing section and the computer, with only one interface circuit being used to provide communication between all of the processing sections.
Abstract: The system receives line signals including tone coded information request messages from a telephone line and transmits synthesized human voice response messages along the same line. The system comprises a programmed computer, a processing section connected to the telephone line to receive signals from the telephone line, and an interface circuit for providing communication between the processing section and the computer. A plurality of processing sections are used with a plurality of telephone lines, with only one interface circuit being used to provide communication between all of the processing sections and the computer. Each processing section contains a voice synthesizer circuit, a line control circuit, and a tone decoder circuit. Each of these circuits provides a status signal when the circuit must communicate with the computer. The interface circuit includes an interrupt circuit which receives the status signals and provides an interrupt signal to the computer. Upon receipt of the interrupt signal, the computer interrogates a specialized circuit in the interface to determine the source of the interrupt signal and then communicates with the circuit causing the interrupt signal through the interface circuit. Communication with the computer is carried through a serial data bus line. The serial data is converted to parallel data in the interface circuit.

74 citations


Journal ArticleDOI
TL;DR: A TRS-80-based system is described for controlling and recording events from operant chambers and uses assembly language routines for real-time control and event recording of up to 8 boxes simultaneously.
Abstract: A TRS-80-based system is described for controlling and recording events from operant chambers. The system features a TRS-80 microprocessor with 32 K RAM, a floppy disk drive, an LVB optical interface, a printer, and a user-oriented program (Operant Protocol System, OPS). The LVB interface system is capable of up to 128 independent input/output operations for each of up to 8 boxes. The system uses assembly language routines for real-time control and event recording of up to 8 boxes simultaneously. BASIC is used to obtain user input and deliver data output in an interactive fasion. Advantages include dependable hardware, extensively documented and tested software, relative inexpensiveness, and standard-deviation-based variable schedules.

72 citations


Patent
12 Apr 1982
TL;DR: In this article, an active programmable controller services I/O racks which contain circuits that interface with sensing devices and operating devices on a machine being controlled, and a back-up programmable control unit monitors this data to maintain a current image table in its memory.
Abstract: An active programmable controller services I/O racks which contain circuits that interface with sensing devices and operating devices on a machine being controlled. A back-up programmable controller monitors this I/O data to maintain a current I/O image table in its memory. Other status data is coupled to the back-up controller from the active controller through a peer-to-peer communications link. If a malfunction occurs in the active controller, the back-up controller is signaled to switch to the active mode in which it assumes control of the operating devices on the machine being controlled.

71 citations


Journal ArticleDOI
V. Y. Lum1, D. M. Choy1, N. C. Shu1
TL;DR: Using forms as the interface, the authors propose a powerful data manipulation and restructuring facility that not only allows users to extract and manipulate data in the forms, but can be used to interface between new and existing applications as well.
Abstract: This paper discusses an experimental system being developed to support office automation. The emphasis of the paper is on a technology that allows people to automate their office and business activities. Specifically, using forms as the interface, the authors propose a powerful data manipulation and restructuring facility that not only allows users to extract and manipulate data in the forms, but can be used to interface between new and existing applications as well. Since business and office procedures are not discrete activities, but a structured sequence of activities, a means to define and execute procedures is required. Such means is described in this paper along with its model and an example of its application.

Journal ArticleDOI
TL;DR: The notion of identifying a part of a computer system, the man-computer interface, that can be seen as representing the user's model of the system is explored and a particular classification of the components of an interface is presented.
Abstract: The notion of identifying a part of a computer system, the man-computer interface, that can be seen as representing the user's model of the system is explored. A particular classification of the components of an interface is presented. It is suggested that the design of the man-computer interface is central to the design of an interactive system. Certain design problems are discussed and problems requiring further research identified.

Patent
19 Aug 1982
TL;DR: In this paper, a dynamically programmable processing element (DPPE) is described, which is a special purpose computer which essentially has a program bus for transmitting and receiving program data from an external source.
Abstract: A dynamically programmable processing element (DPPE) is disclosed which element has the utility in a digital processing system which requires complicated arithmetic procedures to be implemented. The DPPE device is a special purpose computer which essentially has a program bus for transmitting and receiving program data from an external source. A data bus is also provided which bus can transmit or receive digital data. Coupled between the buses are input and output registers or buffers which are capable of storing transmitted or received data propagating on either of said buses. A program memory has an input coupled to said program bus and means coupling the output of the program memory to the program bus. A data memory has an addressable input means coupled to the program bus and an output coupled to the data bus. Based on the orientation of the buses and the memories, the program memory can receive program information or data from an external source and data from the data memory can be transferred to the external source. In this respect the DPPE can be reprogrammed in real time by the external source. The DPPE can also execute program instructions by fetching them from the external source as well as executing its own program instructions as stored in its program memory. The structure and format of the DPPE enables it to interface with an external source such as a microprocessor to assist and perform program instructions, as well as to perform arithmetic operations on data from the microprocessor and to communicate with the microprocessor after completion of the various routines.

Journal ArticleDOI
TL;DR: This paper follows a trend towards more user oriented design approaches to interactive computer systems and mentions recent research in artificial intelligence as a possible source of proposed components for a self-adaptive interface system.
Abstract: This paper follows a trend towards more user oriented design approaches to interactive computer systems. The implicit goal in this trend is the development of more “natural” systems. Design approaches should aim at a system capable of continuous change by means of suitable agents. The term “soft facade” is used to describe a modifiable interface to a system. Facades vary in softness and agents for change can be the systems designer, the user or an expert system in the facade. In the latter case, the system is called a self-adaptive interface system. The conditions where a self-adaptive interface system is desirable are briefly considered and discussed in relation to a simple example. Recent research in artificial intelligence is mentioned as a possible source of proposed components for a self-adaptive interface system.

Proceedings ArticleDOI
15 Mar 1982
TL;DR: The purpose is to design a specification language which will serve as a vehicle for the design of and experimentation with user-computer interfaces, and believe the language is general enough to be used with principles of interface design other than those the authors have proposed.
Abstract: Despite the current interest in user-computer interfaces, the design of a good interface remains to a great extent an art, with much argument over guidelines and principles for interface design. Pertinent information, scattered throughout the literature of psychology, graphic design. linguistics, hardware design, and under the general umbrella of computer science, is only gradually being gathered into survey publications for application by computer scientists [1,4,12,15]. Our purpose is to design a specification language which will serve as a vehicle for the design of and experimentation with user-computer interfaces. The specification language not only defines the external characteristics of the interface, but can also be analyzed to determine whether the interface meets a set of generally-accepted human factors guidelines. We believe the language is general enough to be used with principles of interface design other than those we have proposed.

Patent
08 Sep 1982
TL;DR: In this paper, the I/O capacity of a programmable controller can be increased by replacing four of the eight expansion buses with an address module and three interface modules that drive the expansion buses.
Abstract: A programmable controller has eight I/O buses which will support a corresponding number of I/O modules. The I/O capacity of the programmable controller may be increased by replacing four of the I/O modules with an I/O address module and three I/O interface modules that drive I/O expansion buses. Up to eight I/O racks, each containing three I/O modules and one adaptor circuit, can be connected to the I/O expansion buses.

Proceedings ArticleDOI
Ed Anson1
01 Jul 1982
TL;DR: The Device model of interaction, as described here, can ease the job of designing user- friendly interactive systems, and can be adapted for automatic compilation.
Abstract: Any interactive system can be described in terms of the devices it involves, and their interconnections. Similarly, each device can be described in terms of simpler devices and their interconnections. Such descriptions are strictly modular, and well structured.This observation allows any system to be described, at all levels, by the same language. Such descriptions have intuitive appeal for hardware as well as software components, and for process control applications as well as human-machine interaction. The Device model of interaction, as described here, can ease the job of designing user- friendly interactive systems, and can be adapted for automatic compilation.As an example, the design of an actual system component is discussed. The design is presented, at several levels, in a Pascal-like notation. It represents a module created to provide a human-machine interface via a graphic tablet, keyboard and video monitor.

Proceedings ArticleDOI
01 Jan 1982
TL;DR: An approach to managing information about VLSI designs, founded upon database system methods, that simplifies the rapid construction of new design tools by taking responsibility for design data management.
Abstract: We describe an approach to managing information about VLSI designs, founded upon database system methods. A database component provides a low-level flat-file interface to stored data. Built on top is a design data management system, supporting the hierarchical construction of a design from primitive cells, and organizing data about alternative design representations and versions. Programs to provide a tailored interface to design data are also provided. The system simplifies the rapid construction of new design tools by taking responsibility for design data management.

Patent
18 Feb 1982
TL;DR: In this article, a data receiver providing an intelligent interface for a hand held computerized data entry terminal to communicate over telephone lines with a host computer is presented, where the data receiver has multiple microprocessor control receiver line cards connected to telephone lines and interconnected to interface with the host computer.
Abstract: A data receiver providing an intelligent interface for a hand held computerized data entry terminal to communicate over telephone lines with a host computer. The data receiver has multiple microprocessor control receiver line cards connected to telephone lines and interconnected to interface with the host computer. Each line card includes a system program in a nonvolatile area of memory and a customer application program in volatile area of memory. The data receiver answers the telephone, checks for errors and provides progress tones over the telephone line. When connected to a data entry terminal, the data receiver sets the baud rate, determines the line card protocol, reformats the data in accordance with the customer specifications and hands the data off to the host computer. A remote service computer may be connected to each line card to update the customer application program in the data receiver as well as perform diagnostic and testing routines over the telephone line.

Journal ArticleDOI
TL;DR: This Method Provides Both a Basic Approach and Some Powerful New Tools to Aid in Dialogue Programming.
Abstract: How Should One Approach the Design of an Interactive Interface? This Method Provides Both a Basic Approach and Some Powerful New Tools to Aid in Dialogue Programming.

Patent
Peter A. Reali1
16 Jun 1982
TL;DR: In this paper, the authors proposed a data line interface providing a parallel to serial conversion technique for selectively increasing serial data transmission rates, which utilizes a double buffer receiver circuit to determine when to speed up the destination transmission clock.
Abstract: This invention is a data line interface providing a parallel to serial conversion technique for selectively increasing serial data transmission rates. The data line interface receives a 16-bit data word or signal from a TDM bus and transmits it serially to one of a plurality of data terminal interfaces depending on which one is selected. The invention utilizes a double buffer receiver circuit to determine when to speed up the destination transmission clock. The asynchronous data line interface looks at the value of each of the bits in the data word by sampling the center of each bit. However, during the stop bit, it will not look at the value after sampling the center. Thus, during the time that would have been devoted to the last half of the stop bit, a new start bit may be accepted, allowing the speed up of data to occur.

Patent
04 Jun 1982
TL;DR: In this article, a video casette recorder (hereinafter referred to as "VCR") backup controller that can be installed in a S-100 bus system which is compatible with NTSC, PAL and SECAM systems is presented.
Abstract: The present invention is a video casette recorder (hereinafter referred to as "VCR") backup controller that can be installed in a S-100 bus system which is compatible with NTSC, PAL and SECAM systems. The controller provides temporary storage and control capability for the S100 interface bus system. The controller organizes the data into data blocks and synchronizes the data to TV signals during the write mode. The control further replicates data for error detection in the read and write modes.

Patent
William H. Shenk1
29 Apr 1982
TL;DR: In this article, a method and apparatus for addressing a peripheral interface by mapping into the memory address space of a processor contained in a peripheral controller is presented, where the processor is placed in a wait state as each unit of data is transferred and a watch dog timer is provided to detect any transfer that is not completed within the normal response time of the interface.
Abstract: A method and apparatus for addressing a peripheral interface by mapping into the memory address space of a processor contained in a peripheral controller. The processor in the peripheral controller initializes interface logic within the peripheral controller and in the host system peripheral interface logic to which the peripheral controller is attached to either transmit or receive a block of data. Once initialized, units of data are transmitted across the interface between the peripheral controller and host system using a strobe and acknowledge signal to indicate when data can be taken or placed on data lines. The processor is placed in a wait state as each unit of data is transferred and a watch dog timer is provided to detect any transfer that is not completed within the normal response time of the interface.

Journal ArticleDOI
TL;DR: An integrated micro-liquid chromatograph/mass spectrometer (micro-LC/MS) system capable of performing routine determinations for 1--10 ng of drugs and their metabolites extracted from biological fluids is described.
Abstract: We describe an integrated micro-liquid chromatograph/mass spectrometer (micro-LC/MS) system capable of performing routine determinations for 1--10 ng of drugs and their metabolites extracted from biological fluids. The micro-LC is constructed from conventional "high-performance" liquid-chromatographic instrumentation by using commercially available components. The mass spectrometer is operated in the chemical ionization mode. The direct liquid introduction micro-LC/MS interface can be constructed from commercially available materials. Chromatographic and mass spectral results demonstrate the ability of the micro-LC and micro-LC/MS system to separate and determine multiple components in standards of trace concentrations and in equine urinary extracts. The stability and sensitivity of this micro-LC/MS system are demonstrated through determinations of trichlormethiazide.

Patent
01 Jul 1982
TL;DR: In this paper, a method and associate apparatus for providing a scanner interface circuit for a universal multi-station document inserter having a plurality of document feeder stations has been proposed.
Abstract: A method and associate apparatus for providing a scanner interface circuit for a universal multi-station document inserter having a plurality of document feeder stations has a central processor which stores a supervisory program and scanner interface circuits associated with at least some of the feeder stations. Each scanner interface circuit has a unique address, a portion of which is shared with that of its associated feeder station and a distributed processor which stores a scanner program containing instructions for scanning coded documents. The scanner circuit, in response to address signals received from the central processor, scans the coded document and provides document present and end of collation signals to the central processor. A programmable counter is provided in the scanner circuit to provide timing signals for reading codes on coded documents.

Proceedings ArticleDOI
15 Mar 1982
TL;DR: This project starts from the assumption that speech recognition hardware will never be 100% accurate, and explores other techniques to increase the usefulness (i.e., the “effective accuracy”) of such a system.
Abstract: “Put That There” is a voice and gesture interactive system implemented at the Architecture Machine Group at MIT. It allows a user to build and modify a graphical database on a large format video display. The goal of the research is a simple, conversational interface to sophisticated computer interaction. Natural language and gestures are used, while speech output allows the system to query the user on ambiguous input.This project starts from the assumption that speech recognition hardware will never be 100% accurate, and explores other techniques to increase the usefulness (i.e., the “effective accuracy”) of such a system. These include: redundant input channels, syntactic and semantic analysis, and context-sensitive interpretation. In addition, we argue that recognition errors will be more tolerable if they are evident sooner through feedback and easily corrected by voice.

Patent
10 Jun 1982
TL;DR: An industrial control, communication and information system in which a speech synthesis device produces an analog speech waveform from digital data stored in a memory under control of a microprocessing unit and is interfaced to a source of control or speech selection signals by an interface system is described in this paper.
Abstract: An industrial control, communication and information system in which a speech synthesis device produces an analog speech waveform from digital data stored in a memory under control of a microprocessing unit and is interfaced to a source of control or speech selection signals by an interface system. The interface system uses the input switch closure to generate a signal to switch on power to the logic and other electronic circuits and protects the internal logic from harsh external electrical conditions such as transients and the like and eliminates false inputs and the effects of switch bounce.

Book
01 Jan 1982
TL;DR: Direct, parallel and ASP methods, Iterative methods, and special approaches for solving Ax = b on ASP are described.
Abstract: Functional description of some parallel systems.- Alternating sequential/parallel ASP-systems.- Interface.- On direct solution of Ax = b.- Direct, parallel and ASP methods.- Iterative methods.- Special approaches for solving Ax = b on ASP.- Other problems of linear algebra.- The case study - EPOC.

Journal ArticleDOI
TL;DR: This paper presents a fault-tolerant distributed system designed for real-time control applications (REBUS), which is one of the research basis of the industrial real- time system MODUMAT 800.
Abstract: This paper presents a fault-tolerant distributed system designed for real-time control applications (REBUS), which is one of the research basis of the industrial real-time system MODUMAT 800. It is made up of functional units, i.e., programmable multiloop regulators and operator displays, linked together by a communication structure. The communication hardware consists of a set of serial bus interface boards, one per functional unit, loosely coupled together by a double serial bus and linked to their functional units by a private parallel bus.

Patent
24 Feb 1982
TL;DR: In this article, the authors present an arrangement whereby any one of a plurality of different or similar interface circuit cards can be located into any number of slots or holding means of a data processing system, without pre-assignment thereto, and whereby each of the interfaces will generate its own diagnostic routine signals and signals representing its own identification, the latter signals being used in a selfconfiguration operation of the system.
Abstract: The present disclosure is directed to an arrangement whereby any one of a plurality of different or similar interface circuit cards can be located into any one of a number of slots or holding means of a data processing system, without preassignment thereto, and whereby each of the interface circuit cards will generate its own diagnostic routine signals and signals representing its own identification, the latter signals being used in a self-configuration operation of the system and whereby an arbiter means is employed to determine, among the plurality of interface circuits, which has the highest priority in the event more than one of said interface circuits is requesting the use of a common data flow path.