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Showing papers on "Interface (computing) published in 1983"


Book
09 Mar 1983
TL;DR: A general, introductory, up-to-date text on the interface between people and systems, geared for the advanced undergraduate or graduate major in psychology, industrial engineering, computer science, and business.
Abstract: A general, introductory, up-to-date text on the interface between people and systems, geared for the advanced undergraduate or graduate major in psychology, industrial engineering, computer science, and business. Integrates theory and practical implications of human behavior in terms of theoretical models. Covers non-traditional contemporary topics and uses a detailed description of human capabilities as a necessary precursor to the study of human-machine systems. Emphasizes the cognitive aspects of the person-system relationship.

310 citations


Patent
30 Aug 1983
TL;DR: In this paper, a multi-processor computer system is disclosed in which processing elements, memory elements and peripheral units can be physically added and removed from the system without disrupting its operation or necessitating any reprogramming of software running on the system.
Abstract: A multi-processor computer system is disclosed in which processing elements, memory elements and peripheral units can be physically added and removed from the system without disrupting its operation or necessitating any reprogramming of software running on the system. The processing units, memory units and peripheral units are all coupled to a common system bus by specialized interface units. The processing elements are organized into partially independent groups each of which has dedicated interface units, but the processing units share system resources including peripherals and the entire memory space. Within each processing element group at any one time, group supervisory tasks are performed by one of the processors, but the supervisor function is passed among the processors in the group in a sequence to prevent a fault in one processor from disabling the entire group. Communication between groups is accomplished via the common memory areas. The transfer of the supervisor function from processor to processor is performed by registering the supervisor's identity in a common area in one of the dedicated interface units which area is accessable to all processors in the associated group and using program interrupts generated in the common interface unit to communicate between group processors. Access to the common system bus by the processing elements is controlled by the associated interface units by means of a combination serial/parallel arbitration scheme which increases arbitration speed without requiring a full complement of request/grant leads.

216 citations


Journal ArticleDOI
D. Verne Morland1
TL;DR: This paper provides a set of guidelines for the design of software interfaces for video terminals that describes how to optimize screen layouts, interactive data entry, and error handling, as well as many practical techniques for improving man-machine interaction.
Abstract: This paper provides a set of guidelines for the design of software interfaces for video terminals. It describes how to optimize screen layouts, interactive data entry, and error handling, as well as many practical techniques for improving man-machine interaction. Emphasis is placed on factors relating to perceptual and cognitive psychology rather than on gross physiological concerns. Ways in which interfaces can be evaluated to improve their user friendliness are also suggested. The author summarizes many ideas that can be found in other, more comprehensive texts on the subject. These guidelines will provide practicing software designers with useful insights into some of today's principal terminal interface design considerations.

172 citations


Patent
28 Mar 1983
TL;DR: In this paper, the authors present a microprocessor-controlled interface for allowing any digital host computer to receive serial digital data from any instrument wherein (a) the time at which data from the instrument is to enter the host computer, and (b) the logical structure of the digital data entering a host computer are controlled by instructions from the computer to the microprocessor and wherein physical formatting incompatibilities between the host computers and the instrument and (c) the communicating of prohibited characters from the instruments to the computer and vice versa are avoided.
Abstract: @ A microprocessor-controlled interface for permitting any digital host computer to receive serial digital data from any instrument wherein (a) the time at which digital data from the instrument is to enter the host computer and (b) the logical structure of the digital data entering the host computer are controlled by instructions from the host computer to the microprocessor and wherein (a) physical formatting incompatibilities between the host computer and the instrument and (b) the communicating of prohibited characters from the instrument to the host computer and vice versa are avoided. The timing control and logical structure of the digital data are effected by directing data from the instrument into a scratchpad memory, which is divided into records pursuant to instructions from the host computer, the contents of the scratchpad memory being sent to the host computer upon a corresponding instruction therefrom. A terminal for communicating with the host computer and the instrument may be included. Physical formatting discrepancies are avoided by translating inputs to the interface into a common physical format and translating outputs from the interface into the physical format of the instrument, host computer, or terminal which is receiving such outputs. Because about 90% of all current digital devices are formatted in a manner translatable by a selected one of three translator elements, a small number of interfaces formatted for a specific host computer (and terminal) can be used with a vast number of different instruments by accounting only for the instrument physical format and associated prohibited characters. Instructions, selected from a set of distinct instructions, which are sent from the computer to the microprocessor determine (a) whether a terminal-host computer, instrument-host computer, or terminal-instrument communication channel is to be open, (b) whether all channels are to be closed, and (c) when other communication transfer operations are to be executed. Terminal-host computer communications can occur at least substantially simultaneously with the directing of digital data from the instrument to the scratchpad memory.

163 citations


DOI
01 Jan 1983
TL;DR: The CONIC architecture for DCCS is described, concentrating on the software structure but also briefly describing the physical architecture designed to support a CONIC system.
Abstract: Distributed computer control systems (DCCS) have a number of potential advantages over centralised systems, especially where the application is itself physically distributed. A computer station can be placed close to the plant being controlled, and a communications network used to enable the stations to communicate to co-ordinate their actions. However, the software must be carefully designed to exploit the potential advantages of distribution. In the paper, the CONIC architecture for DCCS is described, concentrating on the software structure but also briefly describing the physical architecture designed to support a CONIC system. The software structure emphasises the distinction between the writing of individual software components and the construction and configuration of a system from a set of components. A modular structure is used to separate programming from configuration. Typed entry and exit ports clearly define a module interface which, like the plugs and sockets of hardware components, permit modules to be interconnected in different ways. On-line modification and extension of the system is supported by permitting the dynamic creation and interconnection of modules. Message-passing primitives are provided to permit modules to co-ordinate and synchronise control actions.

142 citations


Patent
06 Dec 1983
TL;DR: In this article, the closest interface card of each local bus responds by transmitting information from its identification ROM to the requesting local processor, which then assigns an address to the closest interfaces card, and then automatically sets circuitry that enables the next closest interfaces to respond to the initial address.
Abstract: In a computer network having a system bus, a system processor connected to the system bus, and a plurality of local processors each connected to a respective local bus each having a plurality of interface cards attached thereto, each interface card includes an identification ROM. Each interface card responds to an initial reset signal enabling that interface card to respond to the same initial address. Each local processor outputs that initial address. The closest interface card of each local bus responds by transmitting information from its identification ROM to the requesting local processor, which then assigns an address to the closest interface card, which then automatically sets circuitry that enables the next closest interface card to respond to the initial address. The procedure is repeated to assign unique addresses to all of the interface cards.

121 citations


Patent
14 Sep 1983
TL;DR: In this paper, a method and apparatus for protecting computer software using an active coded hardware apparatus which is adapted to be connected by an interface connector to a communications port of a computer is described.
Abstract: A method and apparatus are provided for protecting computer software using an active coded hardware apparatus which is adapted to be connected by an interface connector to a communications port of a computer. The computer is directed by a coded software program in which a small section of the code of the computer software interrogates the communications port periodically to determine if the active coded hardware device is present and connected. The active coded hardware device has a permanently established preset code on an active presettable counter circuit which code is transmitted when interrogated. If the active coded hardware device is present when interrogated and the correct code returned through the communications port of the computer, the program is permitted to continue insuring that the software is properly protected at all times. The active coded hardware device with its particular code and circuitry are sealed in epoxy as a deterrent against tampering. In order to violate the hardware it would be necessary to construct a duplicate of the hardware device in order to run a second copy of the software. Since the device is active containing electrical logical elements the degree in duplicating the device and its function without the benefit of circuit diagrams will be greater than the software itself. The particular hardware may be used alone or will permit daisy-chaining allowing 2, 3 or even an entire family of other elements with their own individual codes to operate simultaneously and at the same time permit computer peripherals to remain connected to the same port. A variety of time and logic elements may be added to the basic configuration in order to increase the difficulty of duplicating or violating the system.

119 citations


Patent
03 Nov 1983
TL;DR: In this article, a serial communication protocol is proposed for data transfer between the microcomputer of the receiver and an addressable controller-decoder designed for use in conjunction therewith.
Abstract: An interface permits bi-directional data signal transfer between the microcomputer of the receiver and an addressable controller-decoder designed for use in conjunction therewith. The data transfer permits expansion of the receiver functions and future adaptability to a variety of satellite services. The interface transfers messages from the microcomputer representing keystrokes received from the receiver keyboard and the status of the various receiver components and receives commands from the decoder for regulating the operation of the receiver components and for the transfer of specific information. The data transfer is achieved through a serial communication protocol which facilitates the interaction between units.

74 citations


Book
01 May 1983
TL;DR: In this paper, the authors describe the architecture of the i432 Interface Processor and its use as a key component in the Peripheral Subsystem Interface for the Intel 432 System.
Abstract: The architecture study …begins in Chapter 4 where a number of topics related to object structures and object addressing are treated. Chapter 5 introduces the hardware and system software support for interprocess communication. Here the i432 Port Objects and port operations (SEND, RECEIVE, etc.) are introduced and illustrated. Chapter 6 revisits the architectural and Ada-language support for object structure, emphasizing type management and access control. Many features of the supporting operating system, known as iMAX, especially several of its important “user-interfaces,” are introduced beginning with Chapter 5. The importance of input/output peripheral subsystems and their relationship with the central object-based architecture of the i432 system is recognized by treating this topic separately in Chapter 7. This chapter introduces the reader to the architecture of the i432 Interface Processor and its use as a key component in the Peripheral Subsystem Interface for the Intel 432 System. A message-based model for input/output using this interface is also introduced, along with a discussion of abstractions for I/O device interfaces, both asynchronous and synchronous. The topics of process management, memory management, and object filing, which ma y be of primary interest to system developers and architects, are treated in Chapters 8, 9, and 10. Each chapter describes the iMAX implementations of these services and the user interfaces to these facilities. In the case of process management an iMAX provided “template” is described whose use enab les system programmers to implement their own process managers as needed. Chapter 9 describes the extensive memory management facilities of iMAX and the supporting hardware. These include facilities to support the stack and heap memory resources required, for example, by executing Ada programs. In addition, memory management supports an on-the-fly garbage collector, dynamic memory compaction, and, where configured, a virtual memory management subystem. Chapter 10, as already noted, provides a complete introduction to object filing as it is currently planned. —From the Author's Summary

67 citations


Patent
06 Dec 1983
TL;DR: In this article, a computer system including a first processor and a plurality of removable interface circuits is operated by storing hardware descriptors for each interface circuit, each hardware descriptor including a name and an attribute of each component of the interface.
Abstract: A computer system including a first processor and a plurality of removable interface circuits is operated by storing hardware descriptors for each interface circuit, each hardware descriptor including a name and an attribute of each component of the interface. Software templates describing each data structure and pointers to code to be executed to build software objects corresponding to each component contained on any interface board in the system are stored, which code is executed to building such software objects. The hardware descriptors are utilized to obtain lists of components of each interface from a data base, using names of such components to obtain software templates corresponding to the named component and pointing to software that utilizes the software template to build the software object representing a function that can be performed by the component, assigns a name to that software object and entering the name and corresponding software object into the data base.

56 citations


Patent
09 May 1983
TL;DR: In this article, an interchangeable keyboard application module is connected to a video monitor module in a computer terminal to provide sequences of processor instructions and a keyboard for performing a plurality of selectable applications.
Abstract: An interchangeable keyboard application module is connected to a video monitor module in a computer terminal to provide sequences of processor instructions and a keyboard for performing a plurality of selectable applications. The video monitor module includes a CRT display, a serial I/O interface and a processor that processes characters received through the serial I/O interface for display on the CRT screen whether or not the application module is attached. The processor in the video monitor module detects the connection of the application module, and then selects its instructions from a memory in the application module first, to prompt the selection of a mode of operation for the terminal, and second to execute the selected mode of operation. The application module uses a plurality of keyboard overlays, each corresponding to a respective mode of operation. In a specific embodiment two of the modes of operation are programming applications related to programmable controllers.

Patent
05 Oct 1983
Abstract: A computer inputed with a data base of potential call recipients and having an EIA RS-232 Data Communication Equipment interface drives an auto-call unit or dialer through a format conversion device to be compatible with the dialer EIA RS-366 automatic calling equipment interface. A line signalling device monitors the dial stream for conference connection commands and establishes a voice connection between the computer, an external or remote station and an internal or local extension upon receipt of such command. The computer thereupon disengages itself from the conference connection while maintaining the same between the remote and local stations. While a previously established conference connection may continue to be in progress, the computer is free to process a new sequence of dial digits from the data base to establish a conference connection between a next successive group of handsets in an automated, high speed repetitive manner.

Journal ArticleDOI
TL;DR: The COUSIN project of Carnegie–Mellon University is developing command interfaces which appear more friendly and supportive to their users, using a form-based model of communication, and incorporating error correction and on-line help.
Abstract: Currently available interactive command interfaces often fail to provide adequate error correction or on-line help facilities, leading to the perception of an unfriendly interface and consequent frustration and reduced productivity on the part of the user. The COUSIN project of Carnegie–Mellon University is developing command interfaces which appear more friendly and supportive to their users, using a form-based model of communication, and incorporating error correction and on-line help. Because of the time and effort involved in constructing truly user-friendly interfaces, we are working on interface system designed to provide interfaces to many different applica-tion systems, as opposed to separate interfaces to individual applications. A COUSIN interface system gets the information it needs to provide these services for a given application from a declarative description of that application's communication needs.

Journal ArticleDOI
TL;DR: The more complex the physical system, the greater the likelihood that hands-on operator training can damage it, and a computer model like Steamer offers a somewhat safer alternative.
Abstract: The more complex the physical system, the greater the likelihood that hands-on operator training can damage it. A computer model like Steamer offers a somewhat safer alternative.

Patent
14 Mar 1983
TL;DR: An electronic lock system as discussed by the authors includes a lock which is selectively lockable and unlockable in response to an input signal; and buffer means for (1) receiving user commands and generating the input signal, identifying certain parameters incident to the locking or unlocking of said lock and transmitting said parameters.
Abstract: An electronic lock system includes a lock which is selectively lockable and unlockable in response to an input signal; and buffer means for (1) receiving user commands and generating the input signal only in response to one or more preselected user commands, (2) identifying certain parameters incident to the locking or unlocking of said lock and (3) transmitting said parameters. A microprocessor includes a memory coupled to the buffer means for recording the parameters, and a central processor selectively interrogates the microprocessor and records the parameters. An interface is coupled between the microprocessor and the central processor and transmits the parameters from the microprocessor memory to the central processor in response to the interrogation.

01 Mar 1983
TL;DR: This report revises and enlarges previous compilations of guidelines, and proposes a total of 580 guidelines for design of USI software in six functional areas: data entry, data display, sequence control, user guidance, data transmission, and data protection.
Abstract: : The user-system interface (USI) to computer-based information systems can require a sizable investment in software design. In current practice there is still no coherent methodology for design of USI software, but efforts to establish design guidelines are continuing. This report revises and enlarges previous compilations of guidelines, and proposes a total of 580 guidelines for design of USI software in six functional areas: data entry, data display, sequence control, user guidance, data transmission, and data protection.

Patent
21 Jan 1983
TL;DR: In this article, both priority message transmission and improved acknowledgement protocols are implemented in a multinodal data communication network, which permits the sharing of remote resources by a wide variety of computing devices.
Abstract: A multinodal data communication network permits the sharing of remote resources by a wide variety of computing devices. Data or messages generated at one device may be sent to any or all the other devices sharing a common transmission medium. Message handling capability of the network is increased by the use of a plurality of transmission media connected to the computing devices through interface stages. Both priority message transmission and improved acknowledgement protocols are implemented.

Patent
29 Nov 1983
TL;DR: In this article, a microprocessor controlled mass storage controller is used as an interface for mass storage devices which are shared by a plurality of stand-alone microcomputer systems and data transparency and integrity are achieved through the simulation by the controller of the mass storage device characteristics and responses.
Abstract: A microprocessor controlled mass storage controller is used as an interface for mass storage devices which are shared by a plurality of stand-alone microcomputer systems. The microprocessor controlled mass storage controller has a system interface which maintains communications with a host microcomputer; a dedicated microprocessor which maintains the internal control of the controller and a network interface which maintains an access to the external network. Data transparency and integrity are achieved through the simulation by the controller of the mass storage device characteristics and responses.

Patent
15 Aug 1983
TL;DR: An interface device for connecting a programmable computer to one or more photocopiers and translating computer logic to line signals to the photcopiers and transmitting line signals from the photocopy to the computer is described in this paper.
Abstract: An interface device for connecting a programmable computer to one or more photocopiers and translating computer logic to line signals to the photcopiers and transmitting line signals from the photocopiers to the computer.

Patent
02 Nov 1983
TL;DR: In this article, the disparity between the two binary sequences during selected portions of an image defined by a video signal was introduced, which caused the selected portions to appear to be at a different depth from the non-selected portions.
Abstract: Dynamic random element stereograms are produced on a television receiver or video monitor by an interface circuit that generates first and second binary sequences which are applied to the display so as to display a plurality of pairs of elements, and relative delays are introduced between the two binary sequences during selected portions of an image defined by a video signal so that the disparity between elements of those pairs displayed during the selected portions is different from the disparity between elements displayed during non-selected portions, thereby causing the selected portions to appear to be at a different depth from the non-selected portions.

Journal ArticleDOI
01 Aug 1983
TL;DR: This paper summarizes a recent research project which brings together work from four diverse fields: time-lapse photographic documentation of unit operations such as those found on construction projects; statistical reduction and analysis of data; computer-based simulation modeling; and theories and technologies for the design of interactive human-computer systems.
Abstract: This paper summarizes a recent research project which brings together work from four diverse fields: (1) Time-lapse photographic documentation of unit operations such as those found on construction projects; (2) statistical reduction and analysis of data; (3) computer-based simulation modeling; and (4) theories and technologies for the design of interactive human-computer systems. The objectives are: (1) To permit convenient and economical collection of field data pertaining to construction operations; (2) to enable a user to quantify and analyze the statistical properties of the data captured on film; (3) to give the nonsophisticated user convenient and interactive access to computer-based simulation modeling to explore more productive and economical ways of doing work; and (4) to implement these systems using the best principles for designing the human-computer interface so as to take advantage of the powerful and economical minicomputer, microcomputer, and interactive graphics systems now available. The result of this research is an operable prototype which can be used in practical applications, and which provides a sound foundation for future refinements and extensions.

Journal ArticleDOI
TL;DR: These guidelines presented here are not considered to be exhaustive, and were developed to apply to a specific system, but may be of considerable general interest in such situations.
Abstract: This paper presents, in the form of a case study, guidelines on relevant human factors considerations for use in designing a computer graphics system. Although the guidelines presented here are not considered to be exhaustive, and were developed to apply to a specific system, many of the issues addressed may be of considerable general interest in such situations. Both guidelines extracted from the literature and authors' design observations are presented for each of six principal system components addressed. These components are: the graphics display (color CRT monitor); the man-computer dialogue used for interactive communication (menu selection dialogue); the graphics tablet; an alphanumeric support display (black-and-white CRT monitor); an alphanumeric keyboard for inputing data into the support CRT; and the workspace within which these components are located. This study points out areas requiring further research and experimentation towards the development of man-computer interface guidelines.

Patent
Mark Gerard Hinch1
31 Mar 1983
TL;DR: In this paper, a digital multi-customer data interface for interconnecting a number of customer terminals to a main packet switching network of a local area data transport system that provides data communication services such as interactive video text service between data service vendors and customers.
Abstract: A communication method and digital multi-customer data interface for interconnecting a number of customer terminals to a main packet switching network of a local area data transport system that provides data communication services such as interactive video text service between data service vendors and customers. The digital multi-customer interface utilizes a main processor, control circuit, and multi-customer protocol controller to implement the protocol functions for the communication of packets and control information over individual serial transmission paths. The multi-customer protocol controller comprises a control processor and a formatter circuit for synchronously communicating packets for a plurality of customer terminals via customer line units and customer lines. The control circuit handles communication of all control and status information between the main processor and the customer line units. The control processor includes a shared memory and first-in first-out memories that are used to communicate messages with the main processor. Both processors address the shared memory with logical addresses, and the control processor's logical address space is structured so as to facilitate the use of relative addressing.

01 Aug 1983
TL;DR: A simulator for modeling execution of parallel programs on a mutliprocessor, and a portion of the simulator, known as the "switch model", simulates the exchange of messages among the processors through an interconnection network.
Abstract: This document describes a simulator for modeling execution of parallel programs on a mutliprocessor. The simulator executes a set of programs as if each were run on a separate processor, and compiles statistics for the entire run. a portion of the simulator, known as the "switch model", simulates the exchange of messages among the processors through an interconnection network. The simulator was developed to allow different types of interconnection hardware (e.g. packet switches, crossbars, etc.) to be modelled by simply "plugging in" the appropriate switch model. Applications are programmed as a set of communicating tasks (processes). The interface seen by the applications programmer is discussed, and in particular, the communications mechanism is described in detail. Examples are given. Finally, the implementation of Simon is described.

Patent
05 Dec 1983
TL;DR: In this paper, an interface between the caller and sort is defined, enabling the caller to specify the names of the input and output data sets, the locations of routines to be executed for inputs and outputs, and data areas for status information.
Abstract: A program controlled digital computer is operated according to a utility program, such as a sort program which manages input/output directly (using very efficient execute channel programs (EXCP) or basic sequential access method (BSAM) facilities of the operating system), but in such a way as to provide to the caller (that is, the application program) the status and error information that is required. This is accomplished by defining an interface between the caller and sort enabling the caller to specify the names of the input and output data sets, the locations of routines to be executed for input and output, the locations of routines to be executed upon exit from input/output routines, and data areas for status information. Responsive to the interface, the sort process (1) selectively calls input/output exit routines provided by the caller, passing one record at a time over the interface, or provides to the operating system its own channel program for input/output with respect to a plurality of record, and (2) provides to the operating system information enabling the operating system to communicate error and status information directly to the application program.

Journal ArticleDOI
Richard G. Casey1, C. R. Jih1
TL;DR: A previously developed classification technique, based on decision trees, has been extended in order to improve reading accuracy in an environment of considerable character variation, including the possibility that documents in the same font style may be produced using quite different print technologies.
Abstract: A low-cost optical character recognition (OCR) system can be realized by means of a document scanner connected to a CPU through an interface. The interface performs elementary image processing functions, such as noise filtering and thresholding of the video image from the scanner. The processor receives a binary image of the document, formats the image into individual character patterns, and classifies the patterns one-by-one. A CPU implementation is highly flexible and avoids much of the development and manufacturing costs for special-purpose, parallel circuitry typically used in commercial OCR. A processor-based recognition system has been investigated for reading documents printed in fixed-pitch conventional type fonts, such as occur in routine office typing. Novel, efficient methods for tracking a print line, resolving it into individual character patterns, detecting underscores, and eliminating noise have been devised. A previously developed classification technique, based on decision trees, has been extended in order to improve reading accuracy in an environment of considerable character variation, including the possibility that documents in the same font style may be produced using quite different print technologies. The system has been tested on typical office documents, and also on artificial stress documents, obtained from a variety of typewriters.

Patent
17 Nov 1983
TL;DR: In this article, an improved computer based education system maintains rapid response to user input without limits to the number of stations by incorporating a dedicated processor at each user station so that the user station receives executable code as opposed to a display map.
Abstract: An improved computer based education system maintains rapid response to user input without limits to the number of stations. The system incorporates a dedicated processor at each user station so that the user station receives executable code as opposed to a display map. To support plural users a cluster subsystem is provided interconnected to the user stations via a high speed bidirectional communication subsystem. The cluster also includes a mass storage device, a high speed buffer, communications interface and at least one processor for serving user requests.

Patent
06 Jun 1983
TL;DR: An interface for installation in a printer housing, to provide an adaptable connection between the printer and any of a variety of computers and to allow the printer- interface combination to emulate any of the different printers having different protocols for printer control codes as discussed by the authors.
Abstract: An interface for installation in a printer housing, to provide an adaptable connection between the printer and any of a variety of computers and to allow the printer- interface combination to emulate any of a number of different printers having different protocols for printer control codes. The interface can be conveniently switched, either manually or under computer control, to adapt to a different control code protocol, to select one of several different standards for digital data transfer, to select a different baud rate for receiving serial data, or to adapt automatically to a transmission baud rate. Manual switches also permit reversal of the polarity of selected signals used in the transmission of data, to adapt to the conventions used in a selected computer. The interface also optionally performs or initiates a number of print formatting control functions.

Patent
15 Sep 1983
TL;DR: In this paper, an interface is connected between an OCIA type port and a mailing system peripheral, such as a weighing cell, for receiving serial data input words comprising 8 serial data bits and an end-of-message (EOM) bit.
Abstract: An interface is connected between an OCIA type port and a mailing system peripheral, such as a weighing cell The interface comprises an input data circuit, operatively connected to a serial data input line and to an associated input clock line, for receiving serial data input words comprising 8 serial data bits and an end-of-message (EOM) bit The input circuit converts the serial input words into parallel form and transfers them to a programmable interface controller The interface also includes an output circuit for transforming parallel output words from the interface controller into serial format The output circuit is operatively connected to a serial data output line and an output data clock line from the OCIA type port When an output data word is loaded into the output circuit the output line is forced to a predetermined logical level signalling the port the data is available The port then provides a series of clock pulses to shift the data word out from the output circuit When the data word is shifted out from the output circuit the circuit returns the output line to the initial state removing the data available signal The programmable interface controller is responsive to a series of input words as messages from the OCIA type port The interface controller is operatively connected to a weighing cell for providing weight and status information, and in response to a particular message, returns a message to the OCIA type port providing weight information and status information In response to other messages, the programmable interface controller enters certain error routines, clears the interface to initial conditions, or resets the weighing cell to zero The messages are provided in a predetermined format having header words descriptive of the meassage contents and ending in an error check word The EOM bit of the error check word is of an opposite logical level from the EOM bit of the other words in a message and so indicates the end of the message

Journal ArticleDOI
TL;DR: In concentrating on developing the computer's internal electronic communicative abilities, we have neglected the interface between the machine's display surface and the human viewer as discussed by the authors, which is the most important interface between a human and a computer.
Abstract: In concentrating on developing the computer's internal electronic communicative abilities, we have neglected the interface between the machine's display surface and the human viewer.