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Showing papers on "Interface (computing) published in 1985"


Journal ArticleDOI
01 Apr 1985
TL;DR: The VIDEOPLACE System combines a participant's live video image with a computer graphic world and coordinates the behavior of graphic objects and creatures so that they appear to react to the movements of the participant's image in real-time.
Abstract: The human-machine interface is generalized beyond traditional control devices to permit physical participation with graphic images. The VIDEOPLACE System combines a participant's live video image with a computer graphic world. It also coordinates the behavior of graphic objects and creatures so that they appear to react to the movements of the participant's image in real-time. A prototype system has been implemented and a number of experiments with aesthetic and practical implications have been conducted.

384 citations


Patent
24 May 1985
TL;DR: In this article, a local area network for interconnecting terminals and other users and data processing systems and other service providers over a communications link is described. But the authors focus on the use of a service session between a user and a service provider.
Abstract: A local area network for interconnecting terminals and other users and data processing systems and other service providers over a communications link. The users and providers connect to the communications link by means of interface units each of which may connect to several users or providers. The interface units communicate over the communications link by means of messages. When a user requires the use of a service, the interface unit establishes a virtual circuit between it and the interface unit connected to the service provider and a service session which allows the user and the service provider to communicate over the virtual circuit. If several users connected to the one interface unit as the first user require services provided by providers which connected to the same interface unit as the first provider, they communicate in sessions over the same virtual circuits. The session messages are accumulated into single virtual circuit messages that are acknowledged in unison by the receiving interface unit. Each virtual circuit in the users' interface units includes a timer which reset when a message is transmitted over the virtual circuit and a data waiting flag set whenever data is present to be transitted over the virtual circuit. The interface units are inhibited from transmitting over a virtual circuit unless the timer has timed out and the data waiting flag is set.

221 citations


Book
26 Mar 1985
TL;DR: The Structure of Analysis and Measurement Function/Task Analysis Design-Aiding Techniques Computerized Methods Human Reliability Analysis and Prediction Training Analysis Evaluation of the Man-Machine Interface Evaluation ofThe Man- machine System Subjective and Objective Methods.
Abstract: The Structure of Analysis and Measurement Function/Task Analysis Design-Aiding Techniques Computerized Methods Human Reliability Analysis and Prediction Training Analysis Evaluation of the Man-Machine Interface Evaluation of the Man-Machine System Subjective and Objective Methods Self-Report Techniques Application Techniques Statistical Techniques Glossary of Abbreviations Index.

217 citations


Journal ArticleDOI
01 Apr 1985
TL;DR: In this paper, performance and subjective reactions of 76 users of varying levels of computer experience were measured with seven different interfaces representing command, menu, and iconic interface styles, and the results suggest three general conclusions: there are large usability differences between contemporary systems, there is no necessary tradeoff between ease of use and ease of learning, interface style is not related to performance or preference (but careful design is).
Abstract: Performance and subjective reactions of 76 users of varying levels of computer experience were measured with 7 different interfaces representing command, menu, and iconic interface styles. The results suggest three general conclusions:there are large usability differences between contemporary systems,there is no necessary tradeoff between ease of use and ease of learning,interface style is not related to performance or preference (but careful design is).Difficulties involving system feedback, input forms, help systems, and navigation aids occurred in all styles of interface: command, menu, and iconic. New interface technology did not solve old human factors problems.

171 citations


01 Jan 1985
TL;DR: A personalized integrated telecommunications management system is described; it is composed of both graphical and audio interfaces to a number of telecommunication utilities.
Abstract: A personalized integrated telecommunications management system is described; it is composed of both graphical and audio interfaces to a number of telecommunication utilities. This approach utilizes a general purpose computer with a color display and speech-processing board to function as a conversational answering machine, voice or text electronic mail terminal, and on-line telephone directory with repertory dialing.

168 citations


Patent
16 Dec 1985
TL;DR: In this article, a microprocessor-controlled interface for a cellular radio telephone system enables the user to communicate with such system by means of conventional telephony devices by using a standard telephone outlet communicates with the transceiver logic bus through a micro-processor.
Abstract: A microprocessor-controlled interface for a cellular radio telephone system enables the user to communicate with such system by means of conventional telephony devices. A standard telephone outlet communicates with the transceiver logic bus through a microprocessor. Switches are provided for controlling the audio path between the handset and the transceiver of the mobile, vehicular-mounted unit in response to the status of the interface outlet. The microprocessor interprets both the transceiver bus and various signals generated by the operation of a device that is plugged into the interface so that the operation of the device is rendered fully compatible with the cellular system. The microprocessor is programmed to decode known manufacturer protocols whereby the interface is able to render itself compatible with various equipment types.

140 citations


Patent
09 Sep 1985
TL;DR: In this paper, a DTMF transceiver is connected to a programmed microprocessor unit so that a caller may key in instructions or information to obtain a price for a selected security or commodity in a synthesized human voice.
Abstract: Apparatus for use by a broker including a memory for holding a number of market prices each corresponding to a security or a commodity. A speech synthesizer provides that prices may be quoted to customers in a synthesized human voice. A telephone interface connects outside calls to a DTMF transceiver which is in turn connected to a programmed microprocessor unit so that a caller may key in instructions or information. Instructions for price quotations result in the price for the selected security or commodity being reported to the caller in a synthesized human voice. The apparatus is also capable of monitoring price triggers and reporting violations of price triggers by calling a predetermined telephone number and reporting the violation in a synthesized human voice. Also, price requests are logged and the unit is responsive to an instruction keyed in by a broker through his telephone to report the contents of the log over the telephone in a synthesized human voice.

104 citations


Patent
James P. Sullivan1
20 Aug 1985
TL;DR: In this paper, a dynamic address assignment system stores a unique address code in each interface device following system startup following system start up, and the interface device thereafter stores and uses the unique address codes in transmitting and receiving messages on the bus.
Abstract: For a computer system having peripheral devices coupled to a common bus through interface devices transmitting and receiving messages containing an address code matching a stored address code, a dynamic address assignment system stores a unique address code in each interface device following system startup. On system start up each interface device stores a type number and an adjustable serial number, type numbers for peripheral devices of the same type being identical while serial numbers for all peripheral devices of the same type are adjusted to different values. A master controller transmits to all peripheral devices a series of universally addressed count commands. Each interface device counts the count commands and, when the count reaches a poll number determined by the unique combination of stored type and serial numbers, requests and obtains a unique address code from the host computer. The interface device thereafter stores and uses the unique address code in transmitting and receiving messages on the bus.

95 citations


Patent
06 May 1985
TL;DR: In this article, a distributed data processing system comprising a plurality of individual cells coupled by a local area network (LAN) is proposed, where each cell may comprise one or more processes and/or contexts.
Abstract: A multi-processor, multi-tasking virtual machine comprises processes, messages, and contexts. Processes communicate only through messages. Contexts are groups of related processes. The virtual machine is implemented in a distributed data processing system comprising a plurality of individual cells coupled by a local area network (LAN). Each cell may comprise one or more processes and/or contexts. A network interface module (NIM) provides the interface between any individual cell and the LAN. To facilitate message transmission between processes resident on different cells, each NIM is provided with tables identifying the locations of resident and non-resident processes, respectively. Cells may be added to or deleted from the LAN without disrupting the LAN operations.

90 citations


Journal ArticleDOI
TL;DR: This article demonstrates how control issues can be handled in the context of Logical Sensor System Specification to include a control mechanism which permits control information to flow from more centralized processing to more peripheral processes and be generated locally in the logical sensor.
Abstract: Logical Sensor System Specification (LSS) has been introduced as a convenient means for specifying multi-sensor systems and their implementations. In this article we demonstrate how control issues can be handled in the context of LSS. In particular, the Logical Sensor Specification is extended to include a control mechanism which permits control information to (1) flow from more centralized processing to more peripheral processes, and (2) be generated locally in the logical sensor by means of a micro-expert system specific to the interface represented by the given logical sensor. Examples are given including a proposed scheme for controlling the Utah/MIT dextrous hand.

80 citations


Journal ArticleDOI
TL;DR: An electronic interface is described that allows high speed plotting of points on an oscilloscope under the control of a computer to permit inexpensive computers of modest performance to produce complex displays which could otherwise be produced only by costly high speed computer graphics systems.

Patent
31 May 1985
TL;DR: In this paper, a video stream processing system comprising a novel modular family of image processing and pattern recognition submodules is presented, which can be cascaded and paralleled to produce complex special purpose image processing systems which can operate at video or near video data rates.
Abstract: A video stream processing system comprising a novel modular family of image processing and pattern recognition submodules, the submodules utilize a unique system signalling and interface protocol, and thus can be cascaded and paralleled to produce complex special purpose image processing systems which can operate at video or near video data rates. A stream of digitized pixel data is pipelined through a variety of submodules to support a wide variety of image processing applications. A common video interface provides for handling pixel data in the video signal path and a processor interface allows communication to any modern microprocessor for overall system control, for optional addition image processing and for defining options within each submodule.

Patent
25 Feb 1985
TL;DR: In this paper, a plurality of peripheral interface devices each executing only a single communication protocol conversion is used to reduce the processing capacity required for each such device, and a single network wide uniform communication protocol is incorporated within each apparatus.
Abstract: An apparatus for efficiently executing communication protocol conversions includes a plurality of peripheral interface devices each executing only a single communication protocol conversion whereby the processing capacity required is reduced for each such device. In addition, a single network wide uniform communication protocol is incorporated within each apparatus.

Patent
Bruce D. Gavril1
22 Mar 1985
TL;DR: A transportable bus control architecture for single-chip microprocessors consists of an interface control unit that is logically independent of the associated co-resident, common clock-driven microprocessing unit as discussed by the authors.
Abstract: A transportable bus control architecture for single-chip microprocessors consists of an interface control unit that is logically independent of the associated co-resident, common clock-driven microprocessing unit. This independence allows the interface control unit logic to be used with a variety of microprocessing units. The interface control unit presents an external appearance that is compatible with the peripheral devices of a specific microprocessor referred to as the "compatible microprocessor", thereby making available to an associated co-resident microprocessing unit the support devices of the compatible microprocessor. The interface control unit can also access other external devices not related and transparent to the devices of the compatible microprocessor. The interface control unit is logically divided into an execution section and a control section. The execution section is controlled by the control section and comprises various registers, latches, multiplexers, logic, and data and address paths that provide communication between the co-resident microprocessing unit and off-chip devices. The control section of the interface control unit executes commands from the co-resident microprocessing unit and also performs bus arbitration, interrupt, and external reset functions. Bus cycles are memory-access or service, depending on the command from the co-resident microprocessing unit. Service cycles perform the interrupt acknowledge functions and other sense and control functions requested by the co-resident microprocessing unit. These sense and control functions have the special feature of being pin-programmable and pin-readable by the microprocessing unit. All action initiated by commands from the microprocessing unit elicits a comprehensive status response from the interface control unit.

Patent
Steven C. Greer1
26 Aug 1985
TL;DR: In this paper, a general purpose computer test interface is used to test various types of computers having differing input/output characteristics, which includes a control unit which is responsive to messages from a controlling host computer to generate a unique set of type control signals for each computer type to be tested.
Abstract: A general purpose computer test interface is used to test various types of computers having differing input/output characteristics. The interface comprises a control unit which is responsive to messages from a controlling host computer to generate a unique set of type control signals for each computer type to be tested. Interfce control logic circuits combine the type control signals with bus control signals from a target computer under test to adapt the interface for communication with each of the different types of targets defined by the type control signals.

Patent
30 Apr 1985
TL;DR: In this paper, a system and method for computer control of machine processes, including a dynamic menu feature used in the selection of processes and the definition and selection of operating parameters used by a process control program to direct the performance of the process by the machine.
Abstract: A system and method for computer control of machine processes, including a dynamic menu feature used in the selection of processes and the definition and selection of operating parameters used by a process control program to direct the performance of the process by the machine. Data structures for a multiplicity of processes are defined and stored. Values stored in the data structures indicate which processes are available for use and the process control program associated with each process. Furthermore, for each parameter of each process a data structure contains an indicia of whether the parameter is a forced entry parameter (which must be given a value before the process is run), a may change parameter (with a default value that may be changed when the process is run), or a locked parameter which has a fixed value. An engineering set up program enables interactive computer controlled performance of the steps of storing the above-mentioned data structures, entry of values into the data structures, and the entry of default parameter values. An operator control program, utilizing the stored data structures, enables interactive computer controlled performance of the steps of selecting one of the enabled processes, entry of parameter values, and running of the selected process.

PatentDOI
TL;DR: In this article, the authors propose a method of enabling the efficient use of any host computer with a voice message processing apparatus using a telephone interface and voice processing system, that comprises, providing a universal supervisory circuit between the host computer and the telephone interface, having a memory that stores data of a type useful to interface with said telephone and voice communication interface system.
Abstract: A method of enabling the efficient use of any host computer with a voice message processing apparatus using a telephone interface and voice processing system, that comprises, providing a universal supervisory circuit between the host computer and the telephone interface and voice processing system, said circuit having a memory that stores data of a type useful to interface with said telephone and voice processing interface system, said circuit performing the steps of receiving standard serial data from any host computer such as telephone answering, voice message storing and other commands; storing in said supervisory circuit memory particular serial data commands tailored to command and control the telephone interface and voice processing system; using said data stored in the memory to translate said received standard serial data from the host computer into command and control language recognizable by the telephone interface and voice processing system; converting the translated language into parallel data; and prioritizing the application of said parallel data to said telephone interface and voice processing system for efficient transmission to the telephone interface system; the said telephone interface and voice processing system generating parallel data, such as line-ringing and other status data, translated by said supervisory circuit into standard serial data recognizable by the host computer; and prioritizing the transmission of the last-named standard serial data to the host computer.

Patent
07 Oct 1985
TL;DR: In this article, an arrangement for testing each portion of a system by stimulating at an interface of the system the expected responses is described. But the system is designed to use a single interface without regard to the type of simulated messages.
Abstract: There is disclosed an arrangement for testing each portion of a system by stimulating at an interface of the system the expected responses. Software scripts are pregenerated and compiled into system message commands. Each script contains sequences of expected message responses as well as stimuli messages. The system is designed to use a single interface without regard to the type of simulated messages.

Patent
25 Feb 1985
TL;DR: In this paper, an apparatus for use with a DMA controller includes a device interface controller having therein both general and specific command programs, and device bus interface, arranged to intercept all communication signals between the controller and a microcomputer associated therewith.
Abstract: An apparatus for use with a DMA controller includes a device interface controller having therein both general and specific command programs, and device bus interface. The apparatus is arranged to intercept all communication signals between the DMA controller and a microcomputer associated therewith.

Journal ArticleDOI
01 Jan 1985-Analyst
TL;DR: In this article, the authors describe the automated interface between a nitrogen analyser and an isotope ratio mass spectrometer, which can be used for unattended analysis of up to 50 samples for total nitrogen and nitrogen isotope ratios at the rate of 12 per hour.
Abstract: The computerised automation of an interface between a nitrogen analyser and an isotope ratio mass spectrometer is described. Unattended analysis of up to 50 samples for total nitrogen and nitrogen isotope ratio can be carried out at the rate of 12 per hour.

Patent
22 Nov 1985
TL;DR: A general purpose array processor as mentioned in this paper is composed of a plurality of independent processing units, including a transfer controller unit, a data source, an arithmetic unit, and an input controller unit.
Abstract: A general purpose array processor is made up of a plurality of independent processing units. A digital host computer provides the overall control for the system. An interface unit is connected to receive instructions and data signals from the host computer and then to autonomously and selectively distribute the instructions and data to other units within the system and to transmit status, control and data signals to the digital host computer. A transfer controller unit is connected to a bulk memory and to the interface unit for receiving the instructions from the interface unit and for autonomously and selectively transferring data signals from the bulk memory means to an arithmetic unit which is also connected to the interface means and receives instructions therefrom for subsequently autonomously and selectively performing arithmetic functions on the data transferred by the transfer controller unit. An input controller unit may be provided for receiving data from a data source. The input controller unit is connected to the other units and to the bulk memory and receives the data from the source of data and reformats and transmits the reformatted data to the bulk memory. The arithmetic unit has a fixed point and a floating point adder for flexiblility of operation.

Journal ArticleDOI
TL;DR: A robust hardware/software architecture has been developed with emphasis on a networking approach to functional maintenance organization, and a highly effective set of capabilities is provided for the detection and sectionalization of errors, and for recovery from software and hardware faults.
Abstract: In developing the 5ESS™ switching system, a digital switch with distributed control, major emphasis has been placed on reliability, quality of service to the customer, and efficiency of the human interface for the telephone operating companies. To achieve a high-reliability design for this system, a robust hardware/software architecture has been developed with emphasis on a networking approach to functional maintenance organization. Building on this approach, a highly effective set of capabilities is provided for the detection and sectionalization of errors, and for recovery from software and hardware faults. Complete diagnostic aids are available, and flexible video display terminals provide an efficient and attractive means for telephone operating company personnel to interface to the system. Further, a wide range of automated, as well as manual, trunk and line test features are integrated into the system design; and interfaces to both local work stations and operational support systems provide a variety of options for efficient maintenance operation.

Patent
17 Dec 1985
TL;DR: In this article, a network interface equipment for a bus network employs separate processors and random-access memories for handling bus-protocol and data portions of a data packet, each processor has access to a separate random access memory to and from which it moves data.
Abstract: A network interface equipment for a bus network employs separate processors and random-access memories for handling bus-protocol and data portions of a data packet. Each processor has access to a separate random-access memory to and from which it moves data. The random-access memories are multiple-ported to permit access by more than one requester with a logic arbitrator to resolve conflicts. A status random-access memory provides communication between the two processors.

Journal ArticleDOI
TL;DR: In this article, the use of a small computer system is an attractive proposition for cost-effective data logging and processing in the field of radio propagation statistics, particularly when pre-processing and data reduction techniques are applied.
Abstract: This paper shows that the use of a small computer system is an attractive proposition for cost-effective data logging and processing in the field of radio-propagation statistics, particularly when pre-processing and data reduction techniques are applied. In order to illustrate and emphasize the points detailed, reference is made to results obtained with an experimental system for the measurement of microwave scintillations on a satellite link at X-band, described in a companion paper. The requirements for reliable statistical measurements are discussed together with the advantages of on-line pre-processing in terms of reduced data storage requirements and the reduced computation necessary in later analysis. Finally the paper describes the design considerations of an on-line analogue spectrum analyser and its interface with a data logging and pre-processing unit.

Journal ArticleDOI
TL;DR: The importance of man-machine interface in the operation of many automated systems, where the control functions are performed concurrently by human operator and computer, is discussed.
Abstract: In the operation of many automated systems, the control functions are performed concurrently by human operator and computer. This paper discusses the importance of man-machine interface design for overall system efficiency and described how interface software enables operator and machine to help each other to achieve an effect of which each is separately incapable. Guidelines for the design of a computer numerically controlled (CNC) lathe interface are outlined and the implications for interface design methodology are discussed.


Journal ArticleDOI
TL;DR: The paper is structured according to the following three areas: Production of Graphics, Display of Graphics and Manipulation of Graphics.

Patent
13 Dec 1985
TL;DR: In this article, an interface for use between an asynchronous bus and a signal processor is described, which utilizes both a wraparound receive and transmit memory to ensure coherency with very little processor overhead.
Abstract: An interface for use between an asynchronous bus and a signal processor is disclosed. The interface utilizes both a wraparound receive and transmit memory to ensure coherency with very little processor overhead.

Journal ArticleDOI
TL;DR: A computer-controlled tactile vision-substitution system as part of a study to maximize the use of the skin's ability to process spatial and temporal information.
Abstract: We have developed a computer-controlled tactile vision-substitution system as part of a study to maximize the use of the skin's ability to process spatial and temporal information. The system receives a 128-column × 64-row image from a commercially available digital camera. An IBM personal computer sections the image into a controllable number of 6 × 24 blocks. The computer then sequentially sends these blocks to the 6 × 24 vibratory fingertip stimulation matrix on an Optacon reading device for the blind. Custom hardware provides the interface between the IBM PC and the Optacon. The image manipulation software is written in Intel 8088 assembly code.

Patent
17 Dec 1985
TL;DR: An electronic linkage interface control security system for controlling access by a computer terminal (2) to a main computer (6) is described in this article, where the system comprises a Computer Linkage Interface Control (CLIC) module (1) that is coupled to the terminal that generates and stores a random or pseudo-random coupling code for each communications session.
Abstract: An electronic linkage interface control security system for controlling access by a computer terminal (2) to a main computer (6). The system comprises: a Computer Linkage Interface Control (CLIC) module (1) that is coupled to the terminal (2) that generates and stores a random or pseudo-random coupling code for each communications session. The main computer (6), or a pre-processor security computer (5), in which the coupling code for the current communications session was stored during the previous session, accesses the current coupling code in the CLIC module (1) for comparison to the computer's previously stored copy. If a match occurs, access by the terminal (2) to the main computer (6) is permitted.