Showing papers on "Inverter published in 1968"

Transistor-transistor logic with high packing density and optimum performance at high inverse gain

Abstract: The advantages of using thin epitaxial layers for bipolar integrated circuits are discussed in this paper. Using epitaxial layer thicknesses of ~ 1 /spl mu/ and a low-voltage form of transistor-transistor logic, packing densities of 10/SUP 5/ logic gates/in/SUP 2/ have been achieved. The power x delay product of the circuits was 5 pJ. The transistors were formed in 1 /spl mu/ thick epitaxial layers and have inverse common-emitter current gains of 2 to 3. These high inverse gains make practical some new circuit configurations, including a dual-emitter inverter with reduced storage time. The thin epitaxial layer may be p type, rather than the usual n type, and this makes possible a new isolation scheme that allows the fabrication of bipolar integrated circuits using only five photolithographic steps.

High frequency power supply

Abstract: A static, single-phase, alternating current supply for powering an inductive load In a preferred embodiment, the load is an induction heating coil with parallel power factor correcting capacitors, but equivalent elements consisting of parallel connected inductance and capacitance may be incorporated in the system and any external load can then be powered Adjustment of output power and/or voltage is accomplished by varying the frequency of the supply The preferred embodiment includes an alternating current input of line voltage and frequency, a rectifier producing DC output voltage of substantially constant magnitude, an inverter capable of operation over a range of frequencies for converting the DC voltage to high frequency alternating current, and inductive reactance between the inverter and the load The frequency of the inverter is controlled by an oscillator which has various inputs providing control functions

Inverter Commutation Circuits

Abstract: The author describes the commutation process in forced commutation inverters so that similarities and differences between techniques can be evaluated. There are few, if any, short cuts in commutation; commutation is a power function and, as such, should be a major consideration in the economic design of inverter circuits. Other than by reducing turn-off time in semiconductor switches, the problem will not change significantly.

The Through-Pass Inverter and Its Application to the Speed Control of Wound Rotor Induction Machines

Abstract: A new inverter type suitable for variable voltage ratio dc-ac power conversion is introduced. It was developed particularly for the control of speed and torque of wound rotor induction machines. The inverter "short-circuit" and "inversion" modes are described and examples of some means for switching from one mode to the other and for their time ratio control are shown. The behavior of the induction machine-rectifier-through-pass inverter cascade is analyzed and a simplified block diagram is deduced. Experimental results confirming the theory are given. The problems associated with the application of thyristors to the scheme for the slip power recovery are pointed out.

System for controlling the speed of a plurality of motors which have output shafts to drive elements that are interrelated

Abstract: A motor control system for a papermaking machine formed of a rectifier and inverter circuit connected between an alternating current source of fixed frequency and a plurality of synchronous motors of the papermaking machine which are to be driven with a frequency which can be varied. A single master oscillator provides a common source for a plurality of divider circuits, each of which are connected to the respective inverter circuit associated with each individual motor. Each divider circuit is formed of a ''''runup'''' speed control circuit which enables gradual increase of motor speed, a speed control logic circuit which provides a ''''draw'''' control between individual motors, and a polyphase generator to provide a polyphase voltage which is applied to the individual motors. Each speed control logic circuit is variable to control the speed of individual motors, and, consequently, the ''''draw'''' between the motors. The master oscillator is variable to control the speed of all motors jointly and concurrently.

Static inverter control circuits

Abstract: 1,171,953. Inverting. ENGLISH ELECTRIC CO. Ltd. 31 Jan., 1968 [3 Feb., 1967], No. 5455/67. Heading H2F. A circuit for controlling the application of firing pulses to the converter elements of a polyphase inverter comprises a pulse generator having an output frequency dependent on the magnitude of a control signal which is a function of any difference between the actual and desired margin angle, whereby to control the firing angle in such a sense as to reduce this difference towards zero. The pulse generator 19, Fig. 2, feeds a ring counter 18, each stage 23 ... 28 of which provides trigger pulses for valves of a three-phase bridge inverter, Fig 1 (not shown). The output Fig. 3 (a) from each stage is also fed to a respect AND circuit 29, the other input to which Fig. 3 (h) is derived by limiting and inverting waveform 3 (g). This last mentioned waveform is derived from a differentiating current transformer (14, 15, 16), Fig. 1 (not shown), associated with the A.C. feeds to the valves. During coincidence between waveforms 3 (a), 3 (h) the output from AND circuit 29 switches on transistor 32 to charge capacitor 34. Between times of coincidence capacitor 34 discharges 3 (k). A further input to the control circuit. Fig. 3 (m) is derived from a transformer (12), Fig. 1 (not shown) across the A.C. supply, the point at which this passes through zero being a measure of the margin angle. This signal is limited and differentiated 39, 40 to provide a sampling pulse 3(p) which switches on transistor 38 to transfer the potential stored on capacitor 34 to capacitor 41, the potential transferred being dependent on the margin angle. Each capacitor 41 is connected to integrator 44 via a respective diode 43 which passes to the integrator the highest of the stored voltages, and the integrator output controls the frequency of the pulse generator. In order to minimize such changes in control voltage, the capacitors 41 may be returned to earth via a resistance network (47, 48), Fig. 4 (not shown).

Plural operating mode automatic gain control system

Abstract: An automatic gain control system for a television receiver employing a fixed biasing arrangement for a video detector, noise inverter, sync separator, and automatic gain control amplifier. The noise inverter operates when noise pulses exceed a threshold limit determined in part by the biasing arrangement. Relatively noise-free sync pulses therefore are supplied to the sync separator and AGC circuit. The AGC circuit is arranged to supply control voltages having different ranges to the R.F. and I.F. amplifiers in the receiver. Furthermore, the AGC circuit operates such that a reference video signal is supplied to the imagereproducing kinescope during a service operating mode.

Transistor inverter circuit

Abstract: A ratioless MOSFET inverter for capacitive outputs consists basically of a pair of MOSFET''s with their sources and drains tied together. The clock input is applied to the common drain connection and to the gate of one of the MOSFET''s and the output is connected to the common source connection. In an alternative construction, the MOSFET whose gate is connected to the clock is replaced by a Schottky diode connected between the source and drain terminals of the data input MOSFET. The clock is connected to the drain terminal of the data input MOSFET, and the output is connected to the source of the data input MOSFET.

The Controlled Slip Static Inverter Drive

Abstract: The ability to use the versatile characteristics of the semiconductor inverter to achieve optimized control of a squirrel cage induction motor is demonstrated. The technique has been made possible during the past few years due to the development of fast, powerful, and efficient inverters. These, in turn, are the direct result of advances in semiconductor technology, which have produced thyristors with improved qualities and the advent of integrated electronics. If the slip of an induction motor is constrained and controlled to values below breakdown, high efficiency, high power factors, and moderate currents result in performance comparable to that of a dc machine. General expressions defining torque and involving the quantities of slip and excitation are easily derived. Excitation can be expressed in terms of volts per cycle, current, or flux. Torque can be controlled by adjusting slip or excitation or both in combination. The ability to control slip and escitation precisely and accurately depends on the inverter which is used. The pulse width modulated (PWM) inverter is an extremely effective motor controller accomplishing voltage and frequency adjustment in a single circuit. It is a fast, linear device; its response is virtually instantaneous. As a power amplifier it is comparable to the duel converter of dc systems, and its speed of response makes it applicable to virtually any feedback loop. In considering the mating of the motor and inverter, several principal factors are involved in the optimization of the system.

Ac motor control system with synchronous speed change

Abstract: A variable DC power source supplies a DC voltage to a static inverter which provides a three-phase alternating voltage output to drive an AC motor. A ring counter which is cycled by a voltage controlled oscillator generates three-phase timing signals to control the frequency of the inverter output. An input control signal is coupled to the voltage controlled oscillator through a rate control means. The rate control means generates a voltage output to the voltage controlled oscillator which is proportional to the input control signal and follows and adjustment of the input control signal from one level to another at a predetermined rate. The output generated by the rate control means also controls the magnitude of the DC voltage output of the DC power source. An adjustment of the input control signal results in a proportional change in the magnitude and the frequency of the inverter output.

Integrated mos transistor flip-flop circuit

Abstract: A circuit capable of J-K operation and composed of enhancementtype MOS transistors adapted for integrated circuits. The total gate area required for the transistors is reduced by minimization of series connection of two or more of the inverter transistors, which are required to have a low resistance compared with the transistors that perform a load resistor function. This avoidance of series connection is achieved by connecting one of the cross-connected feedback paths of each flip-flop assembly through a transmission transistor gated by the clock pulses.

Brushless motor including forced commutation responsive to rotor movement

Abstract: A brushless motor having substantially the same properties as those of a direct current motor and formed from a combination of thyristors included in a bridge inverter and a synchronous motor, wherein there is provided a diode bridge connected to the AC side of the inverter by means of Graetz connection for use as a bypass circuit for the back electromotive force occurring in the armature of the synchronous motor, and that there is also provided an auxiliary thyristor between the respective inverter buses and each of a pair of common contacts disposed opposite thereto thereby effectively to actuate the bypass circuit only at the time of commutation.

Current limiting protective means

Abstract: A high-speed AC electric power switch and current-limiting impedance combination suitable for interconnecting a static inverter and its load circuit is arranged to respond to an overload condition by inserting the impedance in series with the load so fast that the inverter can remain in service with its integrity unimpaired. The switch is also arranged to subsequently isolate the load circuit from the inverter in the event that the overload condition has not otherwise been relieved within a predetermined length of time. D R A W I N G

Pulsed substrate transistor inverter

Abstract: An inverter circuit for field-effect transistors consisting of at least one transistor with a capacitor connected between the source electrode and ground, a diode connected between the drain and source electrodes and a source of negative clock pulses tied to the drain electrode and substrate electrode

Motor Drive Inverter Ratings

Abstract: The selection of adjustable-frequency motor drive inrters requires a recognition not only of motor shaft loading but of motor characteristics, of solid-state harmonic waveforms, and of inverter capabilities. The process of selection is further complicated by a lack of industry standard ratings. The functional details of specifying, selecting, and comparing are discussed.

Constant volts-per-hertz regulating system

Abstract: AN OSCILLATOR APPLIES TIMING SIGNALS TO AN INVERTER LOGIC ARRANGEMENT FOR GOVERNING THE FREQUENCY OF THE INVERTER OUTPUT A-C VOLTAGE SUPPLIED TO A MOTOR. THE AMPLITUDE OF THE A-C VOLTAGE APPLIED TO THE MOTOR IS ADJUSTED BY SUITABLE CONTROL MEANS WHICH RECEIVES A REGULATING SIGNAL FROM A COMPARATOR. A FIRST SIGNAL CHANNEL INCLUDES A FEEDBACK NETWORK, AND APPLIES TO THE COMPARATOR A FIRST CONTROL SIGNAL WHICH INDICATES THE EFFECTIVE AMPLITUDE OF THE INVERTER VOLTAGE. A SECOND SIGNAL CHANNEL IS CONNECTED BETWEEN THE OSCILLATOR AND THE COMPARATOR TO PROVIDE A SECOND CONTROL SIGNAL RELATED TO THE FREQUENCY OF THE OSCILLATOR OUTPUT. THE COMPARATOR OUTPUT SIGNAL IS A FUNCTION OF BOTH AMPLITUDE AND FREQUENCY, AND DRIVES THE CONTROL MEANS TO MAIN A PRESET RATIO BETWEEN AMPLITUDE AND FREQUENCY OF THE A-C VOLTAGE PASSED TO THE MOTOR.

C-mos dynamic binary counter

Abstract: A dynamic flip-flop comprising two inverter means and two switching means is described. The switching means couple, by different conduction paths, the input node of one inverter means to the input node and to the output means of the other inverter. The switching means are alternately enabled by a clocking signal varying at a first rate causing the signals at the inputs and outputs of both inverter means to vary at one half said first rate. The temporary or momentary storage provided by the capacitance at the input node of an inverter stage, coupled with the single pole, double throw action of the switching means, enables the design of a dynamic binary counter using a minimum number of components.

Fet flip-flop driving circuit

Abstract: A driving circuit for driving a flip-flop comprising a pair of trigger circuits, each of which is composed of a gating insulated gate field effect transistor (referred to as IGFET hereinafter), memorizing IGFET and triggering one, said driving circuit comprising an inverter constituted by connecting first and second IGFET in series with each other, wherein the input of the inverter is connected in common with the inputs of said gating IGFET''s, and the output of said inverter is connected in common with the inputs of said trigger IGFET''s.