Showing papers on "Inverter published in 1980"

One-gate-wide CMOS Inverter on laser-recrystallized polysilicon

Abstract: A CMOS inverter having a single gate for both n and p channel devices has been fabricated using bulk silicon for the p channel device and a laser-recrystallized silicon film for the n channel device. The fabrication details and dc electrical performance of this device are described.

Two-wire electronic dimming ballast for fluorescent lamps

Abstract: A low cost, high frequency, solid-state dimmable fluorescent ballast is disclosed which utilizes a resonant bridge inverter to provide high frequency sinusoidal power to the lamps. One embodiment of the invention includes auxiliary windings connected to the filaments of the lamps to be powered which utilize the inductance of the resonant bridge inductor coil to maintain the voltage across the filaments during dimming. A clamping circuit or auxiliary tuned circuit may be provided to prevent damage due to an over-voltage and over-current condition upon removal of a lamp during operation of the system. In an alternative embodiment, the auxiliary windings, are replaced by capacitors across each of the lamps to be powered. This also eliminates the need for the clamping circuit. If desired, a current splitting capacitance system may be used. Pulse width modulation of the inverter drive or variable AC or DC power supply input may be used to accomplish dimming.

Frequency shift inverter for variable power control

Abstract: A variable frequency AC power source drives a gas discharge lamp which is connected in parallel with the capacitance of a series resonant circuit. The polarity of the voltage applied to the resonant circuit is commutated at such times as the rate-of-change of current flow in the resonant circuit is below an adjustable threshold value. The setting of a threshold adjusting circuit determines the brightness of the lamp. The polarity is also commutated at such times as the current flow from the source reaches a predetermined level. Lamp current is thus independently and variably controlled in the variable power mode.

Multi-level signal generating circuit

Abstract: A multi-level signal generating circuit is disclosed which comprises: a first CMOS inverter for inverting an input signal to produce a first output signal having high and low voltage levels; a second CMOS inverter for inverting the input signal to produce a second output signal having high and low voltage levels; at least one of the high and low voltage levels of the second output signals being different from said high and low voltage of said first output signal; and switching circuit operative to drive selectively said first CMOS inverter or said second CMOS inverter in response to a level of a control signal.

Josephson-logic devices and circuits

Abstract: A review of the recent advances in Josephson logic devices and circuits is presented. The Josephson junction is almost an ideal digital switch exhibiting very abrupt threshold, ultra-high switching speeds (∼10 ps), and very low power dissipation (∼1 µW). Logic devices based on the Josephson junctions combine Josephson junctions with other circuit elements to provide isolation to the input signals as well as to provide higher gain than a single junction. These devices can be classified into two groups, the first group uses magnetically coupled SQUID's (Superconducting QUantum Interference Devices) to provide isolation, whereas the second group of circuits utilizes the high-resistance state of a Josephson junction in series with the signal input to provide isolation. Logic circuits based on these two isolation Schemes are compared. In both schemes, higher gains are achieved by the use of either multiple Josephson junctions in parallel or a buffer stage. The buffer stage is a Current-Injection Device (CID) which provides gain and the AND function between the two signal currents injected into it. Some of the unique features of Josephson logic circuits such as terminated superconducting transmission lines, ac power supply, Timed Inverter, and Latch circuits are also examined. The dynamic behavior of the Josephson junctions is modeled by very simple equivalent circuits. The computer simulations based on these models are compared with experiments and found to be in excellent agreement. A family of experimental logic circuits has been designed and experimentally tested using 2.5-µm minimum feature size. These circuits have fully loaded logic delays of about 40 ps/gate and power dissipation of about 4 µW/gate. The gate delays and power-delay products are compared with leading semiconductor technologies.

Dimming circuit for an electronic ballast

Abstract: A dimmer circuit for an inverter-driven electronic ballast system. The ballast includes an output transformer having a primary winding coupled to the inverter output and a secondary winding adapted to be coupled to a lamp filament winding for supplying power to the filament. An interstage transformer has a primary winding adapted to be coupled to a lamp filament and a secondary winding coupled to an inverter input for applying a feedback signal derived from the filament current at that input. The dimmer circuit is in the form of a feedback loop that includes a winding on the primary of the output transformer, a winding on the primary of the interstage transformer, and a variable impedance coupling those windings. Varying the impedance necessarily varies the total feedback loop impedance and therefore the amount of feedback applied at the inverter output and, inversely, the power supplied to the lamp filament.

Driver circuit for charge coupled device

Abstract: A driver circuit for a charge coupled device which includes a CMOS inverter including a P channel MOS transistor and an N channel MOS transistor for inverting the level of an input control pulse, an output terminal of the CMOS inverter being connected to a charge coupled device such that the P channel MOS transistor functions to charge the equivalent load capacitance of the charge coupled device and the N channel MOS transistor functions to discharge the equivalent load capacitance. A continuously variable DC power supply is provided for applying a variable gate voltage to the gate of at least one of the P and N channel MOS transistors to change the mutual conductance of the transistor so that the time constant of the charge or discharge circuit to the load capacitance can be adjusted to optimize the charge transfer efficiency of the charged coupled device.

Solid state ballast

Abstract: A thyristor/capacitor inverter bridge energizes the lamp circuit with a high frequency oscillating voltage derived from full-wave rectified line voltage. Lamp current is regulated by a commutation circuit which is synchronized with zero crossings of the thyristor current. When power is first applied, an initialization circuit initiates a time delay to permit lamp warm up and then enables the high frequency inverter to begin energizing the lamp load. A re-strike circuit generates pulses coupled to the commutation circuit to re-start it when the rectified line voltage falls below that which is necessary to sustain oscillation of the inverter. Fault detection circuits are included for detecting faults such as loss of primary power, thyristor over-voltage, and thyristor over-current for taking corrective action, such as inhibiting the inverter and commencing a new initialization sequence. In addition, in the case of thyristor over-current, which may indicate that both power thyristors are conducting at the same time, the power thyristors are commutated. A fault count circuit determines whether a predetermined number of such faults occurs within a preset time, and if so, the system is shut down and manual reset may be required.

A High-Performance Controlled-Current Inverter Drive

Abstract: A production variable-frequency drive is described which uses an induction motor and a controlled-current inverter. The control loops of the drive have been arranged so that the performance of the drive is extended to zero speed and to the theoretical upper limit speed. Operating modes include torque smoothing by programmed dc link current, pulsewidth modulated (PWM) current shaping, and flux-controlled constant horsepower operation.

A line interfaced inverter with active control of the output current waveform

Abstract: A line interfaced inverter for photovoltaic systems is presented. This inverter employs a high frequency dc-chopper for shaping the output current, providing unity power factor operation and minimizing the size of the output filter. The isolation of the solar array from the utility is accomplished with a high frequency transformer, eliminating the need for large, 60 Hz magnetics. The dynamics of the power circuit are analyzed to determine proper compensation of the output current control loop. This analysis shows that a minor loop is required to stabilize the power circuit and that system response varies during the 60 Hz cycle. A Parity Simulation of the power circuit/control system is performed to verify this analysis. The results of this simulation are presented and compared to waveforms from a test inverter. The special considerations required for properly loading a photovoltaic array with a line interfaced inverter are discussed.

Method and apparatus for controlling an alternating current motor load using plural controlled-current inverter circuits

Abstract: A plurality of controlled current inverter circuits each including a plurality of electrical current conducting legs having controlled rectifiers and associated commutating capacitors are connected in parallel and individually controlled to collectively supply an alternating current motor load with electrical power. At high speed, low required torque conditions, less than the total number of inverter circuits are maintained operative to thereby maintain sufficient current within the effective inverter circuit or circuits to sustain effective inverter commutation.

Controlled current base drive circuit

Abstract: A base drive circuit particularly well adapted for use with bipolar transistors in high frequency power conversion schemes. The base drive circuit allows achieving desired values for both forward and reverse base drive currents simultaneously regardless of the characteristics of the bipolar transistor driven. When utilized in a transformer isolated inverter system, the base drive circuit additionally presents a polarity insensitive input impedance which eliminates the effects of cross-conduction between base drive circuits connected to the secondary side of the isolation transformer.

Small load detection by comparison between input and output parameters of an induction heat cooking apparatus

Abstract: TITLE "SMALL LOAD DETECTION BY COMPARISON BETWEEN INPUT AND OUTPUT PARAMETERS OF AN INDUCTION HEAT COOKING APPARATUS" ABSTRACT An induction heat cooking apparatus includes an inverter which generates ultrasonic frequency energy for heating a magnetic load by induction, and a small load detection circuit. The detection circuit includes a comparator which compares the input and output parameters of the inverter and latches a bistable device when the input power is smaller than the output parameter. The bistable device shuts down the inverter to prevent in-advertently placed small utensil objects from being ex-cessively heated.

Method and apparatus for controlling inverters in parallel operation

Abstract: A method for controlling the voltage and the load distribution, as well as for synchronizing, of several inverters the outputs of which can be connected to a common bus bar in which, for each inverter, a simulated control variable is formed and is compared as to amplitude and phase with a reference voltage which is the same for all inverters.

Electronic fluorescent lamp ballast

Abstract: An electronic ballast-inverter for multiple fluorescent lamps (10, 12) employs a push-pull inverter and a series resonant circuit for driving the lamps. The inverter operates at the resonant frequency of the series resonant circuit. The current in the resonant circuit is limited, for low load conditions, in response to a sensing voltage which is used to raise the frequency of operation of the inverter to make the load more reactive.

Pulse width modulated inverter machine drive

Abstract: Improved operation of a pulse width modulated inverter machine drive system is obtained by a control apparatus which regulates inverter switching device conduction by modifying switching signal waveforms transmitted to the inverter to eliminate switching pulses narrower than the minimum inverter switching device pulse width. By dropping the narrow inverter switching pulses in sequence during the exact interval which the pulses would otherwise occur and boosting the amplitude of remaining pulses, the control apparatus permits the inverter to smoothly transition from pulse width modulation operation to square wave operation without objectionable jumps in inverter output voltage.

Power supply for driving ac motor

Abstract: PURPOSE:To prevent a semiconductor element from damaging due to failure of commutation in a power supply for driving an AC motor by switching frequency and power factor improving capacitors of an inverter at its frequency switching time when the inverter is temporarily stopped or the like. CONSTITUTION:When a rated frequency is f0, an inverter 14 is operated by setting its starting frequency at f0/3. When a comparator circuit 17 detects the substantial coincidence of the output signal A from a revolution detector 16 mounted as one representative of a motor 10 to the output frequency signal B from the inverter, it generates its output detection signal C to thereby stop the inverter 14 at time t1. In the meanwhile, the set frequency of the control circuit 18 for the inverter 14 is switched to next stage (2/3f0), and a power factor improving capacitor 15 is switched to set the power factor at 0.9-1.0 at this frequency. The inverter 14 is again operated at time t2 when this operation is finished to gradually raise the voltage. Since the time duration between the times t1 and t2 is approx. 1 second, a motor having large inertia does not almost decelerate at its rotation. Thus, it can prevent abnormal occurrence at frequency switching time at the inverter.

Microcomputer-based control apparatus for a load-commutated inverter synchronous machine drive system

Abstract: A load-commutated inverter synchronous machine drive system control apparatus comprises at least one microcomputer for determining optimum or desired values for inverter turn-off time, inverter link current and machine air gap flux from machine drive system voltage and currents. Inverter frequency is regulated in accordance with the difference in magnitude between optimum and actual inverter turn-off time to minimize the inverter turn-off angle irrespective of machine frequency, thereby reducing synchronous machine reactive power. Inverter link current and synchronous machine field current are regulated responsive to the difference in magnitude between optimum and actual inverter link current and the difference in magnitude between optimum and actual machine air gap flux, respectively, thereby assuring machine operation at maximum efficiency.

Motor control system for a single phase induction motor

Abstract: A single phase induction motor control system employs power line assisted starting and runs at higher than power line frequency from an electronically generated inverter supply. This inverter supply is employed to provide an out of phase mains frequency signal to the run winding during starting in order to create the rotating magnetic field needed to start the motor. After the motor has started, the power line supply is disconnected from the start winding and the inverter supply frequency is increased gradually to a final value corresponding to the desired operating speed. In this system no phase shifting capacitors are needed to provide the out of phase starting voltage and the run winding is optimized for running conditions.

Current Injection Logic Gate with Four Josephson Junctions

Abstract: A novel current switching Josephson logic gate in which four junctions are connected in a loop is described. This four-junction logic gate can reduce an inductance included in the loop as small as possible, so that the higher switching speed and the smaller device size is expected. The switching threshold and the switching characteristics of the gate are investigated both theoretically and experimentally. Logic circuits based on the gates are also experimentally demonstrated.

Battery depletion monitor

Abstract: A CMOS inverter is used to compare pacemaker battery voltage to a referenced voltage. When the reference voltage exceeds the measured battery voltage, the inverter changes state to indicate battery depletion.

Crystal oscillator circuit capable of changing the number of inverter stages coupled in series

Abstract: A single-stage inverter forming a closed loop together with a crystal resonator fails to provide sufficient gain and hence, power consumption becomes high during stable oscillation. If inverters are coupled together in a three-stage cascade-connection, on the other hand, the gain becomes excessively high and undesired high frequency oscillation takes place at the start of oscillation. This invention provides a crystal oscillator circuit which, in order to solve these problems, uses a single-stage inverter to form a closed loop with a crystal resonator at the start of oscillation and uses three-stage inverters cascade-connected with each other during stable oscillation.

Rectifier-converter power supply with multi-channel flyback inverter

Abstract: An AC to DC power supply having a multi-channel, flyback inverter output section regulated via a fixed frequency, pulse width modulation controller. The controller indirectly regulates each channel by regulating an auxiliary channel, whereby the duty cycle of a switching transistor in the flyback inverter section is varied to maintain a constant DC voltage on the auxiliary channel and correspondingly on each output channel.

Low power voltage multiplier circuit

Abstract: A voltage multiplier includes an inverter connected at its output to one plate of a capacitor for applying a first or a second voltage thereto, a first transistor switch which, when on, applies a second voltage to the second plate of the capacitor, and a second transistor switch which, when on, couples the second side of the capacitor to a load. For one polarity of input signal the inverter output switches from the first to the second voltage to produce an enhanced voltage at the second plate which is coupled via the second switch to the load. For the opposite polarity of input signal the inverter output switches from the second to the first voltage and the first switch is turned on. The input signal to the inverter is delayed and circuits responsive to the input signals are coupled to the first and second switches for: (a) in response to signals of the one polarity turning off the first switch prior to the production of the enhanced voltage and the turn on of the second switch; and (b) in response to signals of opposite polarity turning off the second switch prior to the turn on of the first switch and the switching of the inverter output from the second to the first voltage.

High speed CMOS sense amplifier

Abstract: A pair of CMOS inverters are cross coupled in a latching configuration. Both inverter supply terminals are coupled to complementary toggles that can render the inverters operative or inoperative. First, the inverters are rendered inoperative. An output switch is coupled between the output nodes so that the inverter's output nodes can be driven to the same potential, thus canceling any offset voltage. An input switch produces sampling over a time interval that extends beyond the output switch on period. After the sampling period, the toggles are operated to turn the inverters on and to produce a latch state determined by the potential change present in the sampling interval.

DC to AC inverter and motor control system

Abstract: This relates to a low cost reliable controller which may be used in conjunction with induction motors or, more generally, to generate AC power from a DC source. The system utilizes a microprocessor in combination with low cost parallel transistors to provide the control function. A feedback module monitors the actual rotor speed and conveys this information back to the microprocessor. A voltage boost module may be used in combination with the microprocessor and switching circuits to optimize the overall efficiency of the system. The microprocessor computes slip and controls the voltage drive in order to further optimize efficiency of the system as a function of motor speed. Both the footfeed voltage and boosted voltage are analog voltages and are applied to an A/D converter. The output of the A/D converter presents a digital representation of the footfeed voltage or boost voltage to the microprocessor.

DC to low frequency inverter with pulse width modulated high frequency link

Abstract: A variable duty cycle ultrasonic inverter is used to invert unregulated direct current into a high frequency variable pulse width modulated signal that is applied to a low frequency inverter by means of a high frequency transformer. The output of the low frequency is applied to an output filter where a feedback signal is coupled back to the variable duty cycle ultrasonic converter which is controlled by a comparison of the feedback signal and a sinusoidal reference signal. The sinusoidal reference signal is also used to control the low frequency inverter.

Peak power limiter system for excavator

Abstract: A motor drive system for a mining shovel includes three a.c. motors which are driven by associated inverter circuits that receive power from a common d.c. bus. The d.c. bus connects to the a.c. power lines through a rectifier circuit and large variations in power occur during various portions of the digging cycle. To limit the peak power demanded during a digging cycle a peak power limiter system comprised of a fourth inverter driven a.c. motor is attached to the d.c. bus. This a.c. motor drives a flywheel which is operated to store energy during periods of low power demand and which is operated to regenerate stored energy to the d.c. bus when power demanded from the a.c. power lines exceeds a preset amount.

Current type inverter

Abstract: There is disclosed a current type inverter excellent in transient response which comprises a two-phase sine wave generator for receiving signals corresponding to a motor speed signal and a speed deviation signal, to provide sine waves shifted 90° in phase, and a vector calculating circuit for calculating stator current instruction vectors from exciting current components and torque current components, the outputs of the vector calculating circuit being applied as frequency instruction signals of a conventional current type inverter.

Logic circuit with improved switching

Abstract: A fundamental logic circuit used, for example, in an electronic computer, comprising an output inverter transistor and a switching transistor which discharges a base charge stored in a storage capacitance in a base-emitter junction of the output inverter transistor when the output inverter transistor changes from the turned on condition to the turned off condition.