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Showing papers on "Inverter published in 1998"


Journal ArticleDOI
12 Oct 1998
TL;DR: Two novel carrier-based multileVEL PWM schemes are presented which help to optimize or balance the switch utilization in multilevel inverters.
Abstract: The advent of the transformerless multilevel inverter topology has brought forth various pulsewidth modulation (PWM) schemes as a means to control the switching of the active devices in each of the multiple voltage levels in the inverter. An analysis of how existing multilevel carrier-based PWM affects switch utilization for the different levels of a diode-clamped inverter is conducted. Two novel carrier-based multilevel PWM schemes are presented which help to optimize or balance the switch utilization in multilevel inverters. A 10 kW prototype six-level diode-clamped inverter has been built and controlled with the novel PWM strategies proposed in this paper to act as a voltage-source inverter for a motor drive.

492 citations


Proceedings ArticleDOI
15 Feb 1998
TL;DR: In this paper, two different multilevel topologies are identified for use as a power converter for electric drives: a cascade inverter with separate DC sources; and a back-to-back diode clamped converter.
Abstract: Traditional two-level high-frequency pulse width modulation (PWM) inverters for motor drives have several problems associated with their high frequency switching which produces common-mode voltage and high voltage change (dV/dt) rates to the motor windings. Multilevel inverters solve these problems because their devices can switch at a much lower frequency. Two different multilevel topologies are identified for use as a power converter for electric drives: a cascade inverter with separate DC sources; and a back-to-back diode clamped converter. The cascade inverter is a natural fit for large automotive all-electric drives because of the high VA ratings possible and because it uses several levels of DC voltage sources which would be available from batteries or fuel cells. The back-to-back diode clamped converter is ideal where a source of AC voltage is available such as a hybrid electric vehicle. Simulation and experimental results show the superiority of these two power converters over PWM-based drives.

461 citations


Proceedings ArticleDOI
15 Feb 1998
TL;DR: In this paper, the authors investigated the feasibility of a 500hp induction motor drive based on a seven-level 4.5 kV hybrid inverter for high power drive applications.
Abstract: The use of multilevel inverters has become popular in recent years for high power applications. Various topologies and modulation strategies have been reported for utility and drive applications in the recent literature. This paper is devoted to the investigation of a 500 hp induction motor drive based on a seven-level 4.5 kV hybrid inverter. The topological structure and operating principles of the proposed approach are presented. Various design criteria, spectral structures and other practical issues such as capacitor voltage balancing are discussed. The feasibility of the proposed approach is verified by computer simulations.

364 citations


Journal ArticleDOI
12 Oct 1998
TL;DR: The selective harmonic elimination PWM (SHEPWM) method is systematically applied for the first time to multilevel series-connected voltage source PWM inverters using a phase-shift harmonic suppression approach.
Abstract: Selective harmonic elimination pulsewidth modulation (SHEPWM) method is systematically applied for the first time to multilevel series-connected voltage-source PWM inverters. The method is implemented based on optimization techniques. The optimization starting point is obtained using a phase-shift harmonic suppression approach. Another less computationally demanding harmonic suppression technique, called a mirror surplus harmonic method, is proposed for double-cell (five-level) inverters. Theoretical results of both methods are verified by experiments and simulations for a double-cell inverter. Simulation results for a five-cell (11-level) inverter are also presented for the multilevel SHEPWM method.

337 citations


Journal ArticleDOI
TL;DR: In this article, the theory and the modeling technique of a flexible alternating current transmission system (FACTS) device, namely, unified power flow controller (UPFC) using an Electromagnetic Transients Program (EMTP) simulation package, are described.
Abstract: This paper describes the theory and the modeling technique of a flexible alternating current transmission systems (FACTS) device, namely, unified power flow controller (UPFC) using an Electromagnetic Transients Program (EMTP) simulation package. The UPFC, in this paper, consists of two solid-state voltage source inverters which are connected through a common DC link capacitor. Each inverter is coupled with a transformer at its output. The first voltage source inverter, known as a static synchronous compensator (STATCOM), injects an almost sinusoidal current, of variable magnitude, at the point of connection. The second voltage source inverter, known as a static synchronous series compensator (SSSC) injects an almost sinusoidal voltage, of variable magnitude, in series with the transmission line. This injected voltage can be at any angle with respect to the line current. The exchanged real power at the terminals of one inverter with the line flows to the terminals of the other inverter through the common DC link capacitor. In addition, each inverter can exchange reactive power at its terminals independently. The functionalities of the models have been verified.

258 citations


Journal ArticleDOI
TL;DR: In this article, an improved inverter output filter is proposed for pulsewidth-modulated (PWM) drive systems, which is shown to effectively reduce both the differential and common modes dv/dt at the motor terminals.
Abstract: In this paper, an improved inverter output filter is proposed for pulsewidth-modulated (PWM) drive systems. The proposed filter is shown to effectively reduce both the differential and common modes dv/dt at the motor terminals, even in the presence of long motor leads. Reducing differential mode dv/dt reduces overvoltages at the motor terminals and lowers the stress on the motor insulation. Lowering common mode dv/dt is shown to significantly reduce high-frequency leakage currents to ground and induced shaft voltage in the motor. An important advantage of the approach is that the filter can be installed within the inverter enclosure to achieve both the differential and common modes dv/dt reductions at the motor terminals. Thus, the use of the filter can contribute to enhanced bearing life and improve reliability of PWM drive systems. Analysis, design equations, and experimental results on a 480-V 20-hp PWM drive system are presented. The filter configuration is an excellent candidate for many new and retrofit PWM 480-V/575-V drive systems.

255 citations


Journal ArticleDOI
01 Jul 1998
TL;DR: In this article, a double-fed induction machine is used to achieve variable speed with 20% of the maximum mechanical power, compared to a classical solution which needs 120% and is validated by simulations and experimental results.
Abstract: The authors present a new system for variable speed using a double-fed induction machine. With a special operating mode, the apparent power of the inverter can reach only 20% of the maximum mechanical power, compared to a classical solution which needs 120%. Control laws are also studied with and without a sensor and they are particularly robust. The approach is validated by simulations and experimental results.

234 citations


Proceedings ArticleDOI
31 Aug 1998
TL;DR: In this paper, the authors describe the study and experimental verification of remedial strategies against failures occurring in the inverter power devices of a PM synchronous motor drive, and propose a fault-tolerant drive consisting in incorporating a fourth leg into the inverters, which has the same topology and capabilities of the other conventional ones.
Abstract: The paper describes the study and experimental verification of remedial strategies against failures occurring in the inverter power devices of a PM synchronous motor drive. The basic idea for designing a fault-tolerant drive consists in incorporating a fourth leg into the inverter stage, which has the same topology and capabilities of the other conventional ones. This represents a minimal redundancy that, when appropriately connected and controlled, allows the drive to face a power device fault condition with smooth torque. The proposed control strategy also fits interior permanent magnet motor drives, which can operate even above the base speed, where a proper flux-weakening current control is adopted.

190 citations


Proceedings ArticleDOI
22 Oct 1998
TL;DR: In this article, multilevel inverters are used as an application for all-electric vehicle (EV) and hybrid-electric vehicles (HEV) motor drives, and control schemes of the cascade inverter for use as an EV motor drive or a parallel HEV drive are discussed.
Abstract: This paper presents multilevel inverters as an application for all-electric vehicle (EV) and hybrid-electric vehicle (HEV) motor drives. Diode-clamped inverters and cascaded H-bridge inverters: (1) can generate near-sinusoidal voltages with only fundamental frequency switching; (2) have almost no electromagnetic interference (EMI) and common-mode voltage; and (3) make an EV more accessible/safer and open wiring possible for most of an EV's power system. This paper explores the benefits and discusses control schemes of the cascade inverter for use as an EV motor drive or a parallel HEV drive and the diode-clamped inverter as a series HEV motor drive. Analytical, simulated, and experimental results show the superiority of these multilevel inverters for this new niche.

185 citations


Journal ArticleDOI
12 Oct 1998
TL;DR: In this paper, a control method of reducing the size of the DC link capacitors of a power converter-inverter system was proposed, where information on the load power is incorporated in synthesizing the converter current control input so that a proper DC voltage level is maintained.
Abstract: This paper addresses a control method of reducing the size of the DC link capacitors of a power converter-inverter system. The main idea is to utilise the inverter operation status in the current control of the power converter. Specifically, information on the load power is incorporated in synthesizing the converter current control input so that a proper DC voltage level is maintained. The authors describe the dynamics of load current and apply feedback linearization theory to obtain an input output linearized system. Theoretically, this control strategy is effective in regulating the DC voltage level even though the DC link capacitor is arbitrarily small and load varies abruptly. The superior performance is demonstrated through simulation and experiment. Experiment was performed with a 9 kW PWM power converter-vector inverter system having a 75 /spl mu/F DC-link capacitor.

174 citations


Patent
16 Jun 1998
TL;DR: In this article, a multilevel inverter system with four or more levels of output voltage on each inverter output line is described, where the switching of the switching devices is controlled to provide a selected output voltage waveform utilizing redundant switching states, when such states are available on each voltage transition.
Abstract: A multilevel inverter system having four or more levels of output voltage on each inverter output line. The voltage across each of three or more series connected DC bus capacitors is provided to an inverter which is formed to have redundant switching states, such as a plurality of controlled switching devices and diodes connected in a diode-clamped multilevel inverter configuration. The switching of the switching devices is controlled to provide a selected output voltage waveform utilizing redundant switching states, when such states are available on each voltage transition, by selecting a one of the available switching states that serves to provide the desired phase-to-phase voltages and to tend to equalize the voltages across the DC bus capacitors. Active or passive rectifiers may be used to provide the DC voltage across the DC bus lines and across the DC bus capacitors. Separate rectifiers may be provided for each capacitor which are supplied from secondaries of transformers connected to the three phase input lines to provide isolation and voltage level adjustment. The multilevel inverter system provides output voltage waveforms with lower total harmonic distortion that conventional two or three level inverters, while maintaining voltage balance across the several DC bus capacitors.

Journal ArticleDOI
TL;DR: Control issues involved in a four-level inverter based AC drive application are addressed and the DC capacitor voltages are balanced for both motoring and regenerating modes of the inverter-motor system.
Abstract: In a motor drive, the converters must be able to handle bidirectional real power flow. So far, DC voltage balancing has not been satisfactorily discussed for the case when real power is drawn from the inverter. This article addresses the control issues involved in a four-level inverter based AC drive application. The DC capacitor voltages are balanced for both motoring and regenerating modes of the inverter-motor system. In addition, DC voltages can be balanced even during motor startup with the associated large overcurrents.

Journal ArticleDOI
12 Oct 1998
TL;DR: In this article, a new pulsewidth modulation (PWM) inverter topology suitable for medium-voltage (2300/4160 V) adjustable-speed drive systems is proposed.
Abstract: In this paper, a new pulsewidth modulation (PWM) inverter topology suitable for medium-voltage (2300/4160 V) adjustable-speed drive systems is proposed. The modular inverter topology is derived by combining three standard three-phase inverter modules and a 0.33-pu output transformer. The output voltage is high-quality multistep PWM with low dv/dt. Further, the approach also guarantees balanced operation and 100% utilization of each three-phase inverter module over the entire speed range. These features enable the proposed topology to be suitable for powering constant-torque, as well as variable-torque type loads. Clean power utility interface of the proposed inverter system can be achieved via an 18-pulse input transformer. Analysis, simulation and experimental results are shown to validate the concepts.

Journal ArticleDOI
12 Oct 1998
TL;DR: In this article, an approximate closed-form solution is derived for the phase current and torque of an IPM synchronous machine with inductance saliency ratio greater than 2 (i.e., high-saliency machines).
Abstract: Interior permanent magnet (IPM) synchronous machine drives are vulnerable to a special fault mode when gating is suddenly removed from the inverter switches during high-speed operation. The resulting IPM machine operation as a generator in combination with an uncontrolled rectifier must be properly understood and accounted for in the machine design to avoid damage to either the machine or inverter. An approximate closed-form solution is derived in this paper which relates the resulting machine phase current (and torque) to the IPM machine parameters, the DC-link voltage and the rotor speed. The resulting operating characteristics are particularly interesting for IPM machines that have been designed with inductance saliency ratios greater than 2 (i.e., high-saliency machines). The validity of the approximate solution is confirmed using dynamic simulation results, and the implications of these results for the machine designer seeking to minimize or eliminate the impact of this undesired operating mode are thoroughly discussed.

Journal ArticleDOI
TL;DR: An accurate, analytical model for the evaluation of the CMOS inverter transient response and propagation delay for short-channel devices is presented and is in excellent agreement with SPICE simulations.
Abstract: In this paper an accurate, analytical model for the evaluation of the CMOS inverter transient response and propagation delay for short-channel devices is presented. An exhaustive analysis of the inverter operation is provided which results in accurate expressions of the output response to an input ramp. Most of the factors which influence the inverter operation are taken into account. The /spl alpha/-power law MOS model, which considers the carriers' velocity saturation effects of short-channel devices, is used. The final results are in excellent agreement with SPICE simulations.

Proceedings ArticleDOI
18 Oct 1998
TL;DR: A new way for predicting the output waveform produced by an inverter due to a non-square wave pulse at its input is presented and a novel way of modeling such gates by an equivalent inverter is developed to expedite the computation of the response of a logic gate to an input pulse.
Abstract: This paper addresses the problem of efficiently and accurately generating two-vector tests for crosstalk induced effects, such as pulses, signal speedup and slowdown, in digital combinational circuits. These effects are becoming more prevalent due to short signal switching times and deep submicron circuitry. These noise effects can propagate through a circuit and create a logic error in a latch or at a primary output. We first present a new way for predicting the output waveform produced by an inverter due to a non-square wave pulse at its input. Our modeling technique captures such properties as the amplitude of a pulse and its rise/fall times and the delay through a device. To expedite the computation of the response of a logic gate to an input pulse, we have developed a novel way of modeling such gates by an equivalent inverter. We have developed a mixed-signal test generator that incorporates classical PODEM-like static values as well as dynamic signals such as transitions and pulses, and timing information such as signal arrival times, rise/fall times, and gate delay. We also present a new analog cost function that is used to guide the search process. Comparison of results with SPICE simulations confirms the accuracy of this approach. This paper focuses primarily on crosstalk induced pulses, but these results have been extended to deal with speedup and slowdown effects.

Proceedings ArticleDOI
15 Feb 1998
TL;DR: In this article, reflected wave transient voltages that are impressed on drive output cables and low voltage AC induction motors are simulated with an excitation source of steep fronted d/spl nu/dt pulse waveforms from a pulse width modulated (PWM) voltage source inverter.
Abstract: Reflected wave transient voltages that are impressed on drive output cables and low voltage AC induction motors are simulated with an excitation source of steep fronted d/spl nu//dt pulse waveforms from a pulse width modulated (PWM) voltage source inverter. Motivation for system simulation arises from a need to correlate reflected wave peak voltage and risetime with the dielectric insulation capability of both motor and cable. Simulations based on an accurate system model also allow investigation into the effects of changing wire gauge, motor HP, cable distance or addition of drive output filters. System parameters of the inverter, cable and motor model are investigated in detail. Special emphasis is given to the importance of modeling cable skin and proximity effects. Simulation, measured lab and field results are compared. The main objective of the paper is to propose a reflected wave building block model that uses existing software on the market, is simple, computationally fast, easily configurable, reasonably accurate and allows investigation with wide variation of system parameters.

Patent
09 Oct 1998
TL;DR: In this article, a bypass switch control is provided to melt a fuse that is applicable to a unit inverter given with a circuit closing command by giving this circuit closingcommand to a bypass switching corresponding to applicable unit inverters in response to an operation abnormality detector and a DC abnormality detectors.
Abstract: A multiple inverter system of the present invention is disclosed. It includes a plurality of input transformers having secondary windings and a plurality of unit inverter cells connected in series at n stages to compose respective phases and supply the electric power to a multiple phase load in combination with the input transformers. The input transformers have 3n sets of three-phase windings at the secondary side and the secondary windings of the transformers, which are out-of-phase at each phase, are connected to unit inverter cells of each phase at the n-th stages. Further, the present invention is provided with a bypass switch control to melt a fuse that is applicable to a unit inverter given with a circuit closing command by giving this circuit closing command to a bypass switch corresponding to applicable unit inverters in response to an operation abnormality detector and a DC abnormality detector.

Proceedings Article
01 Oct 1998
TL;DR: In this article, an effective control scheme incorporated in the voltage-fed half-bridge series resonant inverter for induction heating applications, which is based upon a load-adaptive tuned frequency tracking control strategy using PLL (Phase Locked Loop) and its peripheral control circuit, is presented.
Abstract: - This paper presents an effective control scheme incorporated in the voltage-fed half-bridge series resonant inverter for induction heating applications, which is based upon a load-adaptive tuned frequency tracking control strategy using PLL(Phase Locked Loop) and its peripheral control circuit. The proposed control strategy ensures a stable operation characteristics of overall inverter system and ZVS(Zero Voltage Switching) operation in spite of sensitive load parameters variation as well as power regulation, specially in the non-magnetic heating loads The simulation results and the performance characteristics in the steady-state are shown as compared with the experimental results for a prototype induction cooking system rated at 1.2kW.

Journal ArticleDOI
TL;DR: In this article, a DC-AC inverter with no inductors or transformers is presented, where the role of the magnetic devices is played by a switched-capacitor (SC) circuit, formed by two subcircuits.
Abstract: A DC-AC inverter containing no inductors or transformers is presented. The role of the magnetic devices is played by a switched-capacitor (SC) circuit, formed by two subcircuits. Each SC-subcircuit contains 15 basic cells, each one formed by one capacitor, two MOSFETs and two diodes. The sinusoidal output waveform is realized in a staircase, formed by 64 steps. To achieve each step, the inverter operates like a step-up DC-DC converter: by using a certain number of SC-cells, the input voltage is boosted to the voltage required by the step in consideration. Each step is implemented in a large number of switching cycles. In each cycle, the inverter goes through four phases; according to a designed switching sequence, some of the capacitors of the SC-cells involved in the respective step are in a charging process from line, while the others are in a discharging process to the load. The phases 2 and 4 have a regulation role only. A duty cycle control is used. A Fourier analysis evidences the clean AC output waveform. The inverter exhibits low weight, high power density, and enhanced regulation for large changes in line and load.

Journal ArticleDOI
TL;DR: In this paper, a single-stage electronic ballast with a dimming feature and a unity power factor is proposed, which is suitable for applications with moderate power level and low-line voltage while requiring a high-output voltage.
Abstract: Analysis, design, and practical consideration of a single-stage electronic ballast with dimming feature and unity power factor are presented in this paper. The proposed single-stage ballast is the combination of a boost converter and a half-bridge series-resonant parallel-loaded inverter. The boost semistage working in the discontinuous conduction mode functions as a power factor corrector and the inverter semistage operated above resonance are employed to ballast the lamp. Replacing the lamp with the plasma model, analysis of the ballast is fulfilled. The dimming feature is carried out by pulse-width modulation (PWM) and variable-frequency controls simultaneously. The proposed single-stage ballast is suitable for applications with moderate power level and low-line voltage while requiring a high-output voltage. It can save a controller, an active switch and its driver, reduce size, and possibly increase system reliability while requiring two additional diodes over a conventional two-stage system. A prototype was implemented to verify the theoretical discussion. The hardware measurements have shown that the desired performance can be achieved feasibly.

Journal ArticleDOI
12 Oct 1998
TL;DR: In this article, a pulse-density-modulated (PDM) series-resonant voltage-source inverter developed for corona discharge processes is presented, which produces either a square-wave AC-voltage state or a zero-voltage state at its AC terminals to control the average output voltage under constant DC voltage and operating frequency.
Abstract: This paper presents the control and performance of a pulse-density-modulated (PDM) series-resonant voltage-source inverter developed for corona discharge processes. The PDM inverter produces either a square-wave AC-voltage state or a zero-voltage state at its AC terminals to control the average output voltage under constant DC voltage and operating frequency. This results in a wide range of power control from 0.5% to 100%, even in the corona discharge load with a strong nonlinear characteristic. A 30 kHz 6 kW surface treatment system consisting of a voltage-source PDM inverter, a step-up transformer, and a corona discharge treater shows the establishment of a stable corona discharge in an extremely wide range of power control and, therefore, succeeds in performing both strong and weak surface treatment processes for film.

Proceedings ArticleDOI
31 Aug 1998
TL;DR: In this paper, the authors proposed a novel instantaneous current sharing control scheme ensuring a fast dynamic response and an equal load sharing capability in a parallel connected UPS (inverter) which is based on the instantaneous output voltage control with the current deviation control and the instantaneous current deviation cancellation control utilizing the current share bus circuit.
Abstract: This paper proposes a novel instantaneous current sharing control scheme ensuring a fast dynamic response and an equal load sharing capability in a parallel connected UPS (inverter) The proposed novel instantaneous current sharing control scheme is based on the instantaneous output voltage control with the current deviation control and the instantaneous current deviation cancellation control utilizing the current share bus circuit The proposed novel instantaneous current sharing control circuitry employs the share bus signal line interconnecting all the paralleled inverter on a noise insensitive line The voltage control circuitry forces all the paralleled inverters to share load current, almost equally, by adjustment of the instantaneous reference voltage signal obtained from the current share bus With the current share bus and the current deviation controller, the paralleled inverter with the highest output current becomes the master inverter; then all the other inverters become slave inverters The instantaneous output current of the master inverter is subtracted from the other inverters' output currents, and the current deviations in each inverter module are calculated Hereafter, the instantaneous current sharing controller forces the output current deviations of each inverter to be zero in every switching period Furthermore, the output reference of the voltage controller is instantaneously to eliminate the unbalanced power This results in superior power balance performance for parallel operation

Journal ArticleDOI
TL;DR: The validity of the basic idea behind the circuits presented here is proven, and the device counts and the number of logic stages required for the present circuits are less than half those for conventional ones.
Abstract: By using resonant-tunneling diodes (RTDs) and high electron mobility transistors (HEMTs), we implement a new class of logic circuits that operate with multiple thresholds and multilevel output. The basic idea of the circuits is to synthesize transfer characteristics by key logic elements, namely, up and down literals. We first describe two fundamental logic circuits based on this idea: a ternary inverter and a literal gate. Then we present experimental results on these circuits fabricated by integrating InP-based RTDs and HEMTs. It is found that these circuits operate successfully with threshold voltages and output levels that have been predicted from individual device characteristics. Consequently, the validity of the basic idea behind the circuits presented here is proven. The device counts and the number of logic stages required for the present circuits are less than half those for conventional ones. A possible application is finally discussed.

Patent
08 Sep 1998
TL;DR: In this article, a microprocessor-based inverter is used to accelerate a gas turbine to reach a self-sustaining gas turbine operating conditions, where the microprocessor monitors turbine conditions and controls fuel flow to the gas turbine combustor.
Abstract: A turbogenerator/motor controller with a microprocessor based inverter having multiple modes of operation. To start the turbine, the inverter connects to and supplies fixed current, variable voltage, variable frequency, AC power to the permanent magnet turbogenerator/motor, driving the permanent magnet turbogenerator/motor as a motor to accelerate the gas turbine. During this acceleration, spark and fuel are introduced in the correct sequence, and self-sustaining gas turbine operating conditions are reached. The inverter is then disconnected from the permanent magnet generator/motor, reconfigured to a controlled 60 hertz mode, and then either supplies regulated 60 hertz three phase voltage to a stand alone load or phase locks to the utility, or to other like controllers, to operate as a supplement to the utility. In this mode of operation, the power for the inverter is derived from the permanent magnet generator/motor via high frequency rectifier bridges. The microprocessor monitors turbine conditions and controls fuel flow to the gas turbine combustor.

Journal ArticleDOI
TL;DR: In this article, a voltage-fed quasi-load resonant inverter with a constant-frequency variable-power (CFVP) regulation scheme was developed for the next-generation high-frequency high-power induction-heated (IH) cooking appliances in household applications.
Abstract: This paper presents a new prototype of a voltage-fed quasi-load resonant inverter with a constant-frequency variable-power (CFVP) regulation scheme, which is developed for the next-generation high-frequency high-power induction-heated (IH) cooking appliances in household applications. This application-specific high-frequency single-ended push-pull inverter using new-generation specially designed insulated gate bipolar transistors (IGBTs) can efficiently operate under a principle of zero-voltage switching pulsewidth modulation (ZVS-PWM) strategy. This low-cost soft-switching inverter using reverse-conducting and reverse-blocking IGBTs is more suitable for multiple-burner-type induction-heating cooking appliances. The operating principle and unique features of a new resonant ZVS-PWM inverter circuit topology is originally described, together with its steady-state power regulation characteristics, which are illustrated on the basis of its computer-aided simulation and experimental results. The ZVS operation condition on power regulation, loss analysis of new IGBTs incorporated into this inverter, and its active filtering performance are discussed for IH cooking appliances.


Journal ArticleDOI
TL;DR: The most commonly used output filter arrangements are simple output line inductors, output limit filter, sine wave output filter, and motor termination filter as discussed by the authors, which can be used to condition the output voltage before it is applied to the cable.
Abstract: When an induction motor is energized from a pulse width modulated (PWM) inverter, through long connecting cables, its insulation system can be severely stressed. The high dv/dt voltage pulses at the output of the inverter cause traveling waves in the connecting cable between the inverter and the motor. When the traveling wave reaches the motor, a large impedance mismatch is present which leads to a reflected voltage wave that, when added to the incoming incident wave, can reach two times the inverter output voltage. The resulting overvoltage at the motor terminals stresses the insulation system and can lead to reduced motor life. Various output filter arrangements can be used to condition the inverter output voltage before it is applied to the cable. The advantage of adding output filtering is that the dielectric stress on the motor insulation and the inverter cable charging current can both be reduced. The major disadvantages of adding filtering is that they represent extra cost, they require extra mounting space, and they introduce extra losses in the system. The most commonly used types of inverter output filters are: simple output line inductors; output limit filter; sine wave output filter; and motor termination filter. These filters are discussed.

Journal ArticleDOI
TL;DR: In this article, an accurate analytical model for the evaluation of the delay and the short-circuit power dissipation of the CMOS inverter is presented. But the model does not take into account the influences of the shortcircuit current during switching, and the gate-to-drain coupling capacitance.
Abstract: This paper introduces a new, accurate analytical model for the evaluation of the delay and the short-circuit power dissipation of the CMOS inverter. Following a detailed analysis of the inverter operation, accurate expressions for the output response to an input ramp are derived. Based on this analysis improved analytical formulae for the calculation of the propagation delay and short-circuit power dissipation, are produced. Analytical expressions for all inverter operation regions and input waveform slopes are derived, which take into account the influences of the short-circuit current during switching, and the gate-to-drain coupling capacitance. The effective output transition time of the inverter is determined in order to map the real output voltage waveform to a ramp waveform for the model to be applicable in an inverter chain. The final results are in very good agreement with SPICE simulations.

Proceedings ArticleDOI
21 Sep 1998
TL;DR: In this article, Park's vector approach was used to diagnose voltage source inverter faults, such as output single-phasing and the occurrence of either a short-circuit or an open circuit of the controlled power switches.
Abstract: This paper presents the use of the Park's vector approach for diagnosing voltage source inverter faults, like output single-phasing and the occurrence of either a short-circuit or an open circuit of the controlled power switches. For this study, a prototype was built, having all the power terminals available for testing, including the ones for every semiconductor. For the short-circuit tests, a 17 /spl Omega/ auxiliary resistor was used, connected in parallel with the power switch to be tested, in order to limit the short-circuit current.