Showing papers on "Inverter published in 2012"
TL;DR: This paper demonstrates an inverter, a NAND gate, a static random access memory, and a five-stage ring oscillator based on a direct-coupled transistor logic technology based on the semiconducting nature of molybdenum disulfide.
Abstract: Two-dimensional (2D) materials, such as molybdenum disulfide (MoS2), have been shown to exhibit excellent electrical and optical properties. The semiconducting nature of MoS2 allows it to overcome the shortcomings of zero-bandgap graphene, while still sharing many of graphene’s advantages for electronic and optoelectronic applications. Discrete electronic and optoelectronic components, such as field-effect transistors, sensors, and photodetectors made from few-layer MoS2 show promising performance as potential substitute of Si in conventional electronics and of organic and amorphous Si semiconductors in ubiquitous systems and display applications. An important next step is the fabrication of fully integrated multistage circuits and logic building blocks on MoS2 to demonstrate its capability for complex digital logic and high-frequency ac applications. This paper demonstrates an inverter, a NAND gate, a static random access memory, and a five-stage ring oscillator based on a direct-coupled transistor logic...
1,555 citations
TL;DR: The problem is described, the solution to this issue is clearly explained using a three-phase inverter as an example, and experimental results to validate this solution are shown.
Abstract: When control schemes based on finite control set model predictive control are experimentally implemented, a large amount of calculations is required, introducing a considerable time delay in the actuation. This delay can deteriorate the performance of the system if not considered in the design of the controller. In this paper, the problem is described, and the solution to this issue is clearly explained using a three-phase inverter as an example. Experimental results to validate this solution are shown.
910 citations
TL;DR: In this article, an improved single-phase inverter topology is presented to eliminate the common-mode leakage current in the transformerless photovoltaic grid-connected system, and the high efficiency and convenient thermal design are achieved thanks to the decoupling of two additional switches connected to the dc side.
Abstract: To eliminate the common-mode leakage current in the transformerless photovoltaic grid-connected system, an improved single-phase inverter topology is presented. The improved transformerless inverter can sustain the same low input voltage as the full-bridge inverter and guarantee to completely meet the condition of eliminating common-mode leakage current. Both the unipolar sinusoidal pulsewidth modulation (SPWM) as well as the double-frequency SPWM control strategy can be applied to implement the three-level output in the presented inverter. The high efficiency and convenient thermal design are achieved thanks to the decoupling of two additional switches connected to the dc side. Moreover, the higher frequency and lower current ripples are obtained by adopting the double-frequency SPWM, and thus the total harmonic distortion of the grid-connected current are reduced greatly. Furthermore, the influence of the phase shift between the output voltage and current, and the influence of the junction capacitances of the power switches are analyzed in detail. Finally, a 1-kW prototype has been simulated and tested to verify the theoretical analysis of this paper.
507 citations
TL;DR: A new topology with a reversing-voltage component is proposed to improve the multilevel performance by compensating the disadvantages mentioned and the overall cost and complexity are greatly reduced particularly for higher output voltage levels.
Abstract: Multilevel inverters have been widely accepted for high-power high-voltage applications. Their performance is highly superior to that of conventional two-level inverters due to reduced harmonic distortion, lower electromagnetic interference, and higher dc link voltages. However, it has some disadvantages such as increased number of components, complex pulsewidth modulation control method, and voltage-balancing problem. In this paper, a new topology with a reversing-voltage component is proposed to improve the multilevel performance by compensating the disadvantages mentioned. This topology requires fewer components compared to existing inverters (particularly in higher levels) and requires fewer carrier signals and gate drives. Therefore, the overall cost and complexity are greatly reduced particularly for higher output voltage levels. Finally, a prototype of the seven-level proposed topology is built and tested to show the performance of the inverter by experimental results.
397 citations
22 Jul 2012
TL;DR: This paper will illustrate how, depending on the circuit topology and its loading condition, the inverter's optimal reactive power injection is not necessarily monotone with respect to their real power output.
Abstract: The intent of the study detailed in this paper is to demonstrate the benefits of inverter var control on a fast timescale to mitigate rapid and large voltage fluctuations due to the high penetration of photovoltaic generation and the resulting reverse power flow. Our approach is to formulate the volt/var control as a radial optimal power flow (OPF) problem to minimize line losses and energy consumption, subject to constraints on voltage magnitudes. An efficient solution to the radial OPF problem is presented and used to study the structure of optimal inverter var injection and the net benefits, taking into account the additional cost of inverter losses when operating at non-unity power factor. This paper will illustrate how, depending on the circuit topology and its loading condition, the inverter's optimal reactive power injection is not necessarily monotone with respect to their real power output. The results are demonstrated on a distribution feeder on the Southern California Edison system that has a very light load and a 5 MW photovoltaic (PV) system installed away from the substation.
376 citations
TL;DR: A novel switched-capacitor inverter, which does not need any inductors, can be smaller than a conventional two-stage unit which consists of a boost converter and an inverter bridge and its output harmonics are reduced compared to a conventional voltage source single phase full bridge inverter.
Abstract: A novel switched-capacitor inverter is proposed. The proposed inverter outputs larger voltage than the input voltage by switching the capacitors in series and in parallel. The maximum output voltage is determined by the number of the capacitors. The proposed inverter, which does not need any inductors, can be smaller than a conventional two-stage unit which consists of a boost converter and an inverter bridge. Its output harmonics are reduced compared to a conventional voltage source single phase full bridge inverter. In this paper, the circuit configuration, the theoretical operation, the simulation results with MATLAB/SIMULINK, and the experimental results are shown. The experimental results accorded with the theoretical calculation and the simulation results.
370 citations
TL;DR: In this paper, an improved finite control set-model predictive control (FCS-MPC) with an optimized weighting factor is presented, which is based on dividing the control interval into two parts.
Abstract: In this paper, an improved finite control set-model predictive control (FCS-MPC) with an optimized weighting factor is presented. The main goal of this paper is reducing the torque ripples when the FCS-MPC is implemented by means of the two-level inverter. For this purpose, the weighting factor is calculated via an optimization method. The optimization is based on dividing the control interval into two parts: active time for applying the active voltage vectors and zero time for applying the zero voltage. With this technique, the torque ripple is calculated as a function of weighting factor and it is optimized. The method is validated by simulations and experiments, using two-level inverter, at two speed regions (nominal speed and low speed). The results are compared with conventional FCS-MPC.
368 citations
TL;DR: The LLCL filter as mentioned in this paper inserts a small inductor in the branch loop of the capacitor in the traditional LCL filter to compose a series resonant circuit at the switching frequency, which attenuates the switching-frequency current ripple components much better than an LCL filtering.
Abstract: This paper presents a new topology of higher order power filter for grid-tied voltage-source inverters, named the LLCL filter, which inserts a small inductor in the branch loop of the capacitor in the traditional LCL filter to compose a series resonant circuit at the switching frequency. Particularly, it can attenuate the switching-frequency current ripple components much better than an LCL filter, leading to a decrease in the total inductance and volume. Furthermore, by decreasing the inductance of a grid-side inductor, it raises the characteristic resonance frequency, which is beneficial to the inverter system control. The parameter design criteria of the proposed LLCL filter is also introduced. The comparative analysis and discussions regarding the traditional LCL filter and the proposed LLCL filter have been presented and evaluated through experiment on a 1.8-kW-single-phase grid-tied inverter prototype.
350 citations
TL;DR: Two basic traction electric drive systems of electric/hybrid vehicles are presented and evaluated, with a special focus on the efficiency analysis of the main drive components efficiency, including the global drive efficiency, presented in the form of efficiency maps.
Abstract: One of the most important research topics in drive train topologies applied to electric/hybrid vehicles is the efficiency analysis of the power train components, including the global drive efficiency. In this paper, two basic traction electric drive systems of electric/hybrid vehicles are presented and evaluated, with a special focus on the efficiency analysis. The first topology comprises a traditional pulsewidth-modulation (PWM) battery-powered inverter, whereas in the second topology, the battery is connected to a bidirectional dc-dc converter, which supplies the inverter. Furthermore, a variable-voltage control technique applied to this second topology is presented, which allows for the improvement of the drive overall performance. Some simulation results are presented, considering both topologies and a permanent-magnet synchronous motor (PMSM). An even more detailed analysis is performed through the experimental validation. Particular attention is given to the evaluation of the main drive components efficiency, including the global drive efficiency, presented in the form of efficiency maps. Other parameters such as motor voltage distortion and power factor are also considered. In addition, the comparison of the two topologies takes into account the drive operation under the motoring and regenerative-braking modes.
261 citations
TL;DR: In this paper, a two-level fault-tolerant voltage source inverter for permanent magnet drives is systematically designed and tested, and a redundant leg is added that replaces the faulted leg.
Abstract: In this paper, a two-level fault-tolerant voltage source inverter (VSI) for permanent magnet drives is systematically designed and tested. A standard two-level inverter consists of three legs. In this case of fault-tolerant inverter, a redundant leg is added that replaces the faulted leg. Faulted leg isolation and redundant leg insertion are done by using independent back-to-back-connected thyristors. The proposed inverter provides tolerance to both short-circuit and open-circuit faults of the switching devices. The postfault performance is the same as the normal prefault operation and fault compensation is fast enough such that there is negligible disturbance in the drive operation. The fault tolerance of the inverter is verified using field-oriented control of a permanent magnet synchronous motor.
259 citations
TL;DR: A sensorless three-level neutral-point-clamped inverter-fed induction motor drive is proposed and Fuzzy logic control and the speed-adaptive flux observer are introduced to enhance the performance of the system.
Abstract: A sensorless three-level neutral-point-clamped inverter-fed induction motor drive is proposed in this paper. The conventional direct torque control (DTC) switching table fails to consider the circuit limitations, such as neutral-point-balance and smooth vector switching, caused by the topology of a three-level inverter. Two kinds of modified schemes for three-level DTC are proposed to solve these problems. They also provide performance enhancement while maintaining robustness and simplicity. Fuzzy logic control and the speed-adaptive flux observer (with novel gain and load toque observation) are introduced to enhance the performance of the system. The issue of large starting current is investigated and solved by introducing the technique of preexcitation. A 32-bit fixed-point DSP-based motor drive is developed to achieve high-performance sensorless control over a wide speed range. The effectiveness of the proposed schemes is confirmed by simulation implementation and experimental validation.
TL;DR: The main contribution of this paper is the proposal of new modulation techniques for three-phase transformerless neutral point clamped inverters to eliminate leakage currents in photovoltaic systems without requiring any modification on the multilevel inverter or any additional hardware.
Abstract: The main contribution of this paper is the proposal of new modulation techniques for three-phase transformerless neutral point clamped inverters to eliminate leakage currents in photovoltaic systems without requiring any modification on the multilevel inverter or any additional hardware. The modulation techniques are capable of reducing the leakage currents in photovoltaic systems by applying three medium vectors or using only two medium vectors and one specific zero vector to compose the reference vector. In addition, to increase the system utilization, the three-phase neutral point clamped inverter can be designed to also provide functions of active filter using the p-q theory. The proposed system provides maximum power point tracking and compensation of current harmonics and reactive power. To validate the simulation models, an experimental three-phase inverter is used to evaluate leakage currents and the dc link voltage control.
18 May 2012
TL;DR: In this article, a new methodology for optimal design of transformerless photovoltaic (PV) inverters targeting a cost-effective deployment of grid-connected PV systems is presented.
Abstract: This paper presents a new methodology for optimal design of transformerless photovoltaic (PV) inverters targeting a cost-effective deployment of grid-connected PV systems. The optimal switching frequency as well as the optimal values and types of the PV inverter components is calculated such that the PV inverter LCOE generated during the PV system lifetime period is minimized. The LCOE is also calculated considering the failure rates of the components, which affect the reliability performance and lifetime maintenance cost of the PV inverter. A design example is presented, demonstrating that compared to the nonoptimized PV inverter structures, the PV inverters designed using the proposed optimization methodology exhibit lower total manufacturing and lifetime maintenance cost and inject more energy into the electric-grid and by that minimizing LCOE.
01 Sep 2012
TL;DR: In this article, the authors demonstrate an inverter, a NAND gate, a static random access memory, and a five-stage ring oscillator based on a direct-coupled transistor logic technology.
Abstract: Two-dimensional (2D) materials, such as molybdenum disulfide (MoS2), have been shown to exhibit excellent electrical and optical properties. The semiconducting nature of MoS2 allows it to overcome the shortcomings of zero-bandgap graphene, while still sharing many of graphene’s advantages for electronic and optoelectronic applications. Discrete electronic and optoelectronic components, such as field-effect transistors, sensors and photodetectors made from few-layer MoS2 show promising performance as potential substitute of Si in conventional electronics and of organic and amorphous Si semiconductors in ubiquitous systems and display applications. An important next step is the fabrication of fully integrated multi-stage circuits and logic building blocks on MoS2 to demonstrate its capability for complex digital logic and high-frequency ac applications. This paper demonstrates an inverter, a NAND gate, a static random access memory, and a five-stage ring oscillator based on a direct-coupled transistor logic technology. The circuits comprise between two to twelve transistors seamlessly integrated side-byside on a single sheet of bilayer MoS2. Both enhancement-mode and depletion-mode transistors were fabricated thanks to the use of gate metals with different work functions.
TL;DR: In this paper, a fault-detection method for an open-switch fault in the switches of grid-connected neutral-point-clamped inverter systems is proposed, which can not only detect the fault condition but also identify the location of the faulty switch.
Abstract: This paper proposes a fault-detection method for an open-switch fault in the switches of grid-connected neutral-point-clamped inverter systems. The proposed method can not only detect the fault condition but also identify the location of the faulty switch. In the proposed method, which is designed by incorporating a simple switching control in the conventional method, the fault condition is detected on the basis of the radius of the Concordia current pattern, and the location of the faulty switch can be identified. By using the proposed method, it is possible to detect the open-switch fault and identify the faulty switch within two fundamental periods, without using additional sensors or performing complex calculations. Simulations and experiments are carried out to confirm the reliability of the proposed fault-detection method.
TL;DR: In this article, a single-phase grid-connected transformerless photovoltaic inverter for residential application is presented, which is derived from a boost cascaded with a buck converter along with a line frequency unfolding circuit.
Abstract: In this paper, a single-phase grid-connected transformerless photovoltaic inverter for residential application is presented. The inverter is derived from a boost cascaded with a buck converter along with a line frequency unfolding circuit. Due to its novel operating modes, high efficiency can be achieved because there is only one switch operating at high frequency at a time, and the converter allows the use of power MOSFET and ultrafast reverse recovery diode. It also features a robust structure because the phase leg does not have a shoot-through issue. This paper begins with theoretical analysis and modeling of this boost-buck converter-based inverter. And the model indicates that small boost inductance will lead to an increase in the resonant pole frequency and a decrease in the peak of Q, which results in easier control and greater stability. Thus, interleaved multiple phases structure is proposed to have small equivalent inductance; meanwhile, the ripple can be decreased, and the inductor size can be reduced as well. A two-phase interleaved inverter is then designed accordingly. Finally, the simulation and experiment results are shown to verify the concept and the tested efficiency under 1-kW power condition is up to 98.5%.
TL;DR: In this article, a fixed-switching frequency sliding mode controller is proposed for a single-phase unipolar inverter, and the smoothing procedure is based on limitation of pulsewidth modulator.
Abstract: Sliding mode control (SMC) is recognized as robust controller with a high stability in a wide range of operating conditions, although it suffers from chattering problem. In addition, it cannot be directly applied to multiswitches power converters. In this paper, a high performance and fixed switching frequency sliding mode controller is proposed for a single-phase unipolar inverter. The chattering problem of SMC is eliminated by smoothing the control law in a narrow boundary layer, and a pulsewidth modulator produces the fixed frequency switching law for the inverter. The smoothing procedure is based on limitation of pulsewidth modulator. Although the smoothed control law limits the performance of SMC, regulation and dynamic response of the inverter output voltage are in an acceptable superior range. The performance of the proposed controller is verified by both simulation and experiments on a prototype 6-kVA inverter. The experimental results show that the total harmonic distortion of the output voltage is less than 1.1% and 1.7% at maximum linear and nonlinear load, respectively. Furthermore, the output dynamic performance of the inverter strictly conforms the standard IEC62040-3. Moreover, the measured efficiency of the inverter in the worst condition is better than 95.5%.
TL;DR: In this article, an open-loop control of the secondary current, based on feedback control of primary current, is proposed in order to bypass the difficulties posed by the moving right half plane zero in the duty cycle to secondary current transfer function.
Abstract: The unfolding-type flyback inverter operating in discontinuous conduction mode (DCM) is popular as a low-cost solution for a photovoltaic (PV) ac module application. This paper aims to improve the efficiency by using a scheme based on continuous conduction mode (CCM) for this application. Design issues, both for the power scheme and the control scheme, are identified and trade-offs investigated. An open-loop control of the secondary current, based on feedback control of the primary current, is proposed in order to bypass the difficulties posed by the moving right half plane zero in the duty cycle to secondary current transfer function. The results presented show an improvement of 8% in California efficiency compared to the benchmark DCM scheme for a 200-W PV module application. The output power quality at rated power level is capable of meeting IEC61727 requirements. The stability of the flyback inverter in CCM has been verified at selected working conditions.
TL;DR: An improved three-level grid-connected inverter is proposed based on the NPCTLI and the dual-buck half-bridge inverter (DBHBI), and which avoids the shoot-through problem and is referred to as split-inductor NP CTLI (SI-NPCTLI).
Abstract: Characterized by low leakage current and low voltage stress of the power device, a neutral point clamped three-level inverter (NPCTLI) is suitable for a transformerless photovoltaic (PV) grid-connected system. Unfortunately, the shoot-through problem of bridge legs still exists in an NPCTLI, so its operation reliability is degraded. An improved three-level grid-connected inverter is proposed based on the NPCTLI and the dual-buck half-bridge inverter (DBHBI), and which avoids the shoot-through problem. The proposed topology guarantees no switching-frequency common-mode voltage and no shoot-through risk. Furthermore, the freewheeling diode of bridge legs of the DBHBI can be removed taking into consideration the unity power factor of grid current, and a straightforward topology is thus derived. The new topology is referred to as split-inductor NPCTLI (SI-NPCTLI). The operation mode, common-mode characteristic, and control strategy are analyzed. Finally, both the simulation and the experimental results of a 1-kW SI-NPCTLI prototype verify the analysis.
TL;DR: In this paper, a three-phase, five-level inverter topology with a single-dc source is presented by cascading a 3-level flying capacitor inverter with a flying H-bridge power cell in each phase.
Abstract: In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topology is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamental) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This feature improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor.
TL;DR: In this article, a new multilevel converter topology was introduced, which can synthesise all possible additive and subtractive combinations of input DC levels in the output voltage waveform with fewer power electronic switches.
Abstract: This study introduces a new multilevel converter topology, which can synthesise all possible additive and subtractive combinations of input DC levels in the output voltage waveform with fewer power electronic switches. An appropriate modulation scheme has also been proposed for low switching frequency operation of the proposed topology. As compared with the classic multilevel topologies, the proposed topology results in reduction of the number of switches and conduction losses. The operation and performance of the proposed multilevel converter has been ascertained through simulations and verified experimentally for single-phase nine-level multilevel inverter. Moreover, a 15-level inverter with asymmetric source configuration has been also investigated for charge balance control using the proposed modulation scheme. The same has been verified experimentally for effective balanced power delivery.
01 Dec 2012
TL;DR: In this article, the authors present the most important topologies of multilevel inverters, including diode-clamped inverter (neutral-point clamped), capacitor-capped, and cascaded multi-level with separate dc sources.
Abstract: Multilevel inverters have been attracting in favor of academia as well as industry in the recent decade for high-power and medium-voltage energy control. In addition, they can synthesize switched waveforms with lower levels of harmonic distortion than an equivalently rated two-level converter. The multilevel concept is used to decrease the harmonic distortion in the output waveform without decreasing the inverter power output. This paper presents the most important topologies like diode-clamped inverter (neutral- point clamped), capacitor-clamped (flying capacitor), and cascaded multilevel with separate dc sources. This paper also presents the most relevant modulation methods developed for this family of converters: multilevel sinusoidal pulse width modulation, multilevel selective harmonic elimination, and space-vector modulation. Authors strongly believe that this survey article will be very much useful to the researchers for finding out the relevant references in the field of topologies and modulation strategies of multilevel inverter.
TL;DR: Using the genetic algorithm, a total harmonic distortion minimization process is directly applied to the line-to-line voltage of the inverter, indicating superiority of this approach over the commonly used phase-voltage THD minimization approach.
Abstract: In this paper, total harmonic distortion (THD) minimization of the output voltage of multilevel inverters is discussed. An efficient approach in reducing the harmonic contents of the inverter's output voltage is THD minimization. In multilevel inverters with a fundamental frequency switching strategy (each switch turning on and off once per output cycle), the switching angles can be selected so that the output THD is minimized (such as the so-called optimal-minimization-of-THD strategy). To obtain the optimum switching angles, an optimization algorithm is applied to the output-voltage THD. In three-phase multilevel inverters, the optimization algorithm is commonly applied to the phase voltage of the inverter. This results in the minimum THD in phase voltage but not necessarily in the line-to-line minimum THD, whereas in three-phase applications, the line-voltage harmonics are of the main concern from the load point of view. In this paper, using the genetic algorithm, a THD minimization process is directly applied to the line-to-line voltage of the inverter. This paper is based on a seven-level inverter. To verify the simulation results, a seven-level-cascaded-H-bridge-inverter-based hardware prototype, including an ATMEGA32 AVR microcontroller, has been implemented. Both simulation and experimental results indicate superiority of this approach over the commonly used phase-voltage THD minimization approach.
TL;DR: A method to monitor solder fatigue in a voltage source inverter insulated gate bipolar transistor power module by detecting the change of an inverter output harmonic is presented.
Abstract: Condition monitoring power semiconductor devices can inform converter maintenance and reduce damage. This paper presents a method to monitor solder fatigue in a voltage source inverter insulated gate bipolar transistor power module by detecting the change of an inverter output harmonic. It is shown that low-order harmonics, caused by nonideal switching, are affected by the device junction temperature, which in turn depends upon module solder condition. To improve the detection accuracy of the phenomenon, the inverter controller is set to cause harmonic resonance at the target harmonic frequency. The would-be resonance is suppressed by an outer control loop where the control action can be used as the condition monitoring signal. Simulation and experiment are presented to validate the method and evaluate its performance in operation.
TL;DR: In this paper, two topologies are presented for switched-inductor quasi-Z-source inverters, namely a ripple input current switched-independant quasi-source (rSL-qZSI) and a continuous input current SWZSI (cSL-QZSI).
Abstract: In this study, two topologies are presented for switched-inductor quasi-Z-source inverters, namely a ripple input current switched-inductor quasi-Z-source inverter (rSL-qZSI) and a continuous input current switched-inductor quasi-Z-source inverter (cSL-qZSI). The proposed inverters possess high boost voltage inversion ability and a lower voltage stress across the active switching devices. Compared with a conventional switched-inductor ZSI, the proposed SL-qZSIs for the same input and output voltage provide a continuous input current and a reduced voltage stress on the capacitors. Moreover, the proposed inverters can overcome the startup inrush current problem but a conventional SL-qZSI cannot overcome this. This study presents the operating principles and analysis, and compares them with the conventional ZSIs. In order, to verify the performance of the proposed converters, a 60 W scaled-down laboratory prototype was constructed and, to test both the configurations it employed a 36 V dc input and an ac output line-to-line voltage of 83 V rms . The peak-to-peak input current ripple of the rSL-qZSI and cSL-ZSI is 126.3 and 59.8%, respectively. The experiment results verified that the proposed inverters have high step-up inversion ability, lower voltage stress on the capacitors and lower input current ripple.
TL;DR: A combination of low- and high-frequency hybrid active power filter to operate in parallel for better performance and a combination of feedforward and feedback controller is designed for the proposed conditioner.
Abstract: This paper proposes a combination of low- and high-frequency hybrid active power filter (APF) to operate in parallel for better performance. The individual hybrid APF is a series combination of L-C filter with the corresponding voltage source inverter. The dc links of both the inverters are connected in parallel, and the voltage of the dc link is maintained by the low-frequency inverter (LFI). The low- and high-frequency inverters eliminate lower order and higher order harmonics, respectively. In addition, it is possible to design the LFI such that it can also compensate the reactive power of the load. The individual L-C filter of the hybrid topology is designed to take care of specific order of harmonics that are predominant in the load. A combination of feedforward and feedback controller is designed for the proposed conditioner. The performances of the proposed topology and the controller are first examined by MATLAB/SIMULINK-based simulation. An experimental prototype is also designed to confirm the usefulness of the proposed system.
12 Nov 2012
TL;DR: This work addresses the controller design issue for a dc-dc DAB converter when driving a regulated single-phase dc-ac inverter, and two methods are proposed to improve the regulation of the output voltage of DAB converters.
Abstract: A solid-state transformer (SST) is a high-frequency power electronic converter that is used as a distribution power transformer. A common three-stage configuration of an SST consists of ac-dc rectifier, isolated dc-dc dual-active-bridge (DAB) converter, and dc-ac inverter. This study addresses the controller design issue for a dc-dc DAB converter when driving a regulated single-phase dc-ac inverter. Since the switching frequency of the inverter stage is much higher than that of the DAB stage, the single-phase inverter is modeled as a double-line-frequency (e.g., 120 Hz) current sink. The effect of 120-Hz current by the single-phase inverter is studied. The limitation of a PI-controller, low gain at 120 Hz, is investigated. Two methods are proposed to improve the regulation of the output voltage of DAB converters. The first one uses a bandstop filter and feedforward, while the second method uses an additional proportional-resonant controller in the feedback loop. Theoretical analysis, simulation, and experiment results are provided.
TL;DR: A novel six-band hysteresis technique to efficiently control the seven-level packed U cells (PUC) converter using the advantages of the flying capacitor and the cascaded H-bridge topologies is proposed.
Abstract: In this paper, the authors propose a novel six-band hysteresis technique to efficiently control the seven-level packed U cells (PUC) converter. The proposed PUC combines advantages of the flying capacitor and the cascaded H-bridge topologies. The novel control strategy is proposed in order to insure a good operation of the PUC converter in both inverter and rectifier modes. In case of rectifier operation, the proposed six-band controller is designed to draw a sinusoidal line current (load current in case of inverter operation) with a unity power factor. Harmonics contents of line current (or load current) and rectifier input voltage (or inverter output voltage) are very low which permits the reduction of the active and passive filters ratings resulting on a very high energetic efficiency and a reduced installation cost. The proposed concept was validated through experimental implementation using real-time controller, the DS1103 of dSpace.
TL;DR: This paper presents an advanced grid-tied inverter controls concept based on reproducing favorable characteristics of traditional generators that result in load-following tendencies, and is accordingly dubbed Generator Emulation Controls (GEC).
Abstract: The grid faces a number of challenges related to large-scale integration of intermittent distributed generation (DG) such as photovoltaics (PV). Power quality challenges include voltage regulation issues, flicker, and frequency volatility. Operational challenges include the need for extension of the command-and-control infrastructure to millions of devices anticipated on the low-voltage (service) side of the distribution network. This paper presents an advanced grid-tied inverter controls concept designed to address such challenges. This controls concept is based on reproducing favorable characteristics of traditional generators that result in load-following tendencies, and is accordingly dubbed Generator Emulation Controls (GEC). Traditional generators are analyzed with specific focus on such favorable characteristics as inertial dynamics and controlled impedance. Details of GEC are then presented, and its implementation is outlined based on the evolution of conventional grid-tied inverter controls. This is followed by an examination of the system impact of GEC-operated devices. GEC allows DG inverters to perform voltage regulation support, reactive power compensation, and fault ride-through. GEC also allows DG inverters to form scalable inverter-based microgrids, capable of operating in grid-tied mode or separating and supporting an islanded load. Simulation results are presented to examine the impact on voltage regulation and power losses across a distribution feeder. Two experimental test beds are used to demonstrate voltage regulation support, transient suppression, and microgridding capabilities.
12 Nov 2012
TL;DR: In this article, a load compensator based on the decomposition of output current, in addition to the outer droop-based power controller, as well as inner voltage and current controllers, is proposed.
Abstract: Harmonic current filtering and resonance damping have become important concerns on the control of an islanded microgrids. To address these challenges, this paper proposes a control method of inverter-interfaced Distributed Generation (DG) units, which can autonomously share harmonic currents and resonance damping burdens. The approach employs a load compensator based on the decomposition of output current, in addition to the outer droop-based power controller, as well as inner voltage and current controllers. The load compensator consists of a virtual fundamental impedance loop for enhanced sharing of reactive power, and a variable harmonic impedance loop which allows to counteract harmonic voltage drops across the grid-side inductance of the DG inverter, and to damp the harmonic resonance propagation throughout a distribution feeder. Experiments on a three-phase microgrid are performed to validate the performance of the proposed control scheme.