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Showing papers on "Inverter published in 2014"


Journal ArticleDOI
TL;DR: In this article, a design methodology of an LCL filter for grid-interconnected inverters along with a comprehensive study of how to mitigate harmonics is presented for small-scale renewable energy conversion systems and may be also retrofitted for medium and large-scale grid-connected systems.
Abstract: The use of power converters is very important in maximizing the power transfer from renewable energy sources such as wind, solar, or even a hydrogen-based fuel cell to the utility grid An LCL filter is often used to interconnect an inverter to the utility grid in order to filter the harmonics produced by the inverter Although there is an extensive amount of literature available describing LCL filters, there has been a gap in providing a systematic design methodology Furthermore, there has been a lack of a state-space mathematical modeling approach that considers practical cases of delta- and wye-connected capacitors showing their effects on possible grounding alternatives This paper describes a design methodology of an LCL filter for grid-interconnected inverters along with a comprehensive study of how to mitigate harmonics The procedures and techniques described in this paper may be used in small-scale renewable energy conversion systems and may be also retrofitted for medium- and large-scale grid-connected systems

601 citations


Journal ArticleDOI
TL;DR: In this article, a capacitor-current-feedback active damping with reduced computation delay is proposed, which is achieved by shifting the capacitor current sampling instant towards the PWM reference update instant.
Abstract: This paper investigates the capacitor-current-feedback active damping for the digitally controlled LCL-type grid-connected inverter. It turns out that proportional feedback of the capacitor current is equivalent to virtual impedance connected in parallel with the filter capacitor due to the computation and pulse width modulation (PWM) delays. The LCL-filter resonance frequency is changed by this virtual impedance. If the actual resonance frequency is higher than one-sixth of the sampling frequency (fs/6), where the virtual impedance contains a negative resistor component, a pair of open-loop unstable poles will be generated. As a result, the LCL-type grid-connected inverter becomes much easier to be unstable if the resonance frequency is moved closer to fs/6 due to the variation of grid impedance. To address this issue, this paper proposes a capacitor-current-feedback active damping with reduced computation delay, which is achieved by shifting the capacitor current sampling instant towards the PWM reference update instant. With this method, the virtual impedance exhibits more like a resistor in a wider frequency range, and the open-loop unstable poles are removed; thus, high robustness against the grid-impedance variation is acquired. Experimental results from a 6-kW prototype confirm the theoretical expectations.

598 citations


Journal ArticleDOI
16 Mar 2014
TL;DR: In this article, an impedance-based analysis method was proposed to analyze the grid-synchronization stability issue in paralleled three-phase converter systems, which showed that the multivariable generalized inverse Nyquist stability criterion (GINC) can be used to predict the system stability based on the grid and inverter impedances in the synchronous d-q frame.
Abstract: Grid synchronization instability issues and low frequency oscillations between synchronous generators exist in electrical power system. This kind of stability issue happens between paralleled power converters is also reported. Analysis based on small-signal model of inverters with phase-locked loops (PLL) has been proposed. Different from that approach, which needs detailed inverter and controller parameters, this paper proposes an impedance-based analysis method to analyze the grid-synchronization stability issue in paralleled three-phase converter systems. The proposed method shows that the multivariable generalized inverse Nyquist stability criterion (GINC) can be used to predict the system stability based on the grid and inverter impedances in the synchronous d-q frame. Furthermore, the instability is found to be caused by qq channel impedance interaction. Experimental results verify the analysis and the proposed method.

451 citations


Journal ArticleDOI
TL;DR: It is proved that for all practical choices of these parameters global boundedness of trajectories is ensured and a design criterion for the controller gains and setpoints such that a desired steady-state active power distribution is achieved.

410 citations


Journal ArticleDOI
TL;DR: In this paper, a simple step-by-step controller design method for the LCL-type grid-connected inverter is proposed, and the complete satisfactory regions of the controller parameters for meeting the system specifications are obtained, and from which the controller parameter can be easily picked out.
Abstract: The injected grid current regulator and active damping of the LCL filter are essential to the control of LCL-type grid-connected inverters. Generally speaking, the current regulator guarantees the quality of the injected grid current, and the active damping suppresses the resonance peak caused by the LCL filter and makes it easier to stabilize the whole system. Based on the proportional-integral (PI) and proportional-resonant (PR) compensator together with capacitor-current-feedback active-damping which are widely used for their effectiveness and simple implementations, this paper proposes a simple step-by-step controller design method for the LCL-type grid-connected inverter. By carefully dealing with the interaction between the current regulator and active damping, the complete satisfactory regions of the controller parameters for meeting the system specifications are obtained, and from which the controller parameters can be easily picked out. Based on these satisfactory regions, it is more convenient and explicit to optimize the system performance. Besides, the insight of tuning the controller parameters from these satisfactory regions is also discussed. Simulation and experimental results verify the proposed step-by-step design method.

406 citations


Journal ArticleDOI
TL;DR: Two new topologies are proposed for multilevel inverters that reduce the number of switches and isolated dc voltage sources, the variety of the dc voltage source values, and the size and cost of the system in comparison with the conventional topologies.
Abstract: In this paper, two new topologies are proposed for multilevel inverters. The proposed topologies consist of a combination of the conventional series and the switched capacitor inverter units. The proposed topologies reduce the number of switches and isolated dc voltage sources, the variety of the dc voltage source values, and the size and cost of the system in comparison with the conventional topologies. In addition, the proposed topologies can double the input voltage without a transformer. There is no need for complicated methods to balance the capacitor voltage. The simulation and experimental results of single-phase 25- and 17-level inverters are given to prove the correct operation of the proposed topologies.

389 citations


Journal ArticleDOI
TL;DR: In this paper, an impedance shaping method is proposed with virtual impedances, and the current control loop can be designed independently under the practical considerations, which can work stably over a wide range of the typical inductive resistive grid impedance and exhibit strong rejection ability of grid-voltage harmonics.
Abstract: The current-controlled grid-connected inverter with LCL filter is widely used in the distributed generation system (DGS), due to its fast dynamic response and better power quality features. However, with the increase of power injected into the grid, control performances of the inverter will be significantly influenced by the nonideal grid conditions. Specifically, the possible wide variation of the grid impedance challenges the system stability. Meanwhile, background harmonics of the grid can greatly distort the injected current. Therefore, the control of the inverter should be designed with strong stability-robustness and high harmonic-rejection-ability, both of which correlate closely with the inverter output impedance. However, it is difficult to shape the output impedance into the one with a desirable characteristic simply by adjusting the current loop gain. In this paper, an impedance shaping method is proposed with virtual impedances, and the current control loop can be designed independently. The implementation and parameter design of the virtual impedances are studied under the practical considerations. With this proposed method, the grid-connected inverter can work stably over a wide range of the typical inductive-resistive grid impedance and exhibit strong rejection ability of grid-voltage harmonics. Experimental results from a 6-kW single-phase grid-connected inverter confirm the effectiveness of the proposed method.

378 citations


Journal ArticleDOI
TL;DR: A multilevel inverter that has been conceptualized to reduce component count, particularly for a large number of output levels, is presented, which results in reduced number of power switches as compared to classical topologies.
Abstract: This paper presents a multilevel inverter that has been conceptualized to reduce component count, particularly for a large number of output levels. It comprises floating input dc sources alternately connected in opposite polarities with one another through power switches. Each input dc level appears in the stepped load voltage either individually or in additive combinations with other input levels. This approach results in reduced number of power switches as compared to classical topologies. The working principle of the proposed topology is demonstrated with the help of a single-phase five-level inverter. The topology is investigated through simulations and validated experimentally on a laboratory prototype. An exhaustive comparison of the proposed topology is made against the classical cascaded H-bridge topology.

353 citations


Journal ArticleDOI
TL;DR: The objective of this paper is to propose a new inverter topology for a multilevel voltage output based on a switched capacitor technique, which is not only very simple and easy to be extended to a higher level, but also its gate driver circuits are simplified because the number of active switches is reduced.
Abstract: The objective of this paper is to propose a new inverter topology for a multilevel voltage output. This topology is designed based on a switched capacitor (SC) technique, and the number of output levels is determined by the number of SC cells. Only one dc voltage source is needed, and the problem of capacitor voltage balancing is avoided as well. This structure is not only very simple and easy to be extended to a higher level, but also its gate driver circuits are simplified because the number of active switches is reduced. The operational principle of this inverter and the targeted modulation strategies are presented, and power losses are investigated. Finally, the performance of the proposed multilevel inverter is evaluated with the experimental results of an 11-level prototype inverter.

349 citations


Journal ArticleDOI
TL;DR: The performance and functional accuracy of the proposed topology using the new algorithm in generating all voltage levels for a 31-level inverter are confirmed by simulation and experimental results.
Abstract: In this paper, a new general cascaded multilevel inverter using developed H-bridges is proposed. The proposed topology requires a lesser number of dc voltage sources and power switches and consists of lower blocking voltage on switches, which results in decreased complexity and total cost of the inverter. These abilities obtained within comparing the proposed topology with the conventional topologies from aforementioned points of view. Moreover, a new algorithm to determine the magnitude of dc voltage sources is proposed. The performance and functional accuracy of the proposed topology using the new algorithm in generating all voltage levels for a 31-level inverter are confirmed by simulation and experimental results.

340 citations


Journal ArticleDOI
TL;DR: Experimental results show that the proposed H6 topology and the HERIC achieve similar performance in leakage currents, which is slightly worse than that of the H5 topology, but it features higher efficiency than that that of H5Topology.
Abstract: Transformerless inverters are widely used in grid-tied photovoltaic (PV) generation systems, due to the benefits of achieving high efficiency and low cost. Various transformerless inverter topologies have been proposed to meet the safety requirement of leakage currents, such as specified in the VDE-4105 standard. In this paper, a family of H6 transformerless inverter topologies with low leakage currents is proposed, and the intrinsic relationship between H5 topology, highly efficient and reliable inverter concept (HERIC) topology, and the proposed H6 topology has been discussed as well. One of the proposed H6 inverter topologies is taken as an example for detail analysis with operation modes and modulation strategy. The power losses and power device costs are compared among the H5, the HERIC, and the proposed H6 topologies. A universal prototype is built for these three topologies mentioned for evaluating their performances in terms of power efficiency and leakage currents characteristics. Experimental results show that the proposed H6 topology and the HERIC achieve similar performance in leakage currents, which is slightly worse than that of the H5 topology, but it features higher efficiency than that of H5 topology.

Journal ArticleDOI
TL;DR: In this article, the LVRT capability of three mainstream single-phase transformerless PV inverters under grid faults is explored in order to map future challenges, and control strategies with reactive power injection are also discussed.
Abstract: Transformerless photovoltaic (PV) inverters are going to be more widely adopted in order to achieve high efficiency, as the penetration level of PV systems is continuously booming. However, problems may arise in highly PV-integrated distribution systems. For example, a sudden stoppage of all PV systems due to anti-islanding protection may contribute to grid disturbances. Thus, standards featuring with ancillary services for the next-generation PV systems are under a revision in some countries. The future PV systems have to provide a full range of services as what the conventional power plants do, e.g., low-voltage ride-through (LVRT) under grid faults and grid support service. In order to map future challenges, the LVRT capability of three mainstream single-phase transformerless PV inverters under grid faults is explored in this paper. Control strategies with reactive power injection are also discussed. The selected inverters are the full-bridge (FB) inverter with bipolar modulation, the FB inverter with dc bypass, and the Highly Efficient and Reliable Inverter Concept (HERIC). A 1-kW single-phase grid-connected PV system is analyzed to verify the discussions. The tests confirmed that, although the HERIC inverter is the best candidate in terms of efficiency, it is not very particularly feasible in case of a voltage sag. The other two topologies are capable of providing reactive current during LVRT. A benchmarking of those inverters is also provided in this paper, which offers the possibility to select appropriate devices and to further optimize the transformerless system.

Journal ArticleDOI
03 Apr 2014-ACS Nano
TL;DR: In this work, the operation of n- and p-type field-effect transistors (FETs) on the same WSe2 flake is realized, and a complementary logic inverter is demonstrated.
Abstract: In this work, the operation of n- and p-type field-effect transistors (FETs) on the same WSe2 flake is realized,and a complementary logic inverter is demonstrated. The p-FET is fabricated by contacting WSe2 with a high work function metal, Pt, which facilities hole injection at the source contact. The n-FET is realized by utilizing selective surface charge transfer doping with potassium to form degenerately doped n+ contacts for electron injection. An ON/OFF current ratio of >104 is achieved for both n- and p-FETs with similar ON current densities. A dc voltage gain of >12 is measured for the complementary WSe2 inverter. This work presents an important advance toward realization of complementary logic devices based on layered chalcogenide semiconductors for electronic applications.

Journal ArticleDOI
TL;DR: In this paper, a new medium voltage power converter topology using a diode rectifier, three-level boost (TLB) converter, and neutral-point-clamped (NPC) inverter is proposed for a high-power permanent magnet synchronous generator-based wind energy conversion system.
Abstract: In this paper, a new medium voltage power converter topology using a diode rectifier, three-level boost (TLB) converter, and neutral-point-clamped (NPC) inverter is proposed for a high-power permanent magnet synchronous generator-based wind energy conversion system. The generator-side TLB converter performs the maximum power point tracking and balancing of dc-link capacitor voltages, while the grid-side NPC inverter regulates the net dc-bus voltage and reactive power to the grid. A significant improvement in the grid power quality is accomplished as the NPC inverter no longer controls the dc-link neutral point voltage. A model predictive strategy is proposed to control the complete system where the discrete-time models of the proposed power electronic converters are used to predict the future behavior of control variables. These predictions are evaluated using two independent cost functions, and the switching states which minimize these cost functions are selected and applied to the generator- and grid-side converters directly. In order to comply with the high-power application, the switching frequencies of the TLB converter and NPC inverter are minimized and maintained below 1.5 and 1 kHz, respectively. The proposed topology and control strategy are verified through MATLAB simulations on a 3-MW/3000-V/577-A system and dSPACE DS1103-based experiments on 3.6-kW/208-V/10-A prototype.

Journal ArticleDOI
TL;DR: An AD method based on the feedback of the injected grid current has been proposed, which promises the satisfactory performance with both analog and digital implementations and the cost and the complexity are reduced while the reliability is improved.
Abstract: An LCL-type filter is widely used in the grid-connected inverter. However, with only injected grid current control, the current harmonics and low bandwidth caused by the resonance peak cannot be tolerated. The active damping (AD) method with an extra feedback provides a high rejection of the resonance so that the dynamic is improved; however, the high-precision sensing circuit for the extra feedback increases the cost. In this paper, with the signal flow graph and response-fitting methods, an AD method based on the feedback of the injected grid current has been proposed. Then, the novel closed-loop current control requires accurately sensing the injected grid current only, while no observation is needed. Compared with the extra feedback methods, the cost and the complexity are reduced while the reliability is improved. Based on the study of the relation between the controller and the system dynamic, a straightforward design has been proposed. The robustness, harmonic rejection, and digital implementation have been studied. Compared with the conventional control methods, the proposed one promises the satisfactory performance with both analog and digital implementations. Simulations and experiments have verified the proposed control and design strategies.

Journal ArticleDOI
TL;DR: In this article, a fuzzy logic controller (FLC)-based single-ended primary-induction converter (SEPIC) was proposed for maximum power point tracking (MPPT) operation of a photovoltaic (PV) system.
Abstract: This paper presents a fuzzy logic controller (FLC)-based single-ended primary-inductor converter (SEPIC) for maximum power point tracking (MPPT) operation of a photovoltaic (PV) system. The FLC proposed presents that the convergent distribution of the membership function offers faster response than the symmetrically distributed membership functions. The fuzzy controller for the SEPIC MPPT scheme shows high precision in current transition and keeps the voltage without any changes, in the variable-load case, represented in small steady-state error and small overshoot. The proposed scheme ensures optimal use of PV array and proves its efficacy in variable load conditions, unity, and lagging power factor at the inverter output (load) side. The real-time implementation of the MPPT SEPIC converter is done by a digital signal processor (DSP), i.e., TMS320F28335. The performance of the converter is tested in both simulation and experiment at different operating conditions. The performance of the proposed FLC-based MPPT operation of SEPIC converter is compared to that of the conventional proportional-integral (PI)-based SEPIC converter. The results show that the proposed FLC-based MPPT scheme for SEPIC can accurately track the reference signal and transfer power around 4.8% more than the conventional PI-based system.

Journal ArticleDOI
TL;DR: A model-free predictive current control of interior permanent-magnet synchronous motor (IPMSM) drive systems based on a current difference detection technique is proposed that alleviates the need for excessive prior knowledge about the system and only utilizes the stator currents as well as the current differences corresponding to different switching states of the inverter.
Abstract: A model-free predictive current control (PCC) of interior permanent-magnet synchronous motor (IPMSM) drive systems based on a current difference detection technique is proposed. The model-based PCC (MBPCC) of IPMSM requires knowledge of parameters such as resistance, q-axis inductance, and extended back EMF. This paper develops a new model-free approach that alleviates the need for excessive prior knowledge about the system and only utilizes the stator currents as well as the current differences corresponding to different switching states of the inverter. Despite the salient difference of the proposed approach, it adopts a measure similar to that in the MBPCC approach to obtain the next switching state of the inverter by minimizing a cost function. It is noteworthy that the proposed method is easy to implement due to its simplicity and free of any multiplication operation. For comparison purposes, a digital signal processor, TMS320LF2407, is used to execute the two aforementioned current control techniques. Several experimental results show that the proposed method can significantly improve the current-tracking performance.

Journal ArticleDOI
TL;DR: A new single-phase cascaded multilevel inverter based on novel H-bridge units is proposed, able to increase the number of output voltage levels by using a lower number of power electronic devices such as switches, power diodes, driver circuits, and dc voltage sources that lead to reduction in installation space and cost of the inverter.
Abstract: In this paper, a new single-phase cascaded multilevel inverter based on novel H-bridge units is proposed. In order to generate all voltage levels (even and odd) at the output, nine different algorithms are proposed to determine the magnitudes of dc voltage sources. Then, the proposed algorithms are compared to investigate their advantages and disadvantages. This topology is able to increase the number of output voltage levels by using a lower number of power electronic devices such as switches, power diodes, driver circuits, and dc voltage sources that lead to reduction in installation space and cost of the inverter. In addition, in the proposed cascaded multilevel inverter, not only the number of required power electronic devices is reduced, but also the amount of the blocked voltage by switches, and the number of different voltage amplitudes of the used sources is decreased. These features are some of the most important advantages of the proposed topology. These features are obtained via the comparison of the proposed topology and its proposed algorithms with the conventional cascaded multilevel inverters that have been presented in the literatures. The operation and performances of the proposed topology with its presented algorithms in generating all voltage levels have been verified by using the experimental results of a 49-level single-phase inverter.

Journal ArticleDOI
TL;DR: In this article, a switched-capacitor-based cascaded multilevel inverter is proposed to increase the number of voltage levels by converting series and parallel connections, which can significantly reduce the output harmonics and the component counter.
Abstract: The increase of transmission frequency reveals more merits than low- or medium-frequency distribution among different kinds of power applications. High-frequency inverter serves as source side in high-frequency ac (HFAC) power distribution system (PDS). However, it is complicated to obtain a high-frequency inverter with both simple circuit topology and straightforward modulation strategy. A novel switched-capacitor-based cascaded multilevel inverter is proposed in this paper, which is constructed by a switched-capacitor frontend and H-Bridge backend. Through the conversion of series and parallel connections, the switched-capacitor frontend increases the number of voltage levels. The output harmonics and the component counter can be significantly reduced by the increasing number of voltage levels. A symmetrical triangular waveform modulation is proposed with a simple analog implementation and low modulation frequency comparing with traditional multicarrier modulation. The circuit topology, symmetrical modulation, operation cycles, Fourier analysis, parameter determination, and topology enhancement are examined. An experimental prototype with a rated output frequency of 25 kHz is implemented to compare with simulation results. The experimental results agreed very well with the simulation that confirms the feasibility of proposed multilevel inverter.

Journal ArticleDOI
TL;DR: A sufficient condition for global asymptotic synchronization is outlined and a methodology for controller design is formulated such that the inverter terminal voltages oscillate at the desired frequency, and the load voltage is maintained within prescribed bounds.
Abstract: A method to synchronize and control a system of parallel single-phase inverters without communication is presented. Inspired by the phenomenon of synchronization in networks of coupled oscillators, we propose that each inverter be controlled to emulate the dynamics of a nonlinear dead-zone oscillator. As a consequence of the electrical coupling between inverters, they synchronize and share the load in proportion to their ratings. We outline a sufficient condition for global asymptotic synchronization and formulate a methodology for controller design such that the inverter terminal voltages oscillate at the desired frequency, and the load voltage is maintained within prescribed bounds. We also introduce a technique to facilitate the seamless addition of inverters controlled with the proposed approach into an energized system. Experimental results for a system of three inverters demonstrate power sharing in proportion to power ratings for both linear and nonlinear loads.

Journal ArticleDOI
TL;DR: This paper deals with the design of an SRF multiloop control strategy for single-phase inverter-based islanded distributed generation systems and presents a step-by-step systematic design procedure based on a frequency response approach.
Abstract: Control of three-phase power converters in the synchronous reference frame (SRF) is now a mature and well-developed research topic. However, for single-phase converters, it is not as well established as three-phase applications. This paper deals with the design of an SRF multiloop control strategy for single-phase inverter-based islanded distributed generation systems. The proposed controller uses an SRF proportional-integral controller to regulate the instantaneous output voltage, a capacitor current shaping loop in the stationary reference frame to provide active damping and improve both transient and steady-state performances, a voltage decoupling feedforward to improve the system robustness, and a multiresonant harmonic compensator to prevent low-order load current harmonics to distort the inverter output voltage. Since the voltage loop works in the SRF, it is not straightforward to fine tune the control parameters and evaluate the stability of the whole closed-loop system. To overcome this problem, the stationary reference frame equivalent of the voltage loop is derived. Then, a step-by-step systematic design procedure based on a frequency response approach is presented. Finally, the theoretical achievements are supported by experimental results.

Journal ArticleDOI
TL;DR: An overview of power inverter topologies and control structures for grid-connected photovoltaic systems is given in this article, where some solutions to control the power injected into the grid and functional structures of each configuration are proposed.
Abstract: In grid-connected photovoltaic systems, a key consideration in the design and operation of inverters is how to achieve high efficiency with power output for different power configurations. The requirements for inverter connection include: maximum power point, high efficiency, control power injected into the grid, and low total harmonic distortion of the currents injected into the grid. Consequently, the performance of the inverters connected to the grid depends largely on the control strategy applied. This paper gives an overview of power inverter topologies and control structures for grid connected photovoltaic systems. In the first section, various configurations for grid connected photovoltaic systems and power inverter topologies are described. The following sections report, investigate and present control structures for single phase and three phase inverters. Some solutions to control the power injected into the grid and functional structures of each configuration are proposed.

Journal ArticleDOI
TL;DR: A delay time control method that is capable of adjusting delay time is further proposed to improve system stability and verified the analysis result and proposed method.
Abstract: Delay is inevitable in digital-controlled system and the delay will change system phase-frequency characteristic, thus affecting system stability. The system stability of inductor-capacitor-inductor (LCL)-type grid-connected inverter with single-loop control based on inverter-side current and single-loop control based on grid-side current is analyzed both in continuous and discrete domains. The influence of delay time on system stability is systematically studied. A delay time control method that is capable of adjusting delay time is further proposed to improve system stability. The proposed delay time control method is applied in the experiment, making an unstable system to be stable, and verifies the analysis result and proposed method.

Journal ArticleDOI
TL;DR: In this paper, the authors proposed modulation techniques to reduce the leakage current and balance the dc-link voltages in transformerless photovoltaic (PV) systems using three-level inverter.
Abstract: Transformerless topologies of many topologies are widely used in photovoltaic (PV) systems because these topologies have many advantages in terms of the weight, size, and efficiency. A three-level inverter has an outstanding performance and is advantageous in the switching device selection than a two-level inverter. In the transformerless PV systems using the three-level inverter, the PV systems should suffer from the leakage current and generate the neutral-point voltage unbalance. To solve two problems, this paper proposes modulation techniques to reduce the leakage current and balance the dc-link voltages. The cause of the leakage current in the three-level inverter is analyzed. The proposed technique LMZVM using the large, medium, and zero vectors reduces the common mode voltage that causes the leakage current than that of the conventional PWM. Moreover, the proposed technique LMSVM using the large, medium, and small vectors balances the dc-link voltages with reduced CMV as the same in LMZVM. The effectiveness of the proposed techniques is verified by comparing its results with those of the convectional PWM. The results are obtained through simulations and experiments.

Journal ArticleDOI
TL;DR: In this paper, the authors proposed a new diagnosis method of an open-switch fault and fault-tolerant control strategy for T-type three-level inverter systems, where the location of the faulty switch can be identified by the average of the normalized phase current and the change of the neutral point voltage.
Abstract: This paper proposes a new diagnosis method of an open-switch fault and fault-tolerant control strategy for T-type three-level inverter systems. The location of the faulty switch can be identified by the average of the normalized phase current and the change of the neutral-point voltage. The proposed fault-tolerant strategy is explained by dividing into two cases: the faulty condition of half-bridge switches and neutral-point switches. The performance of the T-type inverter system improves considerably by the proposed fault-tolerant algorithm when a switch fails. The proposed method does not require additional components and complex calculations. Simulation and experimental results verify the feasibility of the proposed fault diagnosis and fault-tolerant control strategy.

Journal ArticleDOI
TL;DR: In this article, a comparison of current-limiting strategies during fault ride-through of inverters to prevent latch-up and wind-up is presented, and the experimental results showing the current and voltage waveforms of the inverter are presented to test whether each strategy correctly transitioned from current limiting to normal operation.
Abstract: Transient stability of a power network requires that generators remain synchronized and return to normal power export once a fault is cleared. For inverter-interfaced generators, one must ensure that current and voltage limiters do not latch-up and that controller integrators do not wind-up. A comparison of current-limiting strategies during fault ride-through of inverters to prevent latch-up and wind-up is presented. A voltage-controlled inverter with an inner current controller is used in this paper. Instantaneous limiting (saturation) and latched limiting with a variety of reset strategies are tested to check for correct operation when a fault is applied and cleared. All the cases were tested on an experimental system using 10-kVA inverters and low-impedance three-phase faults. The experimental results showing the current and voltage waveforms of the inverter are presented to test whether each strategy correctly transitioned from current limiting to normal operation once the fault was cleared and to examine the extent to which controller wind-up was a problem. Conclusions are drawn as to which current-limiting strategies provide good performance in ride-through and recovery from faults.

Journal ArticleDOI
TL;DR: In this article, the authors proposed a load compensator based on the decomposition of output current, in addition to the outer droop-based power controller and the inner voltage and current controllers, which can counteract the harmonic voltage drops across the grid-side inductance of the DG inverter and dampen out harmonic resonance propagation in the microgrid.
Abstract: Harmonic current filtering and resonance damping have become important concerns in the operation and control of the islanded microgrids To address these challenges, this paper proposes a control method for the inverter-interfaced distributed generation (DG) units to autonomously share the harmonic currents and resonance damping burdens The approach employs a load compensator based on the decomposition of output current, in addition to the outer droop-based power controller and the inner voltage and current controllers The load compensator consists of a virtual-fundamental-impedance loop for the enhanced reactive power sharing and a variable-harmonic-impedance loop which allows to counteract the harmonic voltage drops across the grid-side inductance of the DG inverter and also to dampen out harmonic resonance propagation in the microgrid Finally, the laboratory tests on a three-phase islanded microgrid setup are carried out to validate the performance of the proposed control scheme

Journal ArticleDOI
TL;DR: An effective control method, including system-level control and pulsewidth modulation for quasi-Z-source cascade multilevel inverter (qZS-CMI) based grid-tie photovoltaic (PV) power system is proposed.
Abstract: An effective control method, including system-level control and pulsewidth modulation for quasi-Z-source cascade multilevel inverter (qZS-CMI) based grid-tie photovoltaic (PV) power system is proposed. The system-level control achieves the grid-tie current injection, independent maximum power point tracking (MPPT) for separate PV panels, and dc-link voltage balance for all quasi-Z-source H-bridge inverter (qZS-HBI) modules. The complete design process is disclosed. A multilevel space vector modulation (SVM) for the single-phase qZS-CMI is proposed to fulfill the synthetization of the step-like voltage waveforms. Simulation and experiment based on a seven-level prototype are carried out to validate the proposed methods.

Journal ArticleDOI
TL;DR: In this paper, a cross-connected sources-based multilevel inverter (CCS-MLI) is proposed for both symmetric and asymmetric source configurations, and a control scheme is also proposed for equal load sharing in five-level topology.
Abstract: As multilevel inverters are gaining increasing importance, newer topologies are being proposed to reduce part count for large number of levels in output voltage. A simplified five-level inverter has been recently reported in the literature to reduce component count. The topology comprises of floating input DC sources connected in opposite polarities through power switches. The structure requires lesser active switches as compared with conventional cascaded H-bridge topology with much reduced switching losses. Available literature present generalisation of the topology with symmetrical sources, but no investigations are made for equal load sharing and asymmetrical configurations. This study presents a comprehensive analysis of the aforementioned topology, referred to as cross-connected sources-based multilevel inverter (CCS-MLI). The topology is analysed for both symmetric and asymmetric source configurations. Also, a new algorithm for asymmetric source configuration suitable for CCS-MLI is proposed. A control scheme is also proposed for equal load sharing in five-level topology. Investigations are made for possibility of equal load sharing in higher level structures and fundamental frequency switching of switches bearing higher voltage stresses. Various concepts are verified with simulations and experimental studies.

Journal ArticleDOI
TL;DR: A new multilevel inverter (MLI) topology is proposed using a level doubling network (LDN) that has the capability of self-balancing during positive and negative cycles without any closed-loop control/algorithm, and it does not consume or supply any power.
Abstract: A new multilevel inverter (MLI) topology is proposed using a level doubling network (LDN). The LDN takes the form of a half-bridge inverter to almost double the number of output voltage levels. The concept (of the proposed LDN) has the capability of self-balancing during positive and negative cycles without any closed-loop control/algorithm, and it does not consume or supply any power. The topology uses a symmetric cascaded H-bridge MLI but offers an equivalent performance of an asymmetric topology in terms of the number of levels. Also, it maintains the merit of uniform loading of the individual cell for a symmetric MLI. The topology is implemented by connecting only a three-arm H-bridge (only two switches per phase) with the entire three-phase inverter to double the number of levels. Thus, it significantly improves the power quality, reduces the switching frequency, and reduces the cost and size of the power filter. Operation of the circuit is verified by simulation result and experiments from a laboratory prototype.