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Ion implantation

About: Ion implantation is a research topic. Over the lifetime, 36395 publications have been published within this topic receiving 454497 citations.


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Journal ArticleDOI
08 Mar 2001-Nature
TL;DR: The fabrication is described of a silicon light-emitting diode (LED) that operates efficiently at room temperature using standard silicon processing techniques, as boron ion implantation is already used as a standard method for the fabrication of silicon devices.
Abstract: There is an urgent requirement for an optical emitter that is compatible with standard, silicon-based ultra-large-scale integration (ULSI) technology. Bulk silicon has an indirect energy bandgap and is therefore highly inefficient as a light source, necessitating the use of other materials for the optical emitters. However, the introduction of these materials is usually incompatible with the strict processing requirements of existing ULSI technologies. Moreover, as the length scale of the devices decreases, electrons will spend increasingly more of their time in the connections between components; this interconnectivity problem could restrict further increases in computer chip processing power and speed in as little as five years. Many efforts have therefore been directed, with varying degrees of success, to engineering silicon-based materials that are efficient light emitters. Here, we describe the fabrication, using standard silicon processing techniques, of a silicon light-emitting diode (LED) that operates efficiently at room temperature. Boron is implanted into silicon both as a dopant to form a p-n junction, as well as a means of introducing dislocation loops. The dislocation loops introduce a local strain field, which modifies the band structure and provides spatial confinement of the charge carriers. It is this spatial confinement which allows room-temperature electroluminescence at the band-edge. This device strategy is highly compatible with ULSI technology, as boron ion implantation is already used as a standard method for the fabrication of silicon devices.

625 citations

Journal ArticleDOI
TL;DR: In this paper, transmission electron microscopy measurements of implantation damage were combined with B diffusion experiments using doping marker structures grown by molecular-beam epitaxy (MBE) to study the mechanisms of TED.
Abstract: Implanted B and P dopants in Si exhibit transient enhanced diffusion (TED) during annealing which arises from the excess interstitials generated by the implant. In order to study the mechanisms of TED, transmission electron microscopy measurements of implantation damage were combined with B diffusion experiments using doping marker structures grown by molecular-beam epitaxy (MBE). Damage from nonamorphizing Si implants at doses ranging from 5×1012 to 1×1014/cm2 evolves into a distribution of {311} interstitial agglomerates during the initial annealing stages at 670–815 °C. The excess interstitial concentration contained in these defects roughly equals the implanted ion dose, an observation that is corroborated by atomistic Monte Carlo simulations of implantation and annealing processes. The injection of interstitials from the damage region involves the dissolution of {311} defects during Ostwald ripening with an activation energy of 3.8±0.2 eV. The excess interstitials drive substitutional B into electric...

618 citations

Journal ArticleDOI
TL;DR: In this article, the effect of thermal annealing on implanted and unimplanted CdSe TFTs has been studied and the model appears to give a general description of the conductivity behavior in polycrystallin...
Abstract: CdSe thin film transistor (TFT) structures which have been ion implanted with 50 keV 52Cr, 50 keV 27Al, or 15 keV 11B have a very steeply rising conductivity above some threshold dose and exhibit modulated transistor characteristics over certain ranges of implant dose, even though there is no thermal annealing during or after ion implantation. These results are interpreted using a model based on grain boundary trapping theory. The dependence of leakage current on implant dose, and of drain current (at a fixed dose) on gate voltage are described very well by this model, when the drain voltage is very small. Using this simple model, the important parameters of the polycrystalline CdSe film, namely the trap density per unit area in the grain boundary, the donor density, grain size, and electron mobility can be deduced. The effect of thermal annealing on implanted and unimplanted CdSe TFT’s has also been studied and the model appears to give a general description of the conductivity behavior in polycrystallin...

573 citations

Journal ArticleDOI
TL;DR: In this article, a computer program is described which treats the slowing down of ions in solids, and the associated formation of recoil atom cascades in the binary collision approximation for multicomponent media, taking into account dynamic alterations of the local composition which arise from the deposition of implanted ions and the collisional transport of target atoms.

570 citations

Journal ArticleDOI
TL;DR: In this paper, a detailed review of fabrication methods for obtaining device functionality from single ZnO nanorods is presented, where a key aspect is the use of sonication to facilitate transfer of the nanorod from the initial substrate on which they are grown to another substrate for device fabrication.
Abstract: The large surface area of ZnO nanorods makes them attractive for gas and chemical sensing, and the ability to control their nucleation sites makes them candidates for micro-lasers or memory arrays. In addition, they might be doped with transition metal (TM) ions to make spin-polarized light sources. To date, most of the work on ZnO nanostructures has focused on the synthesis methods and there have been only a few reports of the electrical characteristics. We review fabrication methods for obtaining device functionality from single ZnO nanorods. A key aspect is the use of sonication to facilitate transfer of the nanorods from the initial substrate on which they are grown to another substrate for device fabrication. Examples of devices fabricated using this method are briefly described, including metal-oxide semiconductor field effect depletion-mode transistors with good saturation behavior, a threshold voltage of ∼−3 V and a maximum transconductance of order 0.3 mS/mm and Pt Schottky diodes with excellent ideality factors of 1.1 at 25 °C and very low (1.5 × 10 −10 A, equivalent to 2.35 A cm −2 , at −10 V) reverse currents. The photoresponse showed only a minor component with long decay times (tens of seconds) thought to originate from surface states. These results show the ability to manipulate the electron transport in nanoscale ZnO devices.

562 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023122
2022298
2021329
2020452
2019580
2018605