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Showing papers on "Isotropic etching published in 1979"


Journal ArticleDOI
TL;DR: In this article, it was shown that silicon is isotropically etched by exposure to XeF2(gas) at T = 300 K. The implication of these experimental results for understanding mechanisms associated with plasma etching (including RIE) will be discussed.
Abstract: It is shown that silicon is isotropically etched by exposure to XeF2(gas) at T=300 K. Si etch rates as large as 7000 A/min were observed for P (XeF2) <1.4×10−2 Torr and the etch rate varies linearly with P (XeF2). There was no observable etching of SiO2, Si3N4, or SiC, demonstrating an extremely large selectivity between silicon and its compounds. Therefore, thin masks constructed from silicon compounds can be used for pattern delineation. The implication of these experimental results for understanding mechanisms associated with plasma etching (including RIE) will be discussed.

456 citations


Journal ArticleDOI
TL;DR: In this paper, the chemical structures of thin SiO2 films, thin native oxides of GaAs (20-30 A), and the respective oxide-semiconductor interfaces, have been investigated using high-resolution X-ray photoelectron spectroscopy.
Abstract: The chemical structures of thin SiO2 films, thin native oxides of GaAs (20-30 A), and the respective oxide-semiconductor interfaces, have been investigated using high-resolution X-ray photoelectron spectroscopy. Depth profiles of these structures have been obtained using argon ion bombardment and wet chemical etching techniques. The chemical destruction induced by the ion profiling method is shown by direct comparison of these methods for identical samples. Fourier transform data-reduction methods based on linear prediction with maximum entropy constraints are used to analyze the discrete structure in oxides and substrates. This discrete structure is interpreted by means of a structure-induced charge-transfer model.

292 citations


Patent
21 Feb 1979
TL;DR: In this paper, an improved Reactive Ion Etch (RIE) technique for etching polysilicon or single crystal silicon is described. But it is not applicable to device processing in which micron or sub-micron sized lines must be fabricated to extremely close tolerances.
Abstract: Disclosed is an improved Reactive Ion Etch (RIE) technique for etching polysilicon or single crystal silicon as must be done in Very Large Scale Integration (VLSI) using silicon technology. It teaches the use of an etch gas that consists of a mixture of sulfur hexafluoride (SF 6 ) and chlorine (Cl 2 ) diluted with inert gas. This etch gas allows an RIE process which combines the very desirable features of selectivity (high Si/SiO 2 etch rate ratio) and directionality which creates vertical side walls on the etched features. Vertical side walls mean no mask undercutting, hence zero etch bias. It is particularly applicable to device processing in which micron or sub-micron sized lines must be fabricated to extremely close tolerances. It is a distinct improvement over wet chemical etching or plasma etching as it is conventionally applied.

181 citations


Journal ArticleDOI
TL;DR: In this article, a simple model for predicting etch rates on sloped surfaces and sidewall profiles is described, which is critical for the successful application of ion-beam etching to patterning high-density integrated circuits.
Abstract: The trend in the microelectronics industry, and in particular that part of the industry concerned with the fabrication of integrated circuits, is toward circuits with increasingly high density and devices with smaller feature size. This trend has spurred interest in several new process technologies for pattern replication. One such emerging technology is ion‐beam etching that offers higher resolution, greater dimensional control, and higher yield than conventional wet chemical etching. Several examples of surface relief formation by ion‐beam etching illustrate the advantage of this approach. The particular limitations imposed by ion‐beam etching, namely mask erosion and faceting, redeposition, and trenching, are treated. Developments of simple models for predicting etch rates on sloped surfaces and sidewall profiles are described. Such models are critical for the successful application of ion‐beam etching to patterning high‐density integrated circuits.

148 citations


Patent
17 Jul 1979
TL;DR: In this article, a diffraction grating made of a single crystalline silicon substrate is provided with a plurality of asymmetric triangular grooves, each having a wall inclined by an angle with respect to the major surface so as to satisfy an equation θ=sin-1 mλB /2P where θ represents the blaze angle, P the pitch of the groove, λB the blazing wavelength, and m the order of diffraction.
Abstract: In a diffraction grating made of a single crystalline silicon substrate, one major plane thereof is provided with a plurality of asymmetric triangular grooves, each having a wall inclined by an angle θ with respect to the major surface so as to satisfy an equation θ=sin-1 mλB /2P where θ represents the blaze angle, P the pitch of the groove, λB the blazing wavelength, and m the order of diffraction. The walls of each groove receiving incident light is covered with a metal coat. The diffraction grating is prepared by using a {hkl} plane (where h=k) inclined by θ with respect to the {111} plane of the single crystalline silicon as a major surface, and then anisotropic-etching the major surface through an etching mask having stripes having sufficiently smaller width than the grating constant. Preferably, following the anisotropic etching, isotropic etching is made for the major surface.

64 citations


Patent
04 Jan 1979
TL;DR: In this article, a gas plasma is created within the chamber to produce active species of atoms and molecules so that these species come into contact with the surface of the body to chemically react at least one of the materials with active species from the gas plasma to form a gas-non-gaseous chemical reaction.
Abstract: Selective plasma vapor etching process for performing operations on a solid body formed of at least two different materials capable of being vapor etched exposed at, at least, one surface of the body, with the body being disposed in a chamber having a partial vacuum therein. A gas plasma is created within the chamber to produce active species of atoms and molecules so that these species come into contact with the surface of the body to chemically react at least one of the materials with active species from the gas plasma to form a gas-non-gaseous chemical reaction by controlling the concentration and reaction kinetics of specific species, and by controlling the activation energy of the etching reactions to produce a difference in rates between the materials so that the etching is more selective to one material over the other. The species is also controlled by the frequency of the electromagnetic energy.

50 citations



Patent
Shigeru Aoki1, Michiyoshi Maki1, Shigeo Kato1, Masahiko Ogirima1, Yukio Takano1 
19 Feb 1979
TL;DR: In this article, a semiconductor substrate and a method of manufacturing the same is described, where the rear surface of a Si wafer is ground to form a damaged layer having a certain fixed thickness.
Abstract: This invention relates to a semiconductor substrate and a method of manufacturing the same. In a semiconductor manufacturing process for a Si single crystal wafer or the like, before the step of mirror polishing, the rear surface of a Si wafer is ground to form a damaged layer having a certain fixed thickness, the Si wafer is subsequently etched by chemical etching if desired, and the rear surface is further formed with an oxide film by thermal oxidation if desired, whereby a semiconductor substrate exhibiting an intense gettering effect is manufactured.

46 citations


Patent
Linda Mero Ephrath1
17 Aug 1979
TL;DR: In this article, a silicon oxide, nitride, and/or oxynitride surface on a substrate is selectively etched at a rate greater than that of the substrate by a reactive ion etching employing a gaseous mixture containing a fluorocarbon and a second gas capable of supplying hydrogen.
Abstract: A silicon oxide, nitride, and/or oxynitride surface on a substrate is selectively etched at a rate greater than that of the substrate by a reactive ion etching employing a gaseous mixture containing a fluorocarbon and a second gas capable of supplying hydrogen.

45 citations


Patent
30 Apr 1979
TL;DR: In this article, a process for patterning regions on a semiconductor structure comprises the steps of forming a first layer of an alloy of tungsten and titanium on the semiconductor, forming a conductive layer of aluminum or chemically similar material on the surface of the Tungsten-titanium alloy, removing the undesired portions of the conductive layers by etching with a plasma and removing the thereby exposed portion of the tengsten-to-itanium Alloy layer by chemical etching.
Abstract: A process for patterning regions on a semiconductor structure comprises the steps of forming a first layer of an alloy of tungsten and titanium on the semiconductor structure, forming a conductive layer of aluminum or chemically similar material on the surface of the tungsten-titanium alloy, removing the undesired portions of the conductive layer by etching with a plasma and removing the thereby exposed portions of the tungsten-titanium alloy layer by chemical etching.

43 citations


Patent
29 Oct 1979
TL;DR: In this article, a gas containing at least SF 6 as an etching gas at a high etching rate of silicon, and a high selectivity, with an easy monitoring and a low temperature dependency, was used for micro-wave plasma etching.
Abstract: Micro-wave plasma etching is carried out with a gas containing at least SF 6 as an etching gas at a high etching rate of silicon, and a high selectivity, with an easy monitoring and a low temperature dependency.

Journal ArticleDOI
TL;DR: In this paper, the growth of holes in polyvinylidene fluoride film exposed to fission fragments in oxygen and etched in sodium hydroxide solutions was followed by measuring gas flow through the film as well as by electron microscopy.

Journal ArticleDOI
TL;DR: In this article, the authors describe a process based on photolithography and chemical etching which avoids this interruption to manufacture, and demonstrate that the resulting TFTs can operate at up to more than 100 V.

Patent
Steven H. Kaplan1
08 Nov 1979
TL;DR: In this article, a method for forming a semiconductor structure is disclosed wherein a masking layer used to form the gate contact of a Metal Electrode Semiconductor Field Effect Transistor (MESFET) is formed.
Abstract: A method for forming a semiconductor structure is disclosed wherein a masking layer used to form the gate contact of a Metal Electrode Semiconductor Field Effect Transistor (MESFET) is formed by selectively depositing particles into separated regions of the masking layer, diffusing the particles into the portions of the masking layer to reduce the separation between the regions to a predetermined separation and exposing the masking layer to a chemical etchant to selectively remove the portions of the masking layer which have a particle concentration below a predetermined concentration, producing an aperture in the masking layer having a predetermined width. With such method a well controlled diffusion process and selective chemical etching process are used to form such aperture which, in turn, is used to form a gate contact for a MESFET having a gate channel length in the order of a micron.

Patent
21 May 1979
TL;DR: In this paper, the authors proposed to improve the ununiformity of etching speed by forming the electrode surface equipped with the material to be processed and groundwork layer by the same material, on occasion of processing multilayer construction material having the groundwork layer and layer to be etched.
Abstract: PURPOSE: To improve the ununiformity of etching speed in the material to be processed, by forming the electrode surface equipped with the material to be processed and groundwork layer by the same material, on occasion of processing multilayer construction material to be processed having the groundwork layer and layer to be etched. CONSTITUTION: The surface materials 4, 5 of the flat board upper and lower electrodes 2, 3 equipped in the reaction vessel 1 of parallel flat board type gas plasma etching apparatus, is made of polycrystal silicon and the material to be processed 8 having the SiO 2 coating 7 which is selectively formed on the surface of the Si substrate 6, is placed on the material 5 of the lower electrode 3 and CHF 3 gas is introduced at a constant flowing volume through the gas introducing pipe 10 after evacuating the vessel 1 by the vacuum pump 9. Hereby, each part of the substrate 6 and the coating 7 on the Si substrate exposed on the surface of the material 8, is etched by the different etching speed and value of the etching speed ratio R(SiO 2 /Si) is grown very large and also, etching speed distribution in a sheet of the material to be processed, is made uniform. COPYRIGHT: (C)1980,JPO&Japio

Patent
Leonard Stein1
11 Oct 1979
TL;DR: Silicon is employed as a masking material for the selective plasma chemical etching of a coating material of a polyimidesilicone copolymer disposed on selective surface of electronic devices.
Abstract: Silicon is employed as a masking material (30) for the selective plasma chemical etching of a coating material (28) of a polyimidesilicone copolymer disposed on selective surface (12) areas of electronic devices (10).

Journal ArticleDOI
TL;DR: In this article, the effect of etching variables such as etching time, temperature, current density and electrolyte usage is described, and a mechanism is proposed for the etching process.
Abstract: SummaryElectrolytic etching has for some time been used to produce a ‘grained’ or uniformly roughened surface on aluminium sheet for offset lithographic printing plates. The process commonly employed involves alternating current etching in 1–2% HCl. The effect of etching variables such as etching time, temperature, current density and electrolyte usage is described. Etching is found to be accompanied by the formation of a surface film and electrochemical studies have shown that within the potential range -700 to -850 mV SCE passivity occurs. On the basis of these results a mechanism is proposed for the etching process. Uniformity of pitting and pit depths are thought to arise from the use of alternating current, which allows passivation of etch pits during etching and thus produces a redistribution of attack.

Patent
09 May 1979
TL;DR: In this article, a method of marking a metal device with an identification symbol or serial number which is not detectable by a visual examination is presented, which is used in combination with the step of etching away the surface area of the metal device which includes both unaltered microstructure and altered microstructures with a selected chemical etching solution.
Abstract: The present invention is a method of marking a metal device with an identification symbol or a serial number which is not detectable by a visual examination The method of marking includes the steps of locally heating a specified area of the metal so that its microstructure is altered For example, a laser, the intensity of which has been adjusted so as to maintain a designated area at a temperature within an appropriate temperature range for the particular metal, may be used to trace out either an identification symbol or serial number The method is used in combination with the step of etching away the surface area of the metal device which includes both unaltered microstructure and altered microstructure with a selected chemical etching solution that will etch away the altered microstructure at a different rate than the unaltered microstructure thereby exposing the mark

Patent
Horst Fickelscher1
12 Jan 1979
TL;DR: In this article, a method of etching a recrystallized aluminum foil which utilizes potentiostatic etching to roughen the foil to obtain a particularly high roughening factor is presented.
Abstract: A method of etching a recrystallized aluminum foil which utilizes potentiostatic etching to roughen the foil to obtain a particularly high roughening factor. The etching preferably occurs in two stages in which the etching current density of the first stage is above the current density which creates an undesired pitting of the aluminum and a second stage which utilizes an etching current density which is below the density which creates pitting of the aluminum.

Journal ArticleDOI
TL;DR: In this paper, the effects of etching temperature, plasma parameters, and film structure on lateral chemical etching of aluminum and its alloys in CCl4/argon plasmas are discussed.
Abstract: Reactive ion etching of aluminum and its alloys in CCl4/argon plasmas produces vertical etch profiles and residue‐free etched regions. However, under certain conditions, preferential lateral chemical etching occurs, which produces pits in the surface of the metal along the edges of the lands. The lateral etching is due to a thermally activated process and is related to the structure of the films. The extent of attack can be reduced by annealing the films at 450°C before etching. Al–Cu films deposited onto heated substrates are more susceptible to attack than those evaporated at lower temperatures. This apparent contradiction has not been resolved. The effects of etching temperature, plasma parameters, and film structure will be discussed. Scavenging of the responsible species by additions of H2 or O2 to the plasma is not successful.

Patent
Kie Y. Ahn1, Daniel Edward Cox1
29 Jun 1979
TL;DR: In this article, an ion beam is provided which strikes a solid source located in the vicinity of the substrate, and reactive gas species are given off by the solid source when it is hit by the ion beam and these species etch the substrate.
Abstract: A method for etching materials in which a solid, located in the vicinity of the substrate, is used to provide reactive species for etching the substrate. In contrast with prior art etching techniques, an ion beam is provided which strikes a solid source located in the vicinity of the substrate. Reactive gas species are given off by the solid source when it is hit by the ion beam and these species etch the substrate. Etch rates can be enhanced or retarded depending upon the composition of the solid mask. The process has particular utility in etching generally active metals such as Ti, Nb, Ta, NiFe, etc. which undergo a large change in etch rate when mixed gases, such as argon plus O2, CF4, CO, or CO2 (singularly or in combination) are used. As an example, solid TEFLON* can be used to surround the substrate during etching in order to generate active species, such as C and F, for etching of materials such as Ti, Si, NiFe, etc. Conductors and dielectrics can also be etched by this technique.

Journal ArticleDOI
TL;DR: In this paper, a thermally induced reaction between arsenic trioxide and GaAs has been observed to occur at the anodic oxide /GaAs interface using reflection Raman scattering.
Abstract: Elemental arsenic generated via a thermally induced reaction between arsenic trioxide and GaAs has been observed to occur at the anodic oxide /GaAs interface using reflection Raman scattering. Chemical etching experiments have verified that the arsenic is indeed localized in the interfacial region. Both amorphous and crystalline allotropes were observed, with the amorphous arsenic lying closest to the substrate. No evidence for the existence of elemental arsenic as an intrinsic anodization product in unannealed samples was observed down to the detection limits of the technique.

Patent
05 Feb 1979
TL;DR: In this paper, a differential reactive ion etching process is used to reduce the reflectivity of silicon by using ambient gases to react with the silicon, and the process takes place in a reactive ion-etching tool, typically a diode-configured system employing ambient gases which react with silicon.
Abstract: A differential reactive ion etching process significantly reduces the reflectivity of silicon. The process takes place in a reactive ion etching tool, typically a diode-configured system employing ambient gases which react with the silicon.


Patent
03 Apr 1979
TL;DR: In this article, a cavern of elliptical outline is etched into a highly conductive monocrystalline n+ doped silicon chip, leaving a thin membrane of an epitaxial layer of elliptical outline, in which the ratio of the elliptical axes is about 2:1 and the ellipses extend at an angle of 45° with respect to the (100) and (010) crystal axes.
Abstract: To provide a pressure sensor with good reproducibility, a cavern of elliptical outline is etched into a highly conductive monocrystalline n+ doped silicon chip, leaving a thin membrane of an epitaxial layer of elliptical outline, in which the ratio of the elliptical axes is about 2:1 and the elliptical axes extend at an angle of 45° with respect to the (100) and (010) crystal axes; a resistance bridge, which may be formed by boron diffusion or ion implantation, or by transistor integrated circuit technology, is applied to the center of the membrane, having its resistance or transistor, for example FET transistor, branches arranged at the 45° angle with respect to said crystal axes. Etching can be carried out electrochemically in a bath of diluted hydrofluoric acid, utilizing the differential conductivity between the epitaxial layer and an unmasked portion of the doped silicon to leave a membrane of the epitaxial layer; or by chemical etching in a bath of hydrofluoric acid, nitric acid, and acetic acid.

Journal ArticleDOI
TL;DR: To demonstrate the applicability of such gratings in integrated optics, gratings with periods in a 3000- to 5000-A range were made, and epitaxial growth on (110) GaAs substrates was carried out using a method of growth that deposits high-quality, nearly defect-free layers on such substrates.
Abstract: Blazed gratings with a theoretical blaze angle of 35 degrees 16' are etched into (110) GaAs surfaces by preferential chemical etching, using a photoresist mask. A maximum total diffraction efficiency of 15% was measured at 6328 A from a blazed grating with a 2.23-microm period, and the diffracted light was concentrated in a single order. To demonstrate the applicability of such gratings in integrated optics, gratings with periods in a 3000- to 5000-A range were made, and epitaxial growth on (110) GaAs substrates was carried out using a method of growth that deposits high-quality, nearly defect-free layers on such substrates.

Journal ArticleDOI
TL;DR: In this paper, a series of films with different dipping times were grown using the LPE method and the uniaxial anisotropy, as determined by the spin wave resonance technique, of both the transient layer and the bulk of these films, shows a typical behavior.
Abstract: A series of films with different dipping times were grown using the LPE method. The [111] GGG substrates were horizontally dipped with a rotation rate of 41 rpm. The saturation magnetization and the lattice mismatch were measured. The uniaxial anisotropy, as determined by the spin wave resonance technique, of both the transient layer and the bulk of each of these films, shows a typical behavior. These phenomena can be interpreted such that when a film grows not only the outside layer changes, but also the bulk of the film changes its properties. Further information has been obtained by a chemical etching experiment. The experimentally obtained spin wave resonance spectra are compared with numerically calculated resonance spectra and reveal that our films are homogeneous throughout the film thickness except for a very small region of 0.5 μm thickness next to the substrate‐film interface, which can be understood from the growth kinetics.

Journal ArticleDOI
TL;DR: In this article, the resist development model has been extended to simulate etched images in semiconductor processing, which has been used to simulate under a variety of conditions varying from conventional wet etching to newer directional etching processes such as dry etching.
Abstract: The resist development model has been extended to simulate etched images in semiconductor processing. The model has been used to simulate under a variety of conditions varying from conventional wet etching to newer directional etching processes such as dry etching. As compared to the conventional wet etching processes the dry etch technologies erode the resist mask more intensively during processing. The model has been confirmed using a number of experimentally alterable and lithography‐dependent conditions such as etch rates, resist profiles, resist thicknesses, etc. The effects of these on the final image shapes and the image sizes are predicted by simulations and aid the process definitions minimizing multivariate experiments. Isotropic etch processes such as those in the high‐pressure reactors are also modellable by this approach.

Patent
27 Jul 1979
TL;DR: In this article, an improved process for providing a design within a metallic surface by composite photoresist techniques in which the composites have sufficient chemical resistance to permit etching the design, with an aqua-regia or aquaregia fluoride system in the most commercially available corrosion resistant and high temperature resistant alloys and metals.
Abstract: An improved process for providing a design within a metallic surface by composite photoresist techniques in which the composite photoresist has sufficient chemical resistance to permit etching the design, with an aqua-regia or aqua-regia fluoride system in the most commercially available corrosion resistant and high temperature resistant alloys and metals. The process consists in applying a first coating of epoxy resin or other resin to the metal substrate or surface to be etched; subsequently applying a conventional photoresist material upon the cured resin; applying a photomask to said photoresist in a desired pattern; exposing the photomask to a light source to actuate the photoresist; chemically removing the photoresist in the non-activated areas; subsequently removing the epoxy or other resin underlying the non-activated areas preferably by means of a concentrated solution of sulfuric acid, which dissolves the resin but does not attack the photoresist and thereby exposing the metallic substrate in the same pattern as that developed upon the photoresist, and subsequently etching the metal by means of a mixture of acids capable of reacting with the metallic surface under the reaction conditions chosen, but not with the resin layer.

Patent
21 Feb 1979
TL;DR: A machine and process for forming indicia in or on the surface of objects, particularly friable or hyaline objects, by producing tape carrying indicia-forming masks, and for applying those masks to the articles to be engraved at a rapid rate, for relatively high volume applications, is disclosed as discussed by the authors.
Abstract: A machine and process for forming indicia in or on the surface of objects, particularly friable or hyaline objects, such as glass and ceramics, by producing tape carrying indicia-forming masks, and for applying those masks to the articles to be engraved at a rapid rate, for relatively high volume applications, is disclosed. A die is formed by chemical etching, and is heated to cut an adhesive-backed thermoplastic film on a carrier tape. The masks and the cutout portions are separated, so that both positive and negative masks are produced simultaneously, and either can be applied automatically to objects to be etched and/or embossed. Embossing and/or etching is performed by sandblasting, chemical etching, or selective application of coating materials.