Showing papers on "Junction temperature published in 2018"

Junction Temperature Control for More Reliable Power Electronics

Abstract: The thermal stress of power electronic components is one of the most important causes of their failure. Proper thermal management plays an important role for more reliable and cost-effective energy conversion. As one of the most vulnerable and expensive components, power semiconductor components are the focus of this paper. Possible approaches to control the semiconductor junction temperature are discussed in this paper, along with the implementation in several emerging applications. The modification of the control variables at different levels (modulation, control, and system) to alter the loss generation or distribution is analyzed. Some of the control solutions presented in the literature, which showed experimentally that the thermal stress can be effectively reduced, are reviewed in detail. These results are often mission-profile dependent and the controller needs to be tuned to reach the desired cost-benefit tradeoff. This paper analyzes also the many open questions of this research area. Among them, it is worth highlighting that a verification of the actual lifetime extension is still missing.

Real-Time Measurement of Temperature Sensitive Electrical Parameters in SiC Power MOSFETs

Abstract: This paper examines a number of techniques for junction temperature estimation of silicon carbide (SiC) MOSFET s devices based on the measurement of temperature sensitive electrical parameters for use in online condition monitoring. Linearity, sensitivity to temperature, and circuit design for practical implementation are discussed in detail. A demonstrator based on the measurement of the quasi-threshold voltage, the turn- on transient characteristic ( $di/ dt$ ), the on -state voltage, and the gate current peak is designed and validated. It is shown that the threshold voltage, the estimation of the gate current peak, and the on -state voltage have potentially good sensitivity to temperature variation and linearity over a wide operating range. Very low sensitivity to temperature is shown for $di/ dt$ . The proposed method can provide a valuable tool for continuous health monitoring in emerging applications of SiC devices to high-reliability applications.

Online Junction Temperature Estimation of SiC Power mosfets Through On-State Voltage Mapping

Abstract: This paper deals with real-time estimation of the junction temperature of SiC power mosfet s. The junction temperature of a device with four-switch module is estimated in real-time by measuring its current and on-state voltage V ON at each switching period and entering the temperature in the lookup table of the device. The temperature model is preliminarily obtained in a dedicated commissioning session, where V ON is measured at different temperature and current conditions. The results show the feasibility of online temperature monitoring and even the active limitation of the junction temperature of the tested SiC power mosfet modules accurately and with an instantaneous dynamic response. Different modules with die from different manufacturers were tested in an H-bridge demonstrator power converter, emulating the operating conditions of real converters such as voltage source dc/ac or dc/dc conversion structures. The commissioning procedure is meant to be performed directly on the final application for each converter. The measurements obtained using the proposed temperature estimation technique are validated using a thermal camera and compared to the direct measurement of the die temperature with a thermistor, showing high accuracy and high feasibility.

IGBT Junction Temperature Estimation via Gate Voltage Plateau Sensing

Abstract: A method for in situ high-bandwidth junction temperature estimation of insulated-gate bipolar transistors is introduced in this paper. The method is based on the acquisition of the gate voltage plateau during turn- on . It can be related to the junction temperature at any known device current, that can be effectively approximated using existing phase current measurements. This allows fast overtemperature protection of the power device or even active thermal cycle reduction via thermal control. This paper discusses, first, the physical mechanisms leading to the temperature sensitivity of the gate voltage plateau. Second, a rigorous sensitivity analysis of the gate voltage plateau is conducted. It allows to determine the maximal estimation error and provides information about the suitability of this method for various devices and applications. Finally, a sensing circuitry is presented, which allows accurate gate voltage plateau sensing every switching period as well as an easy integration into the gate driver. The performance of the proposed method is experimentally demonstrated with the sensing circuitry on a double pulse test bench over a wide operation range.

Influence of Temperature on the Pressure Distribution Within Press Pack IGBTs

Abstract: Press pack (PP) packaging technology has been applied to insulated-gate bipolar transistors (IGBTs) for high-voltage and high power density applications in recent years. The pressure distribution within PP IGBTs is very important because it affects both the electrical and thermal contact resistances, thermal cycling capability, and short-circuit current rating. Too much pressure will mechanically damage the chip and too little pressure will increase the thermal contact resistance, which eventually leads to chip thermal damage. In this paper, a finite-element multiphysics model cocoupled with an electrical field, thermal field, and mechanical field is proposed to analyze the collector current distribution, pressure distribution, and junction temperature distribution within PP IGBTs. The most important coupling variables, such as electrical and thermal contact resistances, for this cocoupled multiphysics model are calculated or measured by experiment through a single IGBT/fast-recovery diode chip submodule. Based on this multiphysics model, the influence of the high temperature generated by the chip's power dissipation on the pressure distribution within PP IGBTs (in the heating phase) is discussed, and then, compared with the pressure distribution in the clamping phase. The results show that the pressure distribution within PP IGBTs in the heating phase is extremely uneven and different from the value in the clamping phase. Furthermore, the mechanical model and its boundary conditions are verified through the pressure distribution experimental results in the clamping phase, which is measured based on the Fuji prescale film and the clamping test bench. Based on the simulation and experimental results, an optimization of the collector electrode and pedestal is proposed to improve the pressure distribution within PP IGBTs in the heating phase.

Power-dense multilevel inverter module using interleaved GaN-based phases for electric aircraft propulsion

Abstract: Realizing the electrification of aircraft necessitates the development of inverters and rectifiers with ultra-high efficiency and specific power simultaneously. Unconventional topologies such as the flying capacitor multilevel (FCML) inverter hold great promise for achieving transformational reductions in inverter power loss and weight due to drastically smaller filters and compact hybrid energy transfer mechanism. After describing methods to overcome obstacles in ultra-efficient and lightweight converter design, this work presents an example of interleaved FCML inverter operation. The successful, balanced interleaved operation was demonstrated in the laboratory with a dual-interleaved, 9-level converter prototype at 1 kV input bus voltage and 9.7 kW output power. At 98.6% peak efficiency, this converter achieves a gravimetric power density of 17.3 kW/kg and a volumetric power density of 35.3 kW/L including the contributions of the heat sink. Interestingly, observations from loss modeling and hardware efficiency measurements revealed the large impact of second-order loss mechanisms, such as dynamic on-state resistance and junction temperature. Insights gained from this new understanding can be incorporated into future modeling for more thorough optimization of the converter design.

On-state voltage measurement of fast switching power semiconductors

Abstract: The on-state resistance R ds,on is a key characteristic of unipolar power semiconductors and its value depends on the operating conditions, e.g. junction temperature, conducted current and applied gate voltage. Hence, the exact determination of the R ds,on value cannot rely on datasheet information and requires the measurement of current and on-state voltage during operation. Besides the determination of the conduction losses, the on-state voltage measurement enables dynamic R ds,on analysis, device temperature estimation, condition monitoring and consequently time-to-failure prediction. However, in contrast to a switch current measurement, several challenges arise in the design of an on-state voltage measurement circuit (OVMC), i.e. high measurement accuracy (mV-range) during on-state, high blocking voltage capability (kV-range) during off-state and fast dynamic response (ns-range) during switching transitions are demanded. Different OVMC concepts are known from IGBT applications, however, the more severe requirements introduced from the high switching frequency and low OV characterizing the operation of fast switching power semiconductors, prevent their usage. Off-the-shelf products hardly satisfy the mentioned specifications, whereas the performance of state-of-the-art OVM research prototypes require further investigations and/or improvements. With this aim, an innovative OVMC concept is designed, analyzed, calibrated and tested in this paper. Furthermore, the conduction losses of different power semiconductors are measured as function of their operating conditions to validate the performance and highlight the potential of the proposed OVMC.

Developing a standardized method for measuring and quantifying dynamic on-state resistance via a survey of low voltage GaN HEMTs

Abstract: Designing and optimizing high frequency, ultra-efficient converters requires detailed knowledge of the behavior and parasitic parameters for both active and passive components. Recently, wide bandgap transistors have enabled simultaneous increases in both switching frequency and efficiency due to higher maximum operating junction temperature limits, lower dc on-state resistance, and reduced parasitic inductances and capacitances. Yet, the early acceptance of gallium-nitride (GaN) transistors was plagued by detrimental dynamic on-state resistance effects. This non-linear, second-order phenomenon for GaN devices is characterized by an increase in on-state resistance with increasing voltage and temperature stress. While device manufacturers have made significant improvements compared to early generation devices, experimental evidence for a survey of commercial GaN transistors highlights that significant increase in on-state resistance with voltage and temperature stress still exists. This new method for measuring dynamic on-state resistance has the promise to shed new light on the dynamic on-state resistance limitations of GaN devices due to the independent control of drain current, voltage stress, pulse-width for device conduction time, and package temperature. Based on a survey of low voltage GaN transistors, two metrics are proposed not only to quantify the dynamic on-state resistance performance of a specific device, but also to facilitate a fair comparison between different GaN device technologies.

Enabling Junction Temperature Estimation via Collector-Side Thermo-Sensitive Electrical Parameters Through Emitter Stray Inductance in High-Power IGBT Modules

Abstract: This paper proposes the adoption of the inherent emitter stray inductance $L_{{\rm{eE}}}$ in high-power insulated gate bipolar transistor modules as a new dynamic thermo-sensitive electrical parameter (d-TSEP). Furthermore, a family of 14 derived dynamic TSEP candidates has been extracted and classified in voltage-based, time-based and charge-based TSEPs. Accordingly, the perspectives and the implementation challenges of the proposed method are discussed and summarized. Finally, high-power test platforms are designed and adopted to experimentally verify the theoretical analysis.

A Pulse-Biasing Small-Signal Measurement Technique Enabling 40 MHz Operation of Vertical Organic Transistors.

Abstract: Organic/polymer transistors can enable the fabrication of large-area flexible circuits. However, these devices are inherently temperature sensitive due to the strong temperature dependence of charge carrier mobility, suffer from low thermal conductivity of plastic substrates, and are slow due to the low mobility and long channel length (L). Here we report a new, advanced characterization circuit that within around ten microseconds simultaneously applies an accurate large-signal pulse bias and a small-signal sinusoidal excitation to the transistor and measures many high-frequency parameters. This significantly reduces the self-heating and therefore provides data at a known junction temperature more accurate for fitting model parameters to the results, enables small-signal characterization over >10 times wider bias I–V range, with ~105 times less bias-stress effects. Fully thermally-evaporated vertical permeable-base transistors with physical L = 200 nm fabricated using C60 fullerene semiconductor are characterized. Intrinsic gain up to 35 dB, and record transit frequency (unity current-gain cutoff frequency, fT) of 40 MHz at 8.6 V are achieved. Interestingly, no saturation in fT − I and transconductance (gm − I) is observed at high currents. This paves the way for the integration of high-frequency functionalities into organic circuits, such as long-distance wireless communication and switching power converters.

Real-Time Junction Temperature Sensing for Silicon Carbide MOSFET With Different Gate Drive Topologies and Different Operating Conditions

Abstract: The switching transient properties from the switching power semiconductor gate side are sensitive to the device's junction temperature ( $T_{j}$ ) Real-time $T_{j}$ sensing methods based on gate drive switching transient properties have been investigated on silicon MOSFET and silicon IGBT, with a conventional push–pull-type gate drive, under fixed dc-bus voltage In this paper, this method is applied to silicon-carbide (SiC) MOSFET The $T_{j}$ sensing methods are evaluated with different types of gate drive topologies By implementing the SiC MOSFETs into an H-bridge inverter, the effect of dc-bus voltage for the $T_{j}$ sensing method is investigated Different “gate drive−semiconductor” dynamic models are built, including gate drive output power stage, gate drive parasitics, SiC MOSFET intrinsic parameters, and PCB parasitics Experimental results are compared with circuit LTSpice model simulation The device vertical temperature contours are evaluated Suitable circuitry for $T_{j}$ sensitivity extraction is provided

Power cycling reliability results of GaN HEMT devices

Abstract: The GaN HEMT is a novel wide bandgap device which could improve the overall efficiency and at the same time shrink the system size. In order to verify the reliability of this promising semiconductor device, new measurement and testing methods have to be developed. In this work, as a general basis for performing reliability tests junction temperature measurement methods for GaN HEMT were investigated. By using suitable temperature measurement method, several power cycling tests were performed on GaN HEMT from three different manufacturers. The main failure mechanism of the GaN HEMT from two manufacturers under power cycling tests is the degradation of solder layer between device and printed circuit board. The main failure mechanism of the devices from the third manufacturer is bond wire lift-off. In GaN the piezoelectric effect is involved in the formation of the 2DEG, and electrical characteristics are sensitive to compressive and tensile stress. The question is whether repetitive deformation leads to new failure mechanisms compared to Si devices.

Comparative performance evaluation of temperature dependent characteristics and power converter using GaN, SiC and Si power devices

Abstract: Power electronics switching devices involving Wide Band Gap (WBG) materials such as, silicon carbide (SiC) and gallium nitride (GaN) provide substantial switching level improvements as compared to the silicon (Si) devices. Their ability to operate at higher voltages, temperatures and frequencies make them highly eligible for use in the future power electronics. In order to provide a comparative analysis of these materials, we studied their various parameters like energy band gap, carrier mobility, saturation velocity and thermal conductivity. A study also has been conducted to analyze and evaluate performance of GaN FET, SiC JFET and Si IGBT based dc-dc buck boost converter. Switching performance and energy dissipation at a variable junction temperature range is compared and evaluated for three power devices. Transistors' switching and conduction losses and their temperature dependency is discussed at the end. The results show that GaN based converter has better switching performance and overall efficiency, but have strong dependency of temperature.

Junction Temperature Measurement Method for Power mosfets Using Turn-On Delay of Impulse Signal

Abstract: This paper proposes a novel method for junction temperature measurement of power metal-oxide-semiconductor field-effect transistors ( mosfet s). The measurement method is using the turn- on delay of impulse signal, which is the delay time between the rising edge of impulse signal and the corresponding rising edge of drain–source current. Results show that the turn- on delay has a good linear relationship with temperature, and the method is suitably efficient for accurate junction temperature measurement of power mosfet s. The proposed method is verified using the thermal infrared method. Finally, this method is used to measure the real-time junction temperature of power mosfet device in a dc–dc boost converter.

Comprehensive Study on 2.5D Package Design for Board-Level Reliability in Thermal Cycling and Power Cycling

Abstract: 2.5D packages have been widely used in electronics industry for high performance and product miniaturization. As Through-Silicon-Via (TSV) fabrication methods and multi-level assembly technologies get mature, 2.5D packaging becomes reliable and affordable. In this work, board-level life prediction was performed for a 2.5D Field-Programmable Gate Array (FPGA) assembly in both accelerated thermal cycling and power cycling. Finite element models were built and validated by warpage measurement. Solder fatigue life in power cycling was investigated by computational fluid dynamics (CFD) simulation and finite element analysis. Improved life prediction for power cycling was achieved by mapping temperature results from CFD model to finite element model. Parametric studies regarding geometry and material factors were performed including PCB, substrate, thermal interface material (TIM) and lid adhesive, to give design suggestions to improve board-level thermal reliability. Maximum junction temperature of a 2.5D FPGA package is dependent on application scenarios and working environment. It is found that the designed maximum junction temperature and applied heatsink clamping force have considerable influences on board-level reliability.

Temperature-Controlled Power Semiconductor Characterization Using Thermoelectric Coolers

Abstract: Accurate characterization of power semiconductors over wide operating ranges is a necessity to accomplish better electrical and thermal designs of power converters. Especially, switching losses of power devices are rarely given sufficiently detailed in their datasheets, since they also depend strongly on the driving circuitry and design of the power converter itself. A means to extract the switching losses are double pulse measurements where the desired operating points can be freely chosen. This paper introduces a temperature conditioning unit that allows the adjustment of the junction temperature between −40 °C and 200 °C using thermoelectric coolers (TECs). The unit is for an automated double pulse test bench with dc-link voltages of up to 1 kV and switching currents of up to 1 kA. Up to 1 kW of electrical power is required to power the TECs. The design of the power converter is shown as well as the control scheme. An algorithm, which automatically extracts the switching losses of the measured double pulse waveforms is presented. An exemplary characterization of an Infineon EconoDual power module is conducted and the results are presented.

Liquid Metal Magnetohydrodynamic Pump for Junction Temperature Control of Power Modules

Abstract: Power modules are the most common components to fail in power converters that are employed in mass transportation systems, thus leading to high unscheduled maintenance cost. While operating, high junction temperature swings occur that result in high thermomechanical stress within the structure of the power module, reducing the lifetime of the module. Liquid metals as a cooling medium received so far little attention in the area of power semiconductor cooling, despite being able to remove high heat fluxes. This paper shows for the first time how liquid metal is used to reduce actively the junction temperature swing. A magnetohydrodynamic (MHD) pump has been designed for this purpose allowing active control of the flow rate of the liquid metal that impinges against the baseplate of the module. The pump has been 3-D printed and is attached directly to the power module. A closed-loop temperature control system is implemented, able to estimate the insulated-gate bipolar transistor's junction temperature, and thus, controls the MHD power. This paper presents simulation and experimental results showing reductions in the temperature swing over the full load cycle with 12 °C as the highest observed reduction rate. This paper also shows detailed designs of the MHD pump and the controller hardware.

Relationships between junction temperature, electroluminescence spectrum and ageing of light-emitting diodes

Abstract: We have developed spectral models describing the electroluminescence spectra of AlGaInP and InGaN light-emitting diodes (LEDs) consisting of the Maxwell–Boltzmann distribution and the effective joint density of states. One spectrum at a known temperature for one LED specimen is needed for calibrating the model parameters of each LED type. Then, the model can be used for determining the junction temperature optically from the spectral measurement, because the junction temperature is one of the free parameters. We validated the models using, in total, 53 spectra of three red AlGaInP LED specimens and 72 spectra of three blue InGaN LED specimens measured at various current levels and temperatures between 303 K and 398 K. For all the spectra of red LEDs, the standard deviation between the modelled and measured junction temperatures was only 2.4 K. InGaN LEDs have a more complex effective joint density of states. For the blue LEDs, the corresponding standard deviation was 11.2 K, but it decreased to 3.5 K when each LED specimen was calibrated separately. The method of determining junction temperature was further tested on white InGaN LEDs with luminophore coating and LED lamps. The average standard deviation was 8 K for white InGaN LED types. We have six years of ageing data available for a set of LED lamps and we estimated the junction temperatures of these lamps with respect to their ageing times. It was found that the LEDs operating at higher junction temperatures were frequently more damaged.

Active Junction Temperature Control of IGBT Based on Adjusting the Turn-off Trajectory

Abstract: The junction temperature fluctuation of an insulated-gate bipolar transistor (IGBT) is the most important factor of its aging failure, and smoothing the fluctuation is an effective way to improve the life of an IGBT. The existing methods for smoothing the fluctuation by active junction temperature control are not yet ready wide application, and exploring the different approaches to active junction temperature control is a hot topic. This paper presents a method of active junction temperature control that shifts the turn-off trajectory of an IGBT to adjust the IGBT turn-off loss for smoothing the junction temperature. The relationship between parameters of the adjusting circuit and turn-off loss is analyzed. On the basis of this analysis, a method of estimating the smoothing ability for the proposed active junction temperature control is deduced. Using an IGBT installed in a 1.2-MW direct-drive wind power converter as an example, the evaluation result shows that the proposed method can completely smooth the junction temperature fluctuation caused by a 40% rated load fluctuation. Finally, a low-power experiment is carried out.

Analysis of SiC MOSFET dI/dt and its temperature dependence

Abstract: A change regulation of variation in drain current (d I D /d t ) of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) and their temperature dependencies are examined. Experimental results show that the magnitude of turn-off d I D /d t decreases with temperature and turn-on d I D /d t increases with increasing temperature. Further analysis shows that turn-on d I D /d t is better than turn-off d I D /d t in terms of temperature dependency and exhibits good linearity. This behaviour results from the positive temperature coefficient of the intrinsic carrier concentration and the negative temperature coefficient of the effective mobility of the electrons in the SiC MOSFET. Other factors that affect the temperature dependency of d I D /d t , such as supply voltage, load current, and gate resistance, are also discussed. A temperature-based analytical model of d I D /d t for the SiC MOSFET is derived using fundamental device physics equations. The calculations generally fit the measurements well. These results are beneficial since they provide a potential approach for junction temperature estimation in the SiC MOSFET. In SiC MOSFET-based practical applications, if turn-on d I D /d t is sensed, then the junction temperature can be derived from the relationship curve of turn-on d I D /d t versus temperature drawn experimentally in advance.

New Analytical Model for Real-Time Junction Temperature Estimation of Multichip Power Module Used in a Motor Drive

Abstract: A new analytical electro-thermal model of a multichip power module is described in this paper. The proposed model is intended to be used during in-service conditions inside a motor drive for remaining useful lifetime calculation, in combination with a thermal cycle counting algorithm. The model allows fast calculations of the chips temperature, based on simple analytical expressions of averaged total power losses, and mathematical formulations of thermal impedances using the Foster network representation. The proposed model is computationally efficient, since it does not require the switching instants information, but only the used pulse width modulation (PWM) technique, which is advantageous for embedding in terms of reducing computation resources and time. Finally, a comparison between the proposed model results and experimental measurements is conducted at different operating points of the motor drive, and under two different switching modes; the third harmonic injection PWM for output frequencies below 20 Hz and the discontinuous PWM for frequencies above 20 Hz. The results obtained are very satisfactory in terms of mean temperature levels and temperature swings for frequencies from 1 to 50 Hz.

A High-Precision Adaptive Thermal Network Model for Monitoring of Temperature Variations in Insulated Gate Bipolar Transistor (IGBT) Modules

Abstract: This paper proposes a novel method for optimizing the Cauer-type thermal network model considering both the temperature influence on the extraction of parameters and the errors caused by the physical structure. In terms of prediction of the transient junction temperature and the steady-state junction temperature, the conventional Cauer-type parameters are modified, and the general method for estimating junction temperature is studied by using the adaptive thermal network model. The results show that junction temperature estimated by our adaptive Cauer-type thermal network model is more accurate than that of the conventional model.

Power Cycling of Commercial SiC MOSFETs

Abstract: The robustness under power cycling of three comparable silicon carbide MOSFETs in TO-247 packages from three different manufacturers is investigated, with silicon IGBTs serving as reference. The power cycling method, especially the junction temperature measurement and best practices to ensure its accuracy, is described. The results give insight into reliability and variability as well as aging behavior and failure modes. We find a large variability between samples, both in initial characteristics and measured cycling lifetime, as well as signs of semiconductor device degradation. There is a significant spread in the extent of the variability, in the average and minimum observed lifetime, as well as in the failure mode. Some samples fail quickly due to bond wire defects, some due to semiconductor degradation, while others show very long lifetimes.

Topology optimization and heat dissipation performance analysis of a micro-channel heat sink

Abstract: Junction temperature in the electronic packaging process is one of the critical factors affecting the service life of electronic devices. A micro-channel heat sink is a common heat dissipating device used to reduce the thermal resistance between components and substrate. In order to maximize the heat dissipation while minimizing the pressure drop, this paper adopts a topology optimization method. A material interpolation method based on variable density principle is used together with a moving asymptote algorithm for the optimization. The physics is governed by the heat and mass transfer, coupled with the momentum conservation in the fluid. Four parameters are varied in order to investigate their influence on the optimization process. A three-dimensional geometry has been constructed to study the flow field and the results are compared to a reference case to verify the temperature uniformity and thermal performance of the model. It is demonstrated that the optimized design of the micro-channel heat sink is reliable and effective.