Showing papers on "Junction temperature published in 2022"

Review of Silicon Carbide Processing for Power MOSFET

Abstract: Owing to the superior properties of silicon carbide (SiC), such as higher breakdown voltage, higher thermal conductivity, higher operating frequency, higher operating temperature, and higher saturation drift velocity, SiC has attracted much attention from researchers and the industry for decades. With the advances in material science and processing technology, many power applications such as new smart energy vehicles, power converters, inverters, and power supplies are being realized using SiC power devices. In particular, SiC MOSFETs are generally chosen to be used as a power device due to their ability to achieve lower on-resistance, reduced switching losses, and high switching speeds than the silicon counterpart and have been commercialized extensively in recent years. A general review of the critical processing steps for manufacturing SiC MOSFETs, types of SiC MOSFETs, and power applications based on SiC power devices are covered in this paper. Additionally, the reliability issues of SiC power MOSFET are also briefly summarized.

Online Junction Temperature and Current Simultaneous Extraction for SiC MOSFETs With Electroluminescence Effect

Abstract: In this letter, a junction-temperature and current extraction method is presented based on the electroluminescence mechanism of the SiC mosfet body diode. Starting from the observation of two characteristic peaks in the emitted light spectrum, we proved that the junction temperature and the drain current can be simultaneously measured. This novel method consists of decoupling the relationship between the intensity of the electroluminescence peaks, the current, and the temperature. Through this optical method with inherent electrical isolation, the junction temperature and current in the SiC chip can be simultaneously measured with high precision. The total error of the junction temperature estimation is within ±3 °C, and the error of the current estimation is about ±0.2 A.

A Temperature-Dependent Cauer Model Simulation of IGBT Module With Analytical Thermal Impedance Characterization

Abstract: In pursuit of high power density and high reliability of power converters, the junction temperature of power devices becomes an essential indicator for heath condition monitoring and thermal management. Particularly under high-temperature operating conditions, the temperature-dependent thermal properties of the chip and ceramic materials must be incorporated to enhance the prediction accuracy. In this article, an improved temperature-dependent Cauer-type thermal network of insulated-gate bipolar transistor (IGBT) module is established. The temperature dependence of thermal parameters for the chip layer and ceramic layer is meticulously considered. More importantly, finite-element method (FEM) simulation is used to yield the heat flux curve of the power module at the center line in order to better imitate the real heat-spreading scenario. In this way, the effective heat transfer area of each layer can be calculated accurately and analytically. By this analytic method, the temperature-dependent thermal impedance can be efficiently determined. Compared with prior-art fully FEM-based temperature-dependent thermal impedance characterization method, the method proposed in this article reduces the FEM simulation time cost approximately 20 times under the same computing hardware facilities and considerably simplifies the parameter extraction process. Finally, experimental results based on two commercial IGBT modules successfully validate the usefulness, effectiveness, and accuracy of the proposed thermal network model.

Feasibility Design of Tight Integration of Low Inductance SiC Power Module with Microchannel Cooler

Abstract: Traditional power module packaging becomes a limiting factor to fully exploit the benefits offered by high speed and high-temperature silicon carbide (SiC) devices. Especially in the automotive applications, the parasitic oscillation and localized hot spots have become unneglected problems. In this paper, an ultra-low inductance wire bondless power module with an integrated microchannel cooler is proposed. Flip-chip bonding with solder balls is used to replace traditional wire bonds to realize ultra-low inductance paths for both power- and gate-loop connections. As a result, the parasitic inductance of the proposed 1200 V, 300 A half-bridge SiC power module can be reduced to 0.93 nH. Then, to achieve high power density, an advanced low thermal resistance packaging architecture with an integrated microchannel cooler is proposed. Through femtosecond laser etching of the microchannels into the power module DBC ceramic layer, the microchannel cooler can be tightly embedded into the power module, resulting in a very high cooling capability. This method drives the module junction-to-coolant thermal resistance down to 0.073 cm ² ·K/W, which leads to approximately 65% reduction of thermal resistance compared with the conventional cooling integration structure. Moreover, a corresponding fabrication process is developed to enable the tight integration of the microchannel cooler structure.

Temperature-Dependent Reverse Recovery Characterization of SiC MOSFETs Body Diode for Switching Loss Estimation in a Half-Bridge

Abstract: In a hard switched mosfet based converter, turn-on energy losses is predominant in the total switching loss. At higher junction temperature the turn-on energy loss further increases due to the reverse recovery effect of the complementary mosfets body diode in a half-bridge configuration. Estimation of the switching loss under different operating conditions at an early design stage is essential for optimizing the thermal design. Analytical switching loss models available in literature are generally used for estimating the switching losses due to its accuracy and simplicity. In this article, the inaccuracy in the reported loss models due to non-inclusion of temperature-dependent reverse recovery characteristics of body diode, is investigated. A structured method to determine the temperature-dependent switching loss of a SiC mosfet in a half-bridge is presented. A simple methodology has been proposed to analyze the carrier lifetime's temperature dependencies of a SiC mosfets body diode. Device parameters from a $\text{1.2}\,\text{kV}/36\,\text{A}$ SiC mosfets datasheet are used for developing the loss model and experimental validation of the model.

A PCB-Embedded 1.2 kV SiC MOSFET Half-Bridge Package for a 22 kW AC–DC Converter

Abstract: This article presents the design and analysis of a double-side-cooled printed circuit board (PCB) embedded silicon carbide (SiC) MOSFET half-bridge package with low loop inductances and an integrated gate driver. The 1.2 kV SiC MOSFET dies used in the half-bridge package are embedded in the PCB using AT&S's patented technique. The dies are cooled and electrically connected to traces in the PCB through copper-filled microvias. The design methodology accounts for both electrical and thermal performance, limiting the power-loop inductance to 2.3 nH and the maximum package temperature to less than the 175 °C limit. The integration of the gate drive circuitry allows for a high power density and 2.2 nH gate-loop inductances. At 0.12 K/W, the measured junction-to-case thermal resistance with double-sided cooling is 57% lower than that of a TO-247 package. Under similar operating conditions, the PCB-embedded half-bridge package also achieves a 5.6 times lower voltage overshoot and a 0.5% higher peak efficiency than a TO-247-based half-bridge. This article reports the first demonstration of PCB-embedded 1.2 kV SiC MOSFET packages in buck, boost, and ac–dc converters. The prototype three-phase ac–dc converter for an electric vehicle on-board charger is composed of six PCB-embedded half-bridge packages and achieves an efficiency of 98.2% and a power density of 182 W/in3.

Thermal Contact Resistance Optimization of Press-Pack IGBT Device Based on Liquid Metal Thermal Interface Material

Abstract: Thermal contact resistances usually account for more than 50% of the total thermal resistance in a press-pack insulated-gate bipolar transistor (PP-IGBT) device, which affect the heat dissipation of the PP-IGBT device and lead to a high junction temperature. In this article, a method for optimizing the thermal contact resistances of the PP-IGBT device is proposed by filling the liquid metal thermal interface materials in the contact surface. Bismuth-based liquid metal with high thermal conductivity and electrical conductivity is chosen, and the material is used for filling between the insulated-gate bipolar transistor chip and the molybdenum layers. The thermal characteristics are compared with the traditional commercial PP-IGBT device using finite-element simulation and experimental methods. The high-voltage insulation reliability of the proposed optimized method is verified by blocking voltage test, and the long-term reliability of the device is verified by a power cycling test. The results show that the junction-to-case thermal resistance of the optimized PP-IGBT device can be reduced by more than 30%, which is helpful for improving the thermal reliability of large-capacity PP-IGBT devices.

Electrothermal-Control Co-Design of an All Silicon Carbide 2×250 kW Dual Inverter for Heavy-Duty Traction Applications

Abstract: This article presents the design and demonstration of an all silicon carbide (SiC) 2×250 kW dual inverter for heavy-duty traction applications. Through the use of a formal electrothermal-control co-design approach, the maximum power density of the proposed inverter system is 60 kW/L, which is accomplished by. More specifically, to analyze the thermal performance of the inverter, a lumped thermal model is developed based on the characteristics of the power modules and the cold plate. To analyze the complicated interaction between the power losses and module junction temperatures, a closed-loop iterative estimation scheme is proposed to estimate the inverter power loss and module junction temperature. Based on the proposed thermal model and estimation scheme, a detailed optimization procedure on the selection of switching frequency and dc-link capacitor is presented to maximize power density. Furthermore, design optimization of the busbar was conducted to minimize the stray inductance, thus reducing the voltage overshoot during switching transients. Comprehensive experimental studies were performed on a physical converter prototype built based on the optimization results, which validate both the effectiveness of the presented design approach.

Dynamic opto-electro-thermal characterization of solid state lighting devices: measuring the power conversion efficiency at high current densities

Abstract: Solid state lighting devices with high power densities require accurate characterization, as the rise of chip temperature impacts its optical, electrical, and lifetime characteristics. A detailed experimental study is performed in order to analyze opto-electro-thermal behavior as new high-power devices like laser diodes (LDs) are becoming of interest. The outline of this article was inspired by two major issues identified in previous experimental approaches. First, there is some debate in the literature about the linearity of the temperature coefficient of the forward voltage. Second, there is a limited number of experimental reports on the temperature dependence of power conversion efficiency. We have shown that prior variations are the result of a diversity in the selection of electrical parameters during thermal calibrations, as both linear and non-linear relationships for temperature coefficient of voltage can be obtained. On the other hand, it was discovered that report scarcity for temperature-dependent studies can be related to the use of passive approaches for temperature-dependent measurements. In temperature-controlled environments, short pulses with high current densities may not ensure the thermal equilibrium of the device under test due to small thermal capacitance. This issue, as well as the lengthy process of passive measurements can be addressed by implementing a dynamic measurement method presented in this study. Finally, linear power conversion efficiency trends with junction temperature are demonstrated for both blue light emitting diodes and LDs at high current densities.

A Novel Converter-Level IGBT Junction Temperature Estimation Method Based on the Bus Voltage Ringing

Abstract: Insulated gate bipolar transistor (IGBT) junction temperature monitoring is crucial for converter's healthy management and condition monitoring. However, most conventional IGBT junction temperature estimation methods are device-level, which means that monitoring junction temperatures of all IGBTs in converters require the same number of monitoring units as IGBTs, which is of high complexity and cost. A converter-level IGBT junction temperature estimation method based on the dc bus voltage ringing is proposed in this article. The peak values of the bus voltage ringing during switching transient display a linear dependence on the junction temperatures of the corresponding switching IGBTs. Hence, the bus voltage ringing can be used for estimating the junction temperatures of the IGBTs in a converter. The validity of the proposed method is verified by experiments on a double-pulse and three-phase converter. Besides, implementation schemes and calibration approaches for practical applications are discussed. The proposed method has a higher resolution as compared with a traditional on -state voltage-based IGBT junction temperature monitoring method. Besides, the proposed method reduces the circuit complexity, size, and cost, and it is easy to install. Moreover, the proposed method has a fast response and high resolution, and it does not disturb the normal operation. The proposed method is independent of bond wire degradation of the IGBT module.

Investigations on High-Power LEDs and Solder Interconnects in Automotive Application: Part I—Initial Characterization

Abstract: Thermo-mechanical reliability is one major issue in solid-state lighting. Mismatches in the coefficients of thermal expansion (CTE) between high-power LED packages and substrates paired with temperature changes induce mechanical stress. This leads to a thermal degradation of LED modules by crack formation in the solder interconnect and/or delamination in the substrate, which in turn increases junction temperature and thus decreases light output and reduces lifetime. To investigate degradation and understand influence of LED package design and solder material, a reliability study with a total of 1800 samples − segmented in nine LED types and five solder pastes − is performed. First of all, in this paper a state-of-the-art review of high-power LED packages is performed by analyzing and categorizing the packaging technologies. Second, the quality inspection after assembly is realized by transient thermal analysis (TTA), scanning acoustic microscopy (SAM) and X-ray. For TTA, a new method is introduced to separate the thermal resistance of the LED package from solder interconnect and substrate by applying the transient dual interface method (TDI) on samples with different solder interconnect void ratios. Further measurement effort is not required. The datasheet values for thermal resistance are verified and the different LED package types are benchmarked. The void ratio of the solder interconnects is determined by X-ray inspection combined with an algorithm to suppress disruptive internal LED package structures. TTA and TDI revealed that initial thermal performance is independent of solder paste type and that voiding is more critical to smaller LED packages. In addition, lower silver proportion in the paste is found to increase voiding. SAM is less sensitive for initial void detection than X-ray, but it’s applied to monitor crack propagation while aging in combination with TTA. The results of the reliability study, i.e., the crack growth under temperature shock test for the different SAC solders, will be presented in a second independent paper.

<i>In Situ</i> Junction Temperature Monitoring and Bond Wire Detecting Method Based on IGBT and FWD on-State Voltage Drops

Abstract: Junction temperature monitoring and bond wire detection are crucial for the condition monitoring and protection of insulated gate bipolar transistor (IGBT) and freewheeling diode (FWD). on -state voltage drop is one of the most popular parameters for junction temperature estimation and bond wire detection. However, there is still a lack of cost-effective on -state voltage drop measuring techniques for both IGBT and FWD with a fast response. This article proposes an in situ junction temperature monitoring and bond wire detecting method based on IGBT and FWD on -state voltage drops. The proposed technique can measure the on -state voltage drops of IGBT and FWD online with high accuracy and fast response. The on -state voltage drops of IGBT and FWD under low load current are linearly dependent on their junction temperatures. Besides, the on -state voltage drops under high load current are closely related to the bond wire degradation. Therefore, the junction temperatures and bond wire conditions of both IGBT and FWD can be monitored based on the on -state voltage drops during a period of alternating current. The experiment results validate the feasibility of the proposed on -state voltage drop-based method for junction temperature monitoring and bond wire detecting. The proposed method has characteristics of high response speed, noninvasiveness for normal converter operating, and simple structure.

Junction-to-Case Thermal Resistance Measurement and Analysis of Press-Pack IGBTs Under Double-Side Cooling Condition

Abstract: Junction-to-case thermal resistance R _thjc measurement under a double-side cooling condition of press-pack IGBTs (PP IGBTs) is a great challenge since the heat flow through the two heat paths is hard to be accurately extracted. In this article, an indirect method determining the proportion of heat dissipation on both sides only by temperature measurement is proposed to simultaneously measure two single-sided R _thjc of PP IGBTs under the double-side cooling condition, and it is performed with 4500 V/3000 A PP IGBTs. The test results show that the measured R _thjc is not a fixed value but is related to the load current used in the test, it increases as the load current increases, which is different from the traditional wire-bonded IGBT module. A thermomechanical bidirectional coupling finite element model is built to explain the impact mechanism that the deformation of the device causes the change of internal heat flow distribution since the components will be properly separated. In addition, a simpler double-sided R _thjc definition method that directly takes the average value of the case temperature on both sides as the case temperature to calculate the thermal resistance is developed, and the equivalence of the two methods are discussed based on the theoretical analysis and experiment.

Influence of Thermal Coupling on Lifetime Under Power Cycling Test

Abstract: In this article, the influence of thermal coupling in power modules on lifetime under power cycling test (PCT) is investigated. In a full-bridge power module for electric vehicle application, the thermal coupling is strong due to high power density and causes lateral temperature difference. In PCT, at the same maximum junction temperature Tvjmax and temperature swing ΔTvj, the influence of thermal coupling on lifetime and failure mode is investigated. The root cause of why thermal coupling influences lifetime and the failure mode is discussed by finite-element analysis. Transient thermal impedance is used to calibrate the simulation model. The Influence of thermal coupling on chip surface and solder layer temperature distribution is analyzed under the same test conditions. Furthermore, two parameters are extracted from the temperature distribution of chip surface as flags of failure mode determination. Finally, taking thermal coupling into account, combined with direct copper bonding structure, an improved layout is recommended in terms of lifetime.

Effect of TIM Deterioration on Monitoring of IGBT Module Thermal Resistance and Its Compensation Strategy

Abstract: Condition monitoring is a cost-effective means to reduce the unscheduled maintenance cost of insulated gate bipolar transistor (IGBT) modules. The junction to case thermal resistance $R_{\mathrm {thjc}}$ is considered as a critical health indicator of IGBT module solder layer. However, thermal interface materials’ (TIMs) deterioration will not only reduce the heat dissipation performance but also affects the accuracy of $R_{\mathrm {thjc}}$ monitoring of IGBT modules. This article investigates the effect of thermal grease deterioration on $R_{\mathrm {thjc}}$ monitoring of IGBT module. First, it is found that the thermal grease deterioration will lead to the decrease of monitored $R_{\mathrm {thjc}}$ of IGBT module under the same health status of IGBT solder layer, despite that the thermal resistance of TIM increasing as deterioration of the TIM takes place. That is, the same monitored increment ratio of $R_{\mathrm {thjc}}$ caused by the solder fatigue may correspond to different health status of the IGBT module, which cannot accurately reflect its actual health status. Then, a compensation strategy for thermal resistance monitoring based on the TIM aging rate is proposed, which uses the established mapping relationship to decouple the negative coupling part of TIM degradation. The compensated thermal resistance can better reflect the actual health status of the IGBT module and approximately eliminate the negative impact. Finally, the feasibility of the proposed compensation strategy is verified by finite element model (FEM) analysis and experiments.

Thermomechanical Fatigue Damage Model of a Solder Joint in Electronic Devices: An Interval Arithmetic Based Approach

Abstract: This paper presents a new opened-up reliability assessment framework and demonstrates the feasibility of using interval arithmetic by considering degradation and uncertainties effects. Instead of obtaining an unrealistic lifetime estimation, an interval useful lifetime estimation (i-ULE) expressing the possibility of a bound value for the lifespan of a power electronic system is defined. To gain an understanding of the open question, a DC–DC boost converter of 3000 W and 200/400 V is considered as a case study for electric vehicle applications. The study presents the significant self- and mutual-degradation effects on the reliability assessment by proposing and implementing an online junction temperature monitoring of insulated-gate bipolar transistors (IGBT) and diodes in the considered power converter. These effects are discussed through the proposed interval reliability assessment via performing power cycling accelerated aging tests on 32 IGBTs and 32 diodes. It reveals that there is a 27% difference in the global system useful lifetime estimation which can be evaluated with the proposed interval reliability assessment.

Thermoelectric Module of SiGe Bulk Alloys Forming p‐n Junction at the Hot Side

Abstract: Thermoelectric power generation is a potential technology for providing green energy. It is expected to be able to convert enormous amounts of waste heat to electrical energy. To realize this technology, further increases in conversion efficiency and durability are essential. In particular, durability is a critical issue, especially for harnessing high‐temperature heat sources. Thus, a thermoelectric module of SiGe is fabricated without electrodes at the hot side, which is the main cause of aging. Electronic conduction between p‐ and n‐type elements is alternatively introduced using a direct connection, forming a p‐n junction. Sufficiently low electrical contact resistances are achieved at the p‐n junction above 300 °C due to the dissipation of the depletion layer. The conversion efficiency is 2.0% with a hot‐side temperature of 700 °C. The power‐generation performance is constant during heat‐run tests conducted at 700 and 500 °C under vacuum and air, respectively, for more than 450 h. The results demonstrate that a stable power‐generation technology using a thermoelectric module at high temperatures is established successfully.

A SiC-Based Liquid-Cooled Electric Vehicle Traction Inverter Operating at High Ambient Temperature

Abstract: This paper describes the design process of a high-power-density 100 kW (34 kW/L) traction inverter for electric vehicles, operating at an ambient temperature of 105 °C. A detailed thermal analysis is performed based on the thermal behavior of the switching devices, and the results are used to estimate the semiconductor device junction temperature and to determine the requirements of the cooling system to achieve the target power level. A high-temperature gate drive board aiming for reliable system operation in electric vehicles is developed. An overcurrent protection scheme based on parasitic inductance between the power source and the Kelvin source of the power module has been implemented. A dc-link decoupling snubber circuit is designed numerically based on a detailed forth-order high-frequency equivalent circuit of a double pulse test circuit. The approach to optimize the snubber circuit, not only for the voltage spike suppression but also for good thermal performance, is proposed. Finally, a hardware prototype with SiC power modules has been built and tested at 60 kW continuous power and 100 kW for 20 seconds at 105 °C ambient temperature and 65 °C inlet coolant temperature.

An 800-V High-Density Traction Inverter – Electro-Thermal Characterization and Low-Inductance PCB Bussing Design

Abstract: The need to increase the power density of traction inverters for the electrified transportation systems offers an opportunity to adopt silicon carbide (SiC) devices. To ensure the system reliability, it is critical to select a SiC power module that can dissipate a sufficient amount of power to avoid operating beyond the maximum allowed junction temperature. In this work, a comprehensive electro-thermal characterization procedure based on the virtual junction temperature concept is proposed to characterize the module’s maximum power dissipation as a function of coolant temperature. Using the characterization results, it is feasible to determine the module’s safe operating area for a traction application in terms of the switching frequency and the coolant temperature. The proposed characterization method is demonstrated on a custom 1200-V SiC module to validate its feasibility for an 800-V, 150-kVA traction inverter system. In addition, the design approach for a low-inductance bussing structure using heavy copper printed circuit board (PCB) is presented in this work, which leads to a snubberless, compact, and low-cost system design. Measurements and experimental studies have been performed to validate the effectiveness of PCB bussing design. The overall volume of the inverter system is around 1.75 L, which leads to a volumetric power density of 86 kVA/L.

Geometric Study of Polymer Embedded Micro Thermoelectric Cooler with Optimized Contact Resistance

Abstract: Micro‐thermoelectric devices (μTEDs) are used for bio‐medical applications, powering internet‐of‐things devices, and thermal management. For such applications, μTEDs need to have a robust packaging so that the devices can be brought in direct thermal contact with the target heat sink and source. The packaging technology developed for macroscopic modules needs improvement as it cannot be applied to μTEDs due to a large thermal resistance between the capping material and the device which deteriorates its performance. In this work, μTEDs with high net cooling temperature are fabricated by optimizing the contact resistance and device design combined with a novel packaging technique that is fully compatible with on‐chip integration. The simulations and experiments demonstrate that the additional thermal loss caused by the packaging leads to an only marginal decrease in the net cooling temperature. The devices achieve a high net cooling temperature of 10.8 K without packaging and 9.6 K with packaging at room temperature. The packaging only slightly increases the thermal response time of the devices, which also shows an extremely high reliability of over 85 million cooling cycles. This simple packaging technique together with robust device performance is a step toward wide‐spread application of μTEDs.

Effects of Bonding Materials on Optical–Thermal Performances and High-Temperature Reliability of High-Power LED

Abstract: The die-bonding layer between chips and substrate determinates the heat conduction efficiency of high-power LED. Sn-based solder, AuSn20 eutectic, and nano-Ag paste were widely applied to LED interconnection. In this paper, the optical–thermal performances and high-temperature reliability of LED with these bonding materials have systematically compared and studied. The thermal conductivity, electrical resistivity, and mechanical property of these bonding materials were characterized. The LED module packaged with nano-Ag has a minimum working temperature of 21.5 °C. The total thermal resistance of LED packaged with nano-Ag, Au80Sn20, and SAC305 is 4.82, 7.84, and 8.75 K/W, respectively, which is 4.72, 6.14, and 7.84 K/W higher after aging for 500 h. Meanwhile, the junction temperature change of these LEDs increases from 2.33, 3.76, and 4.25 °C to 4.34, 4.81, and 6.41 °C after aging, respectively. The thermal resistance of the nano-Ag, Au80Sn20 and SAC305 layer after aging is 1.5%, 65.7%, and 151.5% higher than before aging, respectively. After aging, the LED bonded with nano-Ag has the better optical performances in spectral intensity and light output power, which indicates its excellent heat dissipation can improve the light efficiency. These results demonstrate the nano-Ag bonding material could enhance the optical-thermal performances and high-temperature reliability of high-power LED.

Gate-Driver Integrated Junction Temperature Estimation of SiC MOSFET Modules

Abstract: SiC MOSFET power modules are becoming global solutions in systems operating in harsh environment, and due to large economic implications, achieving reliability of such systems is of utmost importance. Thereby, this article is focused on improving the reliability of the SiC MOSFETS, accomplished by generating intelligence on the gate driver (GD) with providing insight on real-time behavior of relevant switch information. The device switch current $ {I_{\mathrm {d}}}$ , apart from being used for short-circuit detection assessing the short-term reliability, in the combination with the ON-state drain-to-source voltage $ {V_{\mathrm {ds,\mathrm{\scriptscriptstyle ON}}}}$ enables the possibility of online junction temperature ( $ {T_{\mathrm {J}}}$ ) estimation. The knowledge of $ {T_{\mathrm {J}}}$ can enable active thermal control as well as condition monitoring of the SiC MOSFET device such as state-of-health, remaining useful life, and maintenance scheduling, tackling the long-term reliability aspects. With the aid of a field-programmable gate array (FPGA) on GD, a lookup table (stored in the FLASH memory on GD) containing device output characteristics is assessed, enabling real-time $ {T_{\mathrm {J}}}$ monitoring for both devices in the commercial SiC MOSFET half-bridge module configuration. Following the developed GD prototype, $ {T_{\mathrm {J}}}$ is verified in pulsed operation with maximum error less than 5 °C having excellent repeatability of ±1.2 °C and is furthermore verified in continuous operation showing promising results. In addition, degradation monitoring and aging compensation scheme are discussed, with the goal of maintaining the accuracy of the $T_{\mathrm {j}}$ estimation throughout device’s lifetime.

Real time estimation of power transistor junction temperature for motor drive application

Abstract: This paper presents a simple and accurate method to estimate the junction temperature of power transistors in a traction inverter drive. Junction temperature plays an important role in the traction inverter drive system as a health monitoring of the system and the de-rating strategy for the overall system. The inverter power loss is the main input parameter for the thermal model to estimate the junction temperature. This work presents a quantitative method that counts on the power transistor manufacturer datasheet to calculate the power loss, subsequently, it is used as an input to the thermal model to estimate the junction temperature of the power transistor. This method is verified using Simulink simulation and dSPACE-based experiment.

Thermal Characterization of Spray Impingement Heat Transfer over a High-Power LED Module

Abstract: The cooling demand for a nominal 300 W power LEDs is around 200 W/cm2 at the chip-scale, and the junction temperature must be maintained below 120 °C for reliable operation. Special thermal management packaging is required to maintain LEDs below this reliability temperature limit. The present study investigates the thermal characteristics of single-nozzle spray cooling over a high-power LED module. The detailed thermal characterization within the LED assembly is explored using both, experimental and numerical approaches. The LED substrate temperature is experimentally obtained for various input power supplies, water flow rate, inlet water temperature, nozzle height, and offset from the LED center. Heat transfer coefficient at two radial locations (R = 0 mm and 12.5 mm) is estimated to evaluate the heat removal capacity of the spray for these operating conditions. Numerical study is performed to visualize temperature and heat flux distribution within the LED module, and to investigate the appearance of thermally critical locations. Junction temperature is the critical parameter for thermal characterization of the LED module, and is numerically investigated for various operating conditions. The junction temperature is maintained below 95 °C at the nominal electrical input power for a Re ≥ 8,000 using the proposed spray cooling design. The present study establishes the efficacy of spray cooling for high-power LED modules, even when the supply power exceeds 112% of the nominal power range.

An Online Junction Temperature Monitoring Correction Method for SiC MOSFETs at Different Parasitic Parameters

Abstract: Due to the remarkable performance of silicon carbide (SiC) metal–oxide–semiconductor field-effect transistor (MOSFET) on high temperature, it is promising in future applications in various applications. The accurate online junction temperature based on dynamic temperature-sensitive electrical parameters (TSEPs) is significant for the protection and condition monitoring, which can prolong or monitor the lifetime of SiC MOSFET devices. In this article, four different dynamic TSEPs, including turn-on delay time, turn-off delay time, and maximum current turn-on and turn-off switching rates, are theoretically analyzed taking the parasitic parameters into consideration. The experimental analysis of the influence of parasitic parameters ’ dynamic TSEPs is carried on using a buck converter test setup. Based on the theoretical and experimental analyses, a junction temperature correction method is proposed for SiC MOSFET. The online junction temperature monitoring experiments are used to verify the accuracy and effectiveness of the proposed method. The results show that the proposed correction method can largely eliminate the junction temperature monitoring error at different parasitic parameters. The maximum measurement error is reduced from 147 °C to 4.7 °C after correction.