Junction temperature

About: Junction temperature is a research topic. Over the lifetime, 5058 publications have been published within this topic receiving 58643 citations.

Graphite-Embedded High-Performance Insulated Metal Substrate for Wide-Bandgap Power Modules

Abstract: Emerging wide-bandgap (WBG) semiconductor devices such as silicon carbide (SiC) metal–oxide semiconductor field-effect transistors (MOSFETs) and gallium nitride high-electron-mobility transistors can handle high power in reduced semiconductor areas better than conventional Si-based devices owing to superior material properties. With increased power loss density in a WBG-based converter and reduced die size in power modules, thermal management of power devices must be optimized for high performance. This article presents a graphite-embedded insulated metal substrate (thermally-annealed-pyrolytic-graphite-embedded insulated metal substrate—IMSwTPG) designed for WBG power modules. Theoretical thermal performance analysis of graphite-embedded metal cores is presented, with design details for IMSwTPG with embedded graphite to replace a direct-bonded copper (DBC) substrate. The proposed IMSwTPG is compared with an aluminum nitride-based DBC substrate using finite-element thermal analysis for steady-state and transient thermal performance. The solutions’ thermal performances are compared under different coolant temperature and thermal loading conditions, and the proposed substrate's electrical performance is validated with static and dynamic characterization. Using graphite-embedded substrates, junction-to-case thermal resistance of SiC MOSFETs can be reduced up to 17%, and device current density can be increased by 10%, regardless of the thermal management strategy used to cool the substrate. Reduced transient thermal impedance of up to 40% of dies owing to increased heat capacity is validated in transient thermal simulations and experiments. The half-bridge power module's electrical performance is evaluated for on -state resistance, switching performance, and switching loss at three junction temperature conditions. The proposed substrate solution has minimal impact on conduction and switching performance of SiC MOSFETs.

Modified Phase-Shifted PWM Scheme for Reliability Improvement in Cascaded H-Bridge Multilevel Inverters

Abstract: The cascaded H-bridge multilevel inverter (CHMI) is a modular structure that consists of many power semiconductor switches. With this increase in the number of power semiconductor switches, it is hard to predict and handle the failure of the devices, and hence reliability of CHMI decreases. The major cause of power semiconductor switch failure is junction temperature that is produced by power losses. The study proposes a multi-carrier pulse-width modulation (PWM) scheme for reduction in switching losses of CHMI. In the proposed modulation scheme, the two legs conduct switching operation at different frequencies for switching reduction. One leg conducts switching operation with high frequency, while the other leg conducts switching operation with fundamental frequency. The switching operations with different frequencies cause unbalanced switching loss to each leg. Therefore, the junction temperature that is based on power losses leads to different life-times for the power semiconductor switch. Additionally, the switching frequency of the two legs is alternated to evenly distribute switching losses and junction temperature. Simulation and experimental results verify the performance of the proposed PWM scheme.

An Exergy-Based Figure-of-Merit for Electronic Packages

Abstract: Chip power consumption and heat dissipation have become important design issues because of increased energy costs and thermal management limitations. As a global compute utility evolves, seamless connectivity from the chip to the data center will become increasingly important. The optimization of such an infrastructure will require performance metrics that can adequately capture the thermodynamic and compute behavior at multiple physical length scales. In this paper, an exergy-based figure-of-merit (FoM), defined as the ratio of computing performance (in MIPS) to the thermodynamic performance (in exergy loss), is proposed for the evaluation of computational performance. The paper presents the framework to apply this metric at the chip level. Formulations for the exergy loss in simple air-cooled heat sink packages are developed, and application of the proposed approach is illustrated through two examples. The first comparatively assesses the loss in performance resulting from different cooling solutions, while the second examines the impact of non-uniformity in junction power in terms of the FoM. Modeling results on a 16 mm×24 mm chip indicate that uniform power and temperature profiles lead to minimal package irreversibility (and therefore the best thermodynamic performance). As the nonuniformity of power is increased, the performance rapidly degrades, particularly at higher power levels. Additionally, the competing needs of minimization of junction temperature and minimization of cooling power were highlighted using the exergy-based approach. It was shown that for a given power dissipation and a specific cooling architecture (such as an air-cooled heat sink solution), an optimal thermal resistance value exists beyond which the costs of increased cooling may outweigh any potential benefits in performance. Thus, the proposed FoM provides insight into thermofluidic inefficiencies that would be difficult to gain from a traditional first-law analysis. At a minimum, the framework presented in this paper enables quantitative evaluation of package performance for different nonuniform power inputs and different choices of cooling parameters. At best, since the FoM is scalable, the proposed metric has the potential to enable a chip-to-data-center strategy for optimal resource allocation.

Determination of Junction Temperature in InGaN and AlGaInP Light-Emitting Diodes

Abstract: The junction temperature of a light-emitting diode (LED) directly and greatly affects its performances. Therefore, the reliable measurement and accurate estimation of the junction temperature of an LED is extremely important. This paper proposes an approach for directly determining the dependence of junction temperature on injected currents in InGaN and AlGaInP LEDs. Various important physical parameters that affect the junction temperature of an LED are also considered.