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Junction temperature

About: Junction temperature is a research topic. Over the lifetime, 5058 publications have been published within this topic receiving 58643 citations.


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Journal ArticleDOI
TL;DR: It is found that it is possible to design a TE solution that will both maximize the COP and minimize the junction temperature, and compared to the more conventional coefficient of performance maximization scheme.
Abstract: Advanced cooling solutions are needed to address the growing challenges posed by future generations of microprocessors. This paper outlines an optimization methodology for electronic system based thermoelectric (TE) cooling. This study stresses that an optimum TE cooling system should keep the electronic device below a critical junction temperature while utilizing the smallest possible heat sink. The methodology considers the electric current and TE geometry that will minimize the junction temperature. A comparison is made between the junction temperature minimization scheme and the more conventional coefficient of performance (COP) maximization scheme. It is found that it is possible to design a TE solution that will both maximize the COP and minimize the junction temperature. Experimental measurements that validate the modeling are also presented.

80 citations

Journal ArticleDOI
TL;DR: In this article, the model of a merged p-i-n Schottky (MPS) SiC diode is presented, and its parameters are identified with experimental measurements.
Abstract: Silicon carbide (SiC) power devices can operate at much higher junction temperature than those made of silicon. However, this does not mean that SiC devices can operate without a good cooling system. To demonstrate this, the model of a merged p-i-n Schottky (MPS) SiC diode is presented, and its parameters are identified with experimental measurements. This model is then used to study the ruggedness of the diode regarding the thermal runaway phenomenon. Finally, it is shown that, where a purely unipolar diode would be unstable, the MPS structure brings increased stability.

79 citations

Proceedings ArticleDOI
19 Jun 2005
TL;DR: In this paper, a new thermal management application of silicon-based thermoelectric (TE) device on high power LED is unveiled, which is fabricated by the microfabrication and flip-chip assembly process.
Abstract: In this paper, a new thermal management application of silicon-based thermoelectric (TE) device on high power LED is unveiled. The silicon-based TE device is fabricated by the microfabrication and flip-chip assembly process. Thermal images photographed by infrared camera demonstrate the cooling function of the silicon-based TE devices. Because the LED chip is encapsulated in a package, the junction temperature of the LED chip cannot be measured directly. An electrical-thermal conversion method is used to measure the junction temperature of the high power LED. The result shows that the silicon-based thermoelectric device can effectively reduce the thermal resistance of the high power LED.

79 citations

Journal ArticleDOI
TL;DR: In this paper, the authors used infrared measurements to assess the measurement accuracy of the peak gate current (Iワン GPeak) method for Insulated-gate bipolar transistor (IGBT)junction temperature measurement.
Abstract: Infrared measurements are used to assess the measurement accuracy of the peak gate current (I GPeak ) method for Insulated-gate bipolar transistor (IGBT)junction temperature measurement. Single IGBT chips with the gate pad in both the center and the edge are investigated, along with paralleled chips, as well as chips suffering partial bondwire lift-off. Results are also compared with a traditional electrical temperature measurement method: the voltage drop under low current (V CE (low ) ). In all cases, the IG Peak method is found to provide a temperature slightly overestimating the temperature of the gate pad. Consequently, both the gate pad position and chip temperature distribution influence whether the measurement is representative of the mean junction temperature. These results remain consistent after chips are degraded through bondwire lift-off. In a paralleled IGBT configuration with nonnegligible temperature disequilibrium between chips, the I GPeak method delivers a measurement based on the average temperature of the gate pads.

79 citations

Journal ArticleDOI
TL;DR: In this article, a board-level integrated silicon carbide (SiC) mosfet power module for high temperature and high power density application is presented, where a silicon-on-insulator (SOI)-based gate driver capable of operating at 200 °C ambient temperature is designed and fabricated.
Abstract: This paper presents a board-level integrated silicon carbide (SiC) mosfet power module for high temperature and high power density application. Specifically, a silicon-on-insulator (SOI)-based gate driver capable of operating at 200 °C ambient temperature is designed and fabricated. The sourcing and sinking current capability of the gate driver are tested under various ambient temperatures. Also, a 1200 V/100 A SiC mosfet phase-leg power module is developed utilizing high temperature packaging technologies. The static characteristics, switching performance, and short-circuit behavior of the fabricated power module are fully evaluated at different temperatures. Moreover, a buck converter prototype composed of the SOI gate driver and SiC power module is built for high temperature continuous operation. The converter is operated at different switching frequencies up to 100 kHz, with its junction temperature monitored by a thermosensitive electrical parameter and compared with thermal simulation results. The experimental results from the continuous operation demonstrate the high temperature capability of the power module at a junction temperature greater than 225 °C.

79 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023118
2022277
2021233
2020287
2019334
2018303