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Junction temperature

About: Junction temperature is a research topic. Over the lifetime, 5058 publications have been published within this topic receiving 58643 citations.


Papers
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Journal ArticleDOI
TL;DR: In this paper, the effect of hot spots in the active layer of a light-emitting diodes (LED) has been investigated and the importance of zero defects in one of the more popular interconnect schemes (the epi-down soldered flip-chip configuration) is investigated.
Abstract: Light-emitting diodes (LEDs) are a strong candidate for the next-generation general illumination applications. LEDs are making great strides in brightness performance and reliability; however, the barrier to widespread use in general illumination still remains the cost (dollars per lumen). LED packaging designers are pushing the LED performance to its limits. This is resulting in increased drive currents and thus the need for lower-thermal-resistance packaging. The efficiency and reliability of solid-state lighting devices strongly depends on successful thermal management, because the junction temperature of the chip is the prime driver for effective operation. As the power density continues to increase, the integrity of the package electrical and thermal interconnects becomes extremely important. Experimental results with high-brightness LED packages show that chip attachment defects can cause significant thermal gradients across the LED chips, leading to premature failures. Perfect chip and interconnect structures for highly conductive substrates showed only a 2 K temperature variation over a chip area of approximately 1 mm2, while defective chips experienced greater than 40 K temperature variations over an identical area. A further numerical study was also carried out with parametric finite-element models to understand the temperature profile variation of the chip active layer due to the bump defects. Finite-element models were utilized to evaluate the effects of hot spots in the chip active layer. The importance of zero defects in one of the more popular interconnect schemes—the epi-down soldered flip-chip configuration—is investigated and demonstrated.

37 citations

Journal ArticleDOI
TL;DR: In this paper, a novel online IGBT junction temperature measurement method based on the on-state voltage drop is proposed, which can monitor the voltage drop of the IGBT and extract IGBT temperature online.
Abstract: Insulated gate bipolar transistor (IGBT) module is the most widely used power electronic device in converters. Condition monitoring of IGBT is critical for avoiding sudden failures. Health management of converters based on accurate IGBT junction temperature is of great importance to reliable operation. However, the existing monitoring methods have some drawbacks, including low feasibility of online implementation, intrusiveness, and slow response. IGBT junction temperature has a strong influence on IGBT on -state voltage drop. A novel online IGBT junction temperature measurement method based on the on -state voltage drop is proposed in this article. This technique can monitor the on -state voltage drop of IGBT and extract IGBT junction temperature online. Besides, the influences of the measurement circuit temperature variations and IGBT load current variations are considered and compensated based on the off -state stage of the IGBT. Simulation and experimental results validate the feasibility of the proposed technique. The proposed method has advantages of fast response, low cost, and simple circuit structure for noninvasive online IGBT junction temperature monitoring.

37 citations

Journal ArticleDOI
TL;DR: In this article, various reliability issues for power DMOS devices on 4H-SiC operated at a junction temperature of more than 200 °C are extensively discussed in terms of five manifest problems and potential treats.
Abstract: There still remain a number of reliability problems to be resolved with regard to long-term high junction temperature operation of SiC power devices because at present they simply follow Si-based technology. In this paper, various reliability issues for power DMOS devices on 4H-SiC operated at a junction temperature of more than 200 °C are extensively discussed in terms of five manifest problems and potential treats: (1) interlayer dielectric erosion, (2) Al spearing, (3) Ni2Si contact disappearance, (4) electrode delamination, and (5) gate time-dependent dielectric breakdown. Preventive measures for these issues are proposed, including the use of a Ta/TaN barrier metal, a SiCH barrier dielectric, decarbonised Ni2Si and an ONO gate dielectric, and their effectiveness is experimentally verified. A viable device structure and fabrication process that successfully incorporate these measures are then presented. Finally, a storage life of more than 5380 hours at 300 °C is demonstrated for 1 × 1 mm2 4H-SiC power DMOS devices incorporating selected countermeasures. (© 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

37 citations

Journal ArticleDOI
TL;DR: In this article, the photoluminescence (PL) of the GaAs substrate excited by the electroluminecence of the active layer is adopted to determine the junction temperature in AlGaInP∕GaAs light emitting diodes.
Abstract: The photoluminescence (PL) of the GaAs substrate excited by the electroluminescence of the active layer is adopted to determine the junction temperature in AlGaInP∕GaAs light emitting diodes. Based on the Varshni equation for GaAs, the temperature measured by this approach is consistent with that obtained by the emission peak energy shift approach. As the PL signal is generated within the substrate, no calibration dependent on the device structure is necessary to determine the junction temperature of the device.

37 citations

Patent
01 Mar 2004
TL;DR: In this article, the body bias voltage applied to each device under test can be adjusted device-by-device to achieve essentially the same junction temperature at each device, which can be used to control junction temperature.
Abstract: Systems and methods for reducing temperature dissipation during burn-in testing are described. Devices under test are each subject to a body bias voltage. The body bias voltage can be used to control junction temperature (e.g., temperature measured at the device under test). The body bias voltage applied to each device under test can be adjusted device-by-device to achieve essentially the same junction temperature at each device.

37 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023118
2022277
2021233
2020287
2019334
2018303