scispace - formally typeset
Search or ask a question
Topic

Junction temperature

About: Junction temperature is a research topic. Over the lifetime, 5058 publications have been published within this topic receiving 58643 citations.


Papers
More filters
Proceedings ArticleDOI
01 Apr 1975
TL;DR: In this article, a technique is described which uses straightforward electrical measurement procedures to determine the peak junction temperature of power transistors, which can be used to generate more realistic safe operating area limits.
Abstract: A technique is described which uses straightforward electrical measurement procedures to determine the peak junction temperature of power transistors. To determine the peak temperature, standard electrical measurement techniques are altered to account for the difference between the distributions of the calibration and measurement currents in the active area of the device. For relatively uniform temperature distributions, the electrically determined peak junction temperature is only about 6% or less below the infrared measured peak temperature whereas the standard electrically measured temperature is about 10 to 25% below the infrared measured peak temperature. For severely non-uniform temperature distributions, when only about 20% of the total active area of the device is dissipating power at steady state, the electrically determined peak temperature is within 11% of the infrared measured peak temperature while the standard electrically measured temperature is more than 40% below the infrared measured peak temperature. Device operating conditions for which the junction temperature as determined by standard electrical methods, infrared techniques, and the electrical peak temperature technique equals the manufacturer's specified maximum safe operating temperature are compared with one another and with the manufacturer's specified safe operating limits. It is suggested that the electrical peak temperature technique can be used to generate more realistic safe operating area limits and to determine the validity of specified safe operating limits of power transistors.

37 citations

Journal ArticleDOI
TL;DR: In this paper, the authors proposed to monitor the thermal parameters of insulated gate bipolar transistor (IGBT) module using the case temperature, which is able to eliminate the influence of thermal interface material (TIM) degradation on the monitored results.
Abstract: In this paper, we propose to monitor the thermal parameters of insulated gate bipolar transistor (IGBT) module using the case temperature. This method works during the shutoff period of IGBT module where the case temperature is in the cooling phase By establishing the relationship between the Cauer-type thermal RC parameters and the time constants of case temperature cooling curves, thermal parameters of the IGBT module can be identified. The proposed method is able to eliminate the influence of thermal interface material (TIM) degradation on the monitored results, which is quite challenging for the current case temperature monitoring methods. Moreover, it enables the detection of thermal resistance and thermal capacitance of the TIM and that of the IGBT module at the same time. Experimental tests are performed to validate the accuracy and feasibility of the proposed method. Moreover, impacts of the junction temperature, case temperature sensing position, and thermal coupling on the monitored results are analyzed.

37 citations

Patent
Aviad Cohen1, Adam De La Zerda1, Lev Finkelstein1, Ronny Ronen1, Dmitry Rudoy1 
12 Sep 2005
TL;DR: In this paper, the operating rate of an electronic system is maximized without exceeding a thermal constraint, such as a maximum junction temperature of an integrated circuit (IC) or other portion of the electronic system.
Abstract: The operating rate of an electronic system is maximized without exceeding a thermal constraint, such as a maximum junction temperature of an integrated circuit (IC) or other portion of the electronic system. An operating parameter of the system that controls the thermal output of the system is calculated for an upcoming time period based upon the previously measured thermal performance relationship to the operating parameter level. If the predicted thermal performance will exceed a maximum allowable level of the thermal constraint, then the operating parameter is reduced by an amount calculated to keep the thermal constraint at a level just below the maximum allowable level, thus resulting in an optimal control approach to maximizing the system performance while not exceeding the thermal constraint.

37 citations

Proceedings ArticleDOI
10 Jun 1974
TL;DR: In this paper, the difference between the measured thermal impedance of power transistors when determined by the pulsed heating curve and cooling curve techniques is discussed, and the theoretical predictions of the model are shown to be in good agreement for practical applications with three-dimensional computer simulations and experimental results.
Abstract: Differences between the measured thermal impedance of power transistors when determined by the pulsed heating curve and cooling curve techniques are discussed. These differences are shown to result primarily because the power density distributions of these devices change as the devices heat; as a result of these changes the heating curve and the cooling curve are not conjugate. It is shown that the cooling curve technique, when the cooling curve is initiated from the most non-uniform steady state thermal distribution, (maximum voltage, maximum power) will indicate a larger value for the thermal impedance than will the pulsed heating curve technique, even for pulses in excess of the d-c power level. A one dimensional model for power transistor cooling is described. The theoretical predictions of the model are shown to be in good agreement for practical applications with three-dimensional computer simulations and experimental results. Using this model, it is possible to estimate an average junction temperature and the area of power generation at steady state. Both T0-66 and TO-3 encased devices of mesa and planar structures were included in this study.

36 citations

Proceedings ArticleDOI
28 Jan 1997
TL;DR: The study shows that the system must be well characterized, including accurate knowledge of circuit board thermal conductivity and accurate simulation of radiation heat transfer, to serve for validation purposes and the JEDEC enclosure can serve as a viable experimental validation tool for compact models.
Abstract: A methodology is proposed for the validation of compact thermal models of electronic packages which utilizes data and simulations obtained from a simple but realistic system containing the package. The test system used to demonstrate the methodology is the enclosure specified by the Electronic Industries Association JEDEC Subcommittee JC15.1 for thermal measurements in a natural convection environment. Simulations for a detailed model and several different compact models for a 88-pin plastic quad flat-package in the enclosure are in good agreement with experimental measurements of junction temperature. The study shows that the system must be well characterized, including accurate knowledge of circuit board thermal conductivity and accurate simulation of radiation heat transfer, to serve for validation purposes. For the package used in this study, system level considerations can outweigh package level considerations for predicting junction temperature. Given that the system is accurately modeled, the JEDEC enclosure can serve as a viable experimental validation tool for compact models.

36 citations


Network Information
Related Topics (5)
Capacitor
166.6K papers, 1.4M citations
84% related
Voltage
296.3K papers, 1.7M citations
84% related
Transistor
138K papers, 1.4M citations
82% related
CMOS
81.3K papers, 1.1M citations
81% related
Photovoltaic system
103.9K papers, 1.6M citations
78% related
Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023118
2022277
2021233
2020287
2019334
2018303