Latency (engineering)

About: Latency (engineering) is a research topic. Over the lifetime, 7278 publications have been published within this topic receiving 115409 citations. The topic is also known as: lag.

Minimum Latency Training Strategies for Streaming Sequence-to-Sequence ASR

Abstract: Recently, a few novel streaming attention-based sequence-to-sequence (S2S) models have been proposed to perform online speech recognition with linear-time decoding complexity. However, in these models, the decisions to generate tokens are delayed compared to the actual acoustic boundaries since their unidirectional encoders lack future information. This leads to an inevitable latency during inference. To alleviate this issue and reduce latency, we propose several strategies during training by leveraging external hard alignments extracted from the hybrid model. We investigate to utilize the alignments in both the encoder and the decoder. On the encoder side, (1) multi-task learning and (2) pre-training with the framewise classification task are studied. On the decoder side, we (3) remove inappropriate alignment paths beyond an acceptable latency during the alignment marginalization, and (4) directly min-imize the differentiable expected latency loss. Experiments on the Cortana voice search task demonstrate that our proposed methods can significantly reduce the latency, and even improve the recognition accuracy in certain cases on the decoder side. We also present some analysis to understand the behaviors of streaming S2S models.

System-on-a-chip processor synchronization support in hardware

Abstract: For scalable-shared memory multiprocessor System-on-a-Chip implementations, synchronization overhead may cause catastrophic stalls in the system. Efficient improvements in the synchronization overhead in terms of latency, memory bandwidth, delay and scalability of the system involve a solution in hardware rather than in software. This paper presents a novel, efficient, small and very simple hardware unit that brings significant improvements in all of the above criteria: in an example, we reduce time spent for lock latency by a factor of 4.8, the worst-case execution of lock delay in a database application by a factor of more than 450. Furthermore, we developed a software architecture together with RTOS support to leverage our hardware mechanism. The worst-case simulation results of a client-server example on a four-processor system showed that our mechanism achieved an overall speedup of 27%.

Dynamic instruction schedulers in a 3-dimensional integration technology

Abstract: We present the design of high-performance and energy-efficient dynamic instruction schedulers in a 3-Dimensional integration technology. Based on a previous observation that the critical path latency of a conventional dynamic scheduler is greatly affected by wire delay, we propose 3D-integrated scheduler designs by partitioning a conventional scheduler across multiple vertically-stacked die. The die-stacked organization reduces the lengths of critical wires thus reducing both latency and energy. Our simulation results show that a 20-entry (120-entry) instruction scheduler implemented in a 2-die stack achieves a 9% (19%) reduction in latency with simultaneous energy reduction as compared to a conventional planar design. The benefits are even larger when the instruction scheduler is implemented on a 4-die stack, with the corresponding latency reductions being 12% (32%).

Lymphoid-Related CD11c+ CD8α+ Dendritic Cells Are Involved in Enhancing Herpes Simplex Virus Type 1 Latency

Abstract: The mechanism(s) by which herpes simplex virus type 1 (HSV-1) latency is established in neurons is not known. In this study, we examined the effect of dendritic cells (DCs) on the level of HSV-1 latency in trigeminal ganglia (TGs) of ocularly infected BALB/c and C57BL/6 mice. We found that immunization of wild-type mice with FMS-like tyrosine kinase 3 ligand (Flt3L) DNA, which increases the number of DCs, increased the amount of latency in infected mice. Conversely, depletion of DCs was associated with reduced latency. Latency was also significantly reduced in Flt3L(-/-) and CD8(-/-) mice. Interestingly, immunization of Flt3L(-/-) but not CD8(-/-) mice with Flt3L DNA increased latency. Transfer experiments using DCs expanded ex vivo with Flt3L or granulocyte-macrophage colony-stimulating factor suggested that increased latency was associated with the presence of lymphoid-related (CD11c(+) CD8alpha(+)) DCs, while reduced latency was associated with myeloid-related (CD11c(+) CD8alpha(-)) DCs. Modulation of DC numbers by Flt3L DNA immunization or depletion did not alter acute virus replication in the eye or TG or eye disease in ocularly infected mice. Our results suggest that CD11c(+) CD8alpha(+) DCs directly or indirectly increase the amount of HSV-1 latency in mouse TGs.

SAT-Match: a self-adaptive topology matching method to achieve low lookup latency in structured P2P overlay networks

Abstract: Summary form only given. A peer-to-peer (P2P) system is built upon an overlay network whose topology is independent of the underlying physical network. A well-routed message path in an overlay network with a small number of logical hops can result in a long delay and excessive traffic due to undesirably long distances in some physical links. We propose an effective method, called SAT-Match, to adoptively construct structured P2P overlay networks, aiming at significantly reducing the lookup routing latency. In this method, each joining peer is initially guided to find a physically close neighbor to connect with. After then, its overlay location is adoptively adjusted whenever a location mismatch is detected. The topology matching optimization in our method solely relies on local neighborhood information. Compared with existing topology matching methods, our method addresses their three limitations: (1) heavily relying on global information about the Internet by using landmark-based measurements, (2) lacking adaptation to frequent peer movement in a dynamic environment, such as mobile networks, and (3) insufficiently accurate in topology matching due to the lack of adaptive topology adjustment. We have evaluated our method in the content-addressable network (CAN), a representative structured P2P system with a strong tolerance to frequent peer arrivals/departures. Through intensive simulation experiments on large scale CAN overlays, we have shown the effectiveness of SAT-Match. Our method can achieve average logical/physical link latency reduction rate by up to 40%. It also outperforms "landmark binning", a method utilizing global information by up to 20%. Finally, combining with the landmark binning method, SAT-Match can achieve up to 60% latency reduction.