Latency (engineering)

About: Latency (engineering) is a research topic. Over the lifetime, 3729 publications have been published within this topic receiving 39210 citations. The topic is also known as: lag.

Thorough Analysis of MAC Protocols in Wireless Sensor Networks

Abstract: Due to the nature of low sensing range, limited power capacity, high density, more efficient medium access control (MAC) protocols are needed to achieve low latency, low power and high throughput in wireless sensor networks. This paper summarized the key requirements for MAC protocol design and analyzed the advantages and disadvantages of existed MAC protocols and outlined promising directions for future work.

A low-cost high-speed source-synchronous interconnection technique for GALS chip multiprocessors

Abstract: The globally asynchronous locally synchronous (GALS) design style for a large area chip has become increasingly attractive due to the difficulty of designing global clocking circuits at high clock frequencies in the GHz range. In this paper, we present a high-speed interconnect network for a GALS multiprocessing system composed of a 2-D mesh array of processors. Processors are locally clocked by their own oscillators and communicate together using a static circuit-switched technique combined with a source-synchronous communication scheme. A technique to maximize the timing reliability on long-distance interconnects at high clock rates is proposed that is area and power efficient with low latency and allows a sustained ideal peak throughput of one word per cycle.

A Novel and Very Fast 4-2 Compressor for High Speed Arithmetic Operations

Abstract: A novel high speed 4-2 compressor using static and pass-transistor logic, has been designed in a 0.35µm CMOS technology. In order to reduce gate level delay and increase the speed, some changes are performed in truth table of conventional 4-2 compressor which leaded to the simplification of logic function for all parameters. Therefore, power dissipation is decreased. In addition, because of similar paths from all inputs to the outputs, the delays are the same. So there will be no need for extra buffers in low latency paths to equalize the delays.

Performance analysis of ultra-reliable short message decode and forward relaying protocols

Abstract: Machine-type communication (MTC) is a rapidly growing technology which covers a broad range of automated applications and propels the world into a fully connected society. Two new use cases of MTC are massive MTC (mMTC) and ultra-reliable low latency communication (URLLC), where mMTC supports a large number of devices with high reliability and low rate connectivity while URLLC refers to excessively low outage probability under very stringent latency constraint. Herein, we examine the URLLC through three cooperative schemes, namely dual-hop decode and forward, selection combining, and maximum ratio combining, and compare to direct transmission under Rayleigh fading. We compare the performance of studied cooperative protocols under two distinct power constraints with respect to latency and energy efficiency. Moreover, we illustrate the impact of coding rate on the probability of successful transmission in ultra-reliable region in addition to the effect of power allocation on the outage probability. We also provide the performance analysis of cooperative schemes in terms of energy efficiency and latency requirements.

Low Latency Color Segmentation on Embedded Real-Time Systems

Abstract: This paper presents a color segmentation algorithm for embedded real-time systems with a special focus on latencies The algorithm is part of a Hardware-Software-System that realizes fast reactions on visual stimuli in highly dynamic environments There is furthermore the constraint to use low-cost hardware to build the system Our system is implemented on a RoboCup middle size league prototype robot