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Latency (engineering)

About: Latency (engineering) is a research topic. Over the lifetime, 3729 publications have been published within this topic receiving 39210 citations. The topic is also known as: lag.


Papers
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23 Oct 2017
TL;DR: The algorithm is evaluated over both simulated Internet bottleneck scenarios as well as in a Long Term Evolution (LTE) system simulator and is shown to achieve both low latency and high video throughput in these scenarios.
Abstract: This memo describes a rate adaptation algorithm for conversational media services such as interactive video. The solution conforms to the packet conservation principle and uses a hybrid loss-and-delay- based congestion control algorithm. The algorithm is evaluated over both simulated Internet bottleneck scenarios as well as in a Long Term Evolution (LTE) system simulator and is shown to achieve both low latency and high video throughput in these scenarios.

47 citations

Patent
29 Aug 1997
TL;DR: In this article, a system for fast, efficient and reliable communication of object state irmation among a group of processes combines the use of a fast, but lossy and thus unreliable communications channel to the group of process and a server coupled with the group for providing data which has been lost in the multicasting.
Abstract: A system for fast, efficient and reliable communication of object state irmation among a group of processes combines the use of a fast, but lossy and thus unreliable communications channel to the group of processes and a server coupled to the group for providing data which has been lost in the multicasting In one embodiment, a central server supports reliability and rapid joining while using UDP multicast messaging to achieve rapid interaction and low bandwidth Differential messages are sent over the lossy channel to compactly describe how to compute the new state of an object from any of several previous states Such a description can be interpreted even if some number of prior descriptions were not received, greatly reducing the need for explicit, round-trip message repairs while also conserving bandwidth In one embodiment, the central server communicates with each member of the group over a reliable channel to robustly detect and repair objects affected by lost messages

47 citations

Proceedings ArticleDOI
28 Dec 2015
TL;DR: This work introduces a method that uses Long Short-Term Memory Recurrent Neural Networks (LSTM-RNN) that outperforms the state-of-the-art baselines in terms of accuracy, while at the same time drastically reducing latency and increasing the time resolution of the detector.
Abstract: Singing voice detection aims at identifying the regions in a music recording where at least one person sings. This is a challenging problem that cannot be solved without analysing the temporal evolution of the signal. Current state-of-the-art methods combine timbral with temporal characteristics, by summarising various feature values over time, e.g. by computing their variance. This leads to more contextual information, but also to increased latency, which is problematic if our goal is on-line, real-time singing voice detection. To overcome this problem and reduce the necessity to include context in the features themselves, we introduce a method that uses Long Short-Term Memory Recurrent Neural Networks (LSTM-RNN). In experiments on several data sets, the resulting singing voice detector outperforms the state-of-the-art baselines in terms of accuracy, while at the same time drastically reducing latency and increasing the time resolution of the detector.

47 citations

Proceedings ArticleDOI
03 Dec 2015
TL;DR: This work experimentally demonstrates the transmission of 48 20-MHz LTE signals with a CPRI-equivalent data rate of 59 Gb/s, achieving a low round-trip digital-signal-processing latency of <;2 μs and a low mean error-vector magnitude of ~2.5 % after fiber transmission.
Abstract: We experimentally demonstrate the transmission of 48 20-MHz LTE signals with a CPRI-equivalent data rate of 59 Gb/s, achieving a low round-trip digital-signal-processing latency of <2 μs and a low mean error-vector magnitude of ∼2.5 % after fiber transmission.

47 citations

Journal ArticleDOI
TL;DR: Negative impedance converters inserted at regular intervals along an on-chip line are shown to reduce losses from more than 1 dB/mm to less than 0.3 dB/ mm at 10 GHz, a factor-of-three improvement in power and a one-and-a-half-times improvement in latency over an optimally repeated RC line of the same wire width.
Abstract: In this paper, we describe the use of distributed loss compensation to provide nearly transmission-line behavior for long on-chip interconnects. Negative impedance converters (NICs) inserted at regular intervals along an on-chip line are shown to reduce losses from more than 1 dB/mm to less than 0.3 dB/mm at 10 GHz. Results are presented for a 14-mm 3-Gb/s on-chip double-data-rate (DDR) link in 0.18-mum CMOS technology, with a measured latency of 12.1 ps/mm and an energy consumption of less than 2 pJ/b with a BER<10-14. This constitutes a factor-of-three improvement in power and a one-and-a-half-times improvement in latency over an optimally repeated RC line of the same wire width

47 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202210
2021692
2020481
2019389
2018366
2017227