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Leakage (electronics)

About: Leakage (electronics) is a(n) research topic. Over the lifetime, 32751 publication(s) have been published within this topic receiving 312149 citation(s). The topic is also known as: leakage current & charge leakage.
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Journal ArticleDOI
29 Apr 2003-
TL;DR: Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices and different circuit techniques to reduce the leakage power consumption are explored.
Abstract: High leakage current in deep-submicrometer regimes is becoming a significant contributor to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide thickness are reduced. Consequently, the identification and modeling of different leakage components is very important for estimation and reduction of leakage power, especially for low-power applications. This paper reviews various transistor intrinsic leakage mechanisms, including weak inversion, drain-induced barrier lowering, gate-induced drain leakage, and gate oxide tunneling. Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices. Finally, the paper explores different circuit techniques to reduce the leakage power consumption.

2,154 citations


Journal ArticleDOI
15 Feb 2007-Nature
TL;DR: This work demonstrates an organic circuit with very low power consumption that uses a self-assembled monolayer gate dielectric and two different air-stable molecular semiconductors (pentacene and hexadecafluorocopperphthalocyanine, F16CuPc) to implement transistors, circuits, displays and sensors on arbitrary substrates.
Abstract: Organic transistors and circuits show great promise for the realization of futuristic roll-up displays, adaptive sensors for humanoid robots and ubiquitous radio-frequency identification tags. But today's organic circuits require operating voltages of 15 to 30 volts (10 to 20 batteries' worth), and they draw enough power to drain those batteries in a day. To overcome this major hurdle, Hagen Klauk et al. have developed a method of fabricating organic circuits that run on a single 1.5-volt battery for several years. The key to the method is the use of a layer of an insulating organic material just one molecule thick; although the layer is very thin, it leaks only a small amount of current, while it provides for a large capacitance. Two different types of organic semiconductors are used to fabricate transistors, logic gates and ring oscillators. A report of the development of organic electronic circuits, which require only a single 1.5V battery and last for several years. The main ingredient is the use of a single layer of an insulating organic material. Although the layer is very thin, it leaks only small amount of current, while providing for a large capacitance. The prospect of using low-temperature processable organic semiconductors to implement transistors, circuits, displays and sensors on arbitrary substrates, such as glass or plastics, offers enormous potential for a wide range of electronic products1. Of particular interest are portable devices that can be powered by small batteries or by near-field radio-frequency coupling. The main problem with existing approaches is the large power consumption of conventional organic circuits, which makes battery-powered applications problematic, if not impossible. Here we demonstrate an organic circuit with very low power consumption that uses a self-assembled monolayer gate dielectric and two different air-stable molecular semiconductors (pentacene and hexadecafluorocopperphthalocyanine, F16CuPc). The monolayer dielectric is grown on patterned metal gates at room temperature and is optimized to provide a large gate capacitance and low gate leakage currents. By combining low-voltage p-channel and n-channel organic thin-film transistors in a complementary circuit design, the static currents are reduced to below 100 pA per logic gate. We have fabricated complementary inverters, NAND gates, and ring oscillators that operate with supply voltages between 1.5 and 3 V and have a static power consumption of less than 1 nW per logic gate. These organic circuits are thus well suited for battery-powered systems such as portable display devices2 and large-surface sensor networks3 as well as for radio-frequency identification tags with extended operating range4.

1,274 citations


Journal ArticleDOI
Nam Sung Kim1, Todd Austin1, D. Baauw1, Trevor Mudge1  +5 moreInstitutions (2)
01 Dec 2003-IEEE Computer
Abstract: Off-state leakage is static power, current that leaks through transistors even when they are turned off. The other source of power dissipation in today's microprocessors, dynamic power, arises from the repeated capacitance charge and discharge on the output of the hundreds of millions of gates in today's chips. Until recently, only dynamic power has been a significant source of power consumption, and Moore's law helped control it. However, power consumption has now become a primary microprocessor design constraint; one that researchers in both industry and academia will struggle to overcome in the next few years. Microprocessor design has traditionally focused on dynamic power consumption as a limiting factor in system integration. As feature sizes shrink below 0.1 micron, static power is posing new low-power design challenges.

1,163 citations


Journal ArticleDOI
Kathy Boucart, Adrian M. Ionescu1Institutions (1)
Abstract: In this paper, we propose and validate a novel design for a double-gate tunnel field-effect transistor (DG tunnel FET), for which the simulations show significant improvements compared with single-gate devices using a gate dielectric. For the first time, DG tunnel FET devices, which are using a high-gate dielectric, are explored using realistic design parameters, showing an on-current as high as 0.23 mA for a gate voltage of 1.8 V, an off-current of less than 1 fA (neglecting gate leakage), an improved average subthreshold swing of 57 mV/dec, and a minimum point slope of 11 mV/dec. The 2D nature of tunnel FET current flow is studied, demonstrating that the current is not confined to a channel at the gate-dielectric surface. When varying temperature, tunnel FETs with a high-kappa gate dielectric have a smaller threshold voltage shift than those using SiO2, while the subthreshold slope for fixed values of Vg remains nearly unchanged, in contrast with the traditional MOSFET. Moreover, an Ion/Ioff ratio of more than 2 times 1011 is shown for simulated devices with a gate length (over the intrinsic region) of 50 nm, which indicates that the tunnel FET is a promising candidate to achieve better-than-ITRS low-standby-power switch performance.

1,061 citations


Journal ArticleDOI
Abstract: Many applications call for high step-up DC-DC converters that do not require isolation. Some DC-DC converters can provide high step-up voltage gain, but with the penalty of either an extreme duty ratio or a large amount of circulating energy. DC-DC converters with coupled inductors can provide high voltage gain, but their efficiency is degraded by the losses associated with leakage inductors. Converters with active clamps recycle the leakage energy at the price of increasing topology complexity. A family of high-efficiency, high step-up DC-DC converters with simple topologies is proposed in this paper. The proposed converters, which use diodes and coupled windings instead of active switches to realize functions similar to those of active clamps, perform better than their active-clamp counterparts. High efficiency is achieved because the leakage energy is recycled and the output rectifier reverse-recovery problem is alleviated.

938 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202223
2021817
20201,250
20191,568
20181,456
20171,395