Showing papers on "Link-state routing protocol published in 1985"

Fault-Tolerant Routing in DeBruijn Comrnunication Networks

Abstract: A class of communication networks which is suitable for "multiple processor systems" was studied by Pradhan and Reddy. The underlying graph (to be called Shift and Replace graph or SRG) is based on DeBruijn digraphs and is a function of two parameters r and m. Pradhan and Reddy have shown that the node-connectivity of SRG is at least r. The same authors give a routing algorithm which generally requires 2m hops if the number of node failures is ≤(r -1). In this paper we show that the node-connectivity of SRG is (2r - 2). This would immediately imply that the system can tolerate up to (2r - 3) node failures. We then present routing methods for situations with a certain number of node failures. When this number is ≤(r - 2) our routing algorithm requires at most m + 3 + logr m hops if 3 + logr m ≤m. When the number of node failures is ≤(2r - 3) our routing algorithm requires at most m + 5 + logr m hops if 4 + logr m ≤ m. In all the other situations our routing algorithm requires no more than 2m hops. The routing algorithms are shown to be computationally efficient.

Randomized routing on fat-tress

Abstract: Fat-trees are a class of routing networks for hardwareefficient parallel computation. This paper presents a randomized algorithm for routing messages on a fat-tree. The quality of the algorithm is measured in terms of the load factor of a set of messages to be routed, which is a lower bound on the time required to deliver the messages. We show that if a set of messages has load factor λ = Ω(lg n lg lg n) on a fat-tree with n processors, the number of delivery cycles (routing attempts) that the algorithm requires is O(λ) with probability 1-O(1/n). The best previous bound was O(λ lg n) for the off-line problem where switch settings can be determined in advance. In a VLSI-like model where hardware cost is equated with physical volume, we use the routing algorithm to demonstrate that fat-trees are universal routing networks in the sense that any routing network can be efficiently simulated by a fat-tree of comparable hardware cost.

Integrated network controller for a dynamic nonhierarchical routing switching network

Abstract: A nonhierarchial switching system employing a modified unified algorithm for developing link sizes for paths that connect switches in the system and routing sequences for the switches in the system, and further employing means for updating the routing sequences to minimize potential blocking in the network. In one embodiment, the modified unified algorithm develops improved link size determinations by taking advantage of traffic sensitive dynamic routing on the alternate paths available in the nonhierarchial switching system for connecting any switch to any other switch in the system. Updating of the routing sequences is achieved in that embodiment by evaluating the least loaded path for each potential connection of two switches in the system and, when appropriate, by installing the least loaded path as the second choice path in the routing sequence for that potential connection.

Path oriented routing system and method for packet switching networks

Abstract: A path oriented routing system and method for packet switching networks with end-to-end internal protocols. It allows switch pairs to communicate over multiple paths without packet disordering. A distributed loop-free shortest path algorithm assigns a number to a path at the time it is created and this number remains valid through path changes. Consequently, existing traffic can be maintained on existing paths, while new traffic is assigned to the current (i.e. new) shortest paths.

Routing method in computer aided customization of a two level automated universal array

Abstract: A routing method implemented in the stored programs of a digital computer ich is programmably operated to generate the wire interconnect masks for a two level metallization automated universal array having undefined roadbeds between rows of cells comprised of identical semiconductor device basic units which are further interconnected to provide a particular integrated circuit structure. Conductor routing is provided by a computer aided design system that, among other things, carries out a route analysis process which determines in which roadbed each wire should be tentatively routed in conjunction with generating a routing density profile for minimizing congestion for a particular circuit design and when the roadbed density is exceeded, certain wires are removed under a set of criteria for routing by a pathfinder routing process. Following route analysis, detailed routing and rerouting is performed sequentially by a direct routing process, a greedy channel routing process, and a pathfinder routing process with rerouting being performed after each channel router and pathfinding process. Furthermore, the greedy channel routing process makes a single pass from left to right in all wires which cross successive points simultaneously and, if necessary, deleting a wire or wires which are then rerouted by the pathfinding process.

WEAVER: A Knowledge-Based Routing Expert

Abstract: In this paper we describe WEAVER, a channel/switch-box knowledge-based routing program. WEAVER considers all the important routing metrics such as 100% routability, minimum routing area, minimum wire length, and minimum number of vias simultaneously. It allows pre-routed nets, and user interaction throughout the entire routing process. It also relaxes unnecessary constraint of assigning different layers to different directions, the constraint imposed by all of the current channel and switch-box routers. WEAVER is a grid-based router that utilizes two interconnection layers and can be easily expanded to route any shape routing area such as 'T' or '+'. Implemented in OPS5, a production system language, WEAVER routinely produces routings requiring less area than routers that focus on a single routing metric.

Two-Dimensional Router for Double Layer Layout

Abstract: A heuristic algorithm for two dimensional routing utilizing two distinct layers is presented. It is assumed that all terminals are on the boundary of a rectilinear routing region with or without initial routes present. The router produces a Manhattan-style routing collapsed into one layer. Another program decides the layering, however, it is not described here. By default, when the layering program is not used, vertical segments of routes are placed on one layer, horizontal on the other.

Fault location techniques for distributed control interconnection networks

Abstract: One class of networks suitable for use in parallel processing systems is the multistage cube network. The authors focus on fault location procedures suitable for use in networks that use distributed routing control through the use of routing tags and message transmission protocols. Faults occurring in the data lines can corrupt message routing tags transmitted over them and thereby cause misrouting of messages. Protocol lines (used in handshaking between network sources and destinations), if faulty, can prevent a message path from being established or can cause the path to `lock up' once transmission of data has begun. These faults have more pronounced effects on the network performance than faults previously considered for centralized routing control systems. The single-fault location procedures presented form a logical superset to those of the centralized control systems (where message routing is dictated by the actions of a global control unit) and can be adapted for use in both circuit and packet switching networks.

Automatic Routing Algorithm for VLSI

Abstract: Because most LSI layout systems use the Channel Assignment method for routing, they have disadvantages in which block outlines, terminal positions, and placement of blocks are restricted for some reasons and layers with the multilayer routing are used ineffectively. We have successfully developed the LSI layout system that handles up to polygon blocks with arbitrary outlines by remodeling the line search method often used for PCB routing. This paper describes the accelerating of the line search method.

Distributed Multi-Destination Routing: The Constraints of Local Information

Abstract: In computer networks, message routing is often accomplished by network nodes using local information. The unavailability of global information intuitively makes hard routing problems virtually impossible. This paper formalizes this intuition by examining a hard (NP-complete) routing problem, the problem of multi-destination routing. It is shown that with only limited information it is impossible to optimize network utilization for the multi-destination routing problem. Moreover, it is impossible to even approximate optimality to within a specific tolerance. Several versions of this result are proved; the versions differ in terms of the amount of information available at a node, and the extent to which the problem cannot be approximated. An improved local information algorithm is presented which is best possible amongst local information algorithms.

A routing algorithm for interconnected local area networks

Abstract: An algorithm to be used for distributing routing information between interconnected Local Area Networks (LANs) is presented and its dynamic behaviour is described. The operation of the routing algorithm is completely distributed and automatically adapts to topology changes. Routing information is propagated in the form of Routing Vectors broadcast by gateways. Routes are chosen based on mimimum distance (in hops) to a destination subnet. The paper presents the results of simulation studies of the performance of the algorithm. Both simulation and analysis of the algorithm show that routing tables stabilise to give a minimum distance route to each destination subnet after a change in network topology. Formulae are derived for the upper bound of the number of routing vectors transmitted during initialisation or as a result of a topology change. This upper bound is shown to be independent of any network topology. The routes are loop free when the tables in all gateways have stabilised, but the tables may temporarily give looped routes for a period after a component failure. This can lead to a “bouncing” effect of routing vectors exchanged between gateways. Several modifications of the basic routing mechanism are given which minimise the number of routing vectors exchanged and hence the time to reach stability.

Efficient Algorithms for Routing Interchangeable Terminals

Abstract: This paper presents new algorithms for routing two rows of interchangeable terminals across a 2-layer channel The number of horizontal tracks required for routing is significantly reduced by simply interchanging terminals in each cell Savings up to one-third of horizontal tracks or more are achieved by interchanging terminals The Deutsch Difficult Example is used as a test routing problem The number of horizontal segments per net is limited to one, no "doglegs" The program is coded in Pascal and implemented on a VAX-11/780 computer

Bifurcated routing in computer networks

Abstract: This paper presents a characterization and a survey of multiple path routing in computer networks. It also develops a routing protocol that achieves load sharing and combines the strengths of both virtual circuit and datagram networks.

New Routing and Preemption Algorithms for Circuit-Switched Mixed-Media Networks

Abstract: New routing and preemption algorithms were developed for circuit-switched networks such as the Defense Switched Network that include both broadcast satellite and point-to-point transmission media. Three classes of routing procedures were evaluated: (1) mixed-media routing with fixed routing tables and call processing rules that included crankback and remote earth-station querying, (2) adaptive mixed-media routing which adapted routing tables after network damage, and (3) precedence flooding which routed high-precedence calls using flooding techniques. A new preemption technique called guided preemption was also evaluated. When guided preemption is used, lower precedence calls to preempt are selected after examining the paths of all calls previously routed through a switch. Call paths are added to the call-setup-success common-channel-signalling (CCS) packet at the call destination and then read in and stored within each switch in the call path as this message travels back to the call source. Tools developed to evaluate algorithms included a steady-state network analysis program, a call-by-call simulator, and the EISN testbed network described in a companion paper by H.M. Heggestad. Analytic results with the simulator and the steady-state analysis program indicated that the new routing algorithms provided reduced point-to-point blocking probabilities after damage without adding extra trunking. Best performance was obtained with adaptive mixed-media routing and precedence flooding techniques. Guided preemption preempted fewer low-precedence calls than blind preemption as used in AUTOVON to complete the same number of high-precedence calls.

Rectilinear area routing: a channel router approach

Abstract: A final router has been developed which operates upon the rectilinear channel routing areas created by rectilinear macrocells. The router supports input and output pins on all sides of the rectilinear area. After the channel density estimation for the entire assembly is provided by a global router, the rectilinear area is partitioned into smaller rectangular regions which can be routed by applying traditional channel router methods. The regions are ordered, and a global routing of the nets within the rectilinear area is performed. The regions are routed individually while providing a smooth area routing. Algorithms for each phase of the final routing are described. Special rectilinear topological considerations are presented. The algorithms are implemented in Pascal on a DEC-SYSTEM 20 as a part of SLS - Sandia layout system, a hierarchical layout system.

An Algorithm for One and Half Layer Channel Routing

Abstract: Channel routing is one of the key problems in the automatic layout design of LSI chips This paper presents an efficient routing algorithm for one-and-half layer channel model which is based on single layer metal mask and fixed polysilicon crossunders in CMOS gate array The algorithm makes parallel horizontal routing in each zone by means of ordering and prediction The nets contend for crossunders in a greedy approach This results in higher probability of routing success and less crossunders occupied (equally less via holes) Furthermore, by inserting interactive information at the same time of execution if necessary, the router provides more chances of 100% routing success

The EISN Testbed for Evaluation of Network Routing and Control Techniques

Abstract: The Experimental Integrated Switched Network (EISN) was set up to develop and experimentally evaluate new routing and control techniques potentially applicable in the Defense Switched Network, focusing on the new routing and preemption algorithms described in the companion paper [1]. Significant achievements in the EISN effort include establishment of a geographically distributed telecommunications testbed, featuring common channel signalling (CCS), multi-media trunking, and off-the-shelf digital switches with programmable out-board Routing/Control Processors (RCPs). Selected new algorithms have been evaluated in the form of actual implementations on the testbed. A preliminary description of the EISN testbed, its components, and its objectives was given at MILCOM '83 [2], along with earlier steady-state analysis results on the new adaptive routing algorithms. This paper focuses primarily on the EISN testbed as it is now implemented. The design philosophy and functional characteristics of the testbed are presented, and a series of routing and control experiments is described, as well as some additional experiments in voice/data integration using the Transmission Control Protocol (TCP) for the data transfers. The routing experiments are aimed at validating the logic and the CCS protocols developed for the new routing and preemption algorithms described in the companion paper.

A path-oriented routing strategy for packet switching networks with end-to-end protocols

Abstract: A path-oriented routing strategy is proposed for packet switching networks with end-to-end internal protocols. It allows switch pairs to communicate over multiple paths (for better network throughput), while maintaining knowledge of user connections at the network's endpoints only. The most significant aspect of this strategy lies in its flow assignment method. A distributed loop-free shortest path algorithm assigns a number to a path at the time it is created and this number remains valid through shortest path changes. Consequently, existing traffic can be maintained on existing paths, while new traffic is assigned to the current shortest paths. Stable multiple path routing is thus achieved without packet disordering. Abnormal conditions such as trunk failure and recovery and trunk congestion are dealt with by tagging routing updates with update causes. Simulation of this routing strategy shows that maximum network throughput (under a certain congestion constraint) can be increased substantially compared to a single path routing strategy.

A MIMD organization for the execution of interconnection routing algorithms

Abstract: It is demonstrated that the routing problem is partitionable into smaller subproblems which can be handled in parallel, and that a MIMD (multiple-instruction multiple data stream) processor array can perform interconnection routing in a cost-effective manner. One possible organization is presented as an example for further research. Using the suggested organization allows for partitioning a routing problem into smaller subproblems to be handled by the processor array elements in parallel.

Adaptive routing in radio communication networks

Abstract: After a brief review of the field of routing algorithms for communication networks this paper focuses on adaptive routing for radio networks of mobile nodes. Two algorithms are proposed and their performance is evaluated and compared to that of flooding.

Development of optimal routing policies in a queueing network

Abstract: An approach to the solution of the dynamic routing problem in a queueing network is presented in the paper, based on Lagrangian duality and decomposition techniques. A numerical solution can be obtained by a multilevel off-line computational procedure. The considered network has deterministic inputs and initial state, and the optimization problem is in discrete time. Link capacity and queue length constraints are taken into account.