Showing papers on "Lithography published in 1979"

A general simulator for VLSI lithography and etching processes: Part I—Application to projection lithography

Abstract: A simulator is described which produces line-edge profiles at various key stages in integrated circuit processing. Optical models are included for contact and projection lithography. The effects of multiple wavelengths, defocus, and partially coherent sources may be simulated in projection lithography. The positive resist model of Dill is used with the string development model of Jewett to obtain resist line-edge profiles. The string model is generalized to surface reaction rate limited etching of any layer. The application of the simulator to projection lithography is illustrated with a number of examples including monochromatic and multiwavelength exposure, the effect of a post-exposure anneal, plasma descum, and defocus.

High-resolution, ion-beam processes for microstructure fabrication

Abstract: Ion beams have increased usefulness for high‐resolution microstructure fabrication if they are patterned to small dimensions before they strike a target. First, results are presented of maskless micromachining, doping, and resist exposure with a scanning focused gallium ion beam of sub‐1000‐A diameter. Secondly, an ion‐beam‐transmission mask is described, and results are presented showing 1X replicated mask patterns with 0.6‐μm features that were exposed in PMMA resist by irradiating the mask with a conventional size 150‐kV proton beam. The potentials of ion‐beam lithography using masks and focused ion beams are discussed.

High resolution, steep profile resist patterns

Abstract: High resolution and steep profile patterns have been generated in a 2.6 μm thick organic layer which conforms to the steps on a wafer surface and is planar on its top. This thick organic layer (a photoresist in the present experiments) is covered with an intermediate layer of SiO2 and a top, thin layer of x‐ray or photoresist. After exposure and development of the top resist layer, the intermediate layer is etched by CHF3 reactive ion etching. The thick organic layer is then etched by O2 reactive ion etching. Submicron resolution with essentially vertical walls in the thick organic material was achieved. The technique is also applicable to photo and electron lithography. It reduces the need for thick resist patterns for the lithography step and, at the same time, ensures high resolution combined with good step coverage.

Energy deposition functions in electron resist films on substrates

Abstract: A Monte Carlo simulation of electron scattering in the resist and substrate of a target in electron lithography was used to obtain the spatial distribution of energy deposition in the resist. Analytical approximations were subsequently obtained by a least‐squares fit of Gaussian functions to the forward‐ and backward‐scattered components of these distributions. The parameters in the analytical functions were deduced and a compendium of values are tabulated for a variety of resist thicknesses, incident electron energies, and substrates. The parameters were found to agree with other parameters that can be physically correlated with electron‐scattering processes and with available experimental data. These approximations and parameters provide quantitative guidelines for understanding and compensating of electron‐scattering and proximity effects in electron‐beam lithography.

Recent advances in electron-beam lithography for the high-volume production of VLSI devices

Abstract: Recent advances in scanning-electron-beam lithography techniques have increased the efficiency of serial exposure by several orders of magnitude over the basic SEM approach. A spectrum of shaped-beam systems which combine projection and scanning techniques has been developed for various lithographic applications. The first generation of electron-beam production systems at IBM have demonstrated the feasibility of the shaped-beam technique under manufacturing conditions. More advanced shaping techniques such as VSS and Character Projection provide the means to make a high-resolution lithography for VLSI technically and economically feasible.

X-ray zone plates fabricated using electron-beam and x-ray lithography

Abstract: Fresnel zone plate patterns, free of spherical aberration, with diameters of up to 0.63 mm and linewidths as small as 1000 A were fabricated on polyimide membrane x‐ray masks using scanning electron beam lithography. Distortion of the electron beam scan raster was reduced to ?2500 A over a 2×2 mm field by applying deflection corrections, while viewing the distortion using a Moire method. CK x‐ray lithography was used to replicate the zone plate pattern in thick PMMA over a 100 A thick plating base on a glass substrate. Zones plates in 1.3 μm thick gold were fabricated by plating, and made free‐standing by removal of the plating base and the supporting glass substrate. Zone plates were tested as imaging elements with visible light and soft x‐rays.

Electron Beam Lithography

Abstract: Electron beam lithography is a rapidly maturing technology that has opened the realm of submicron design to the semiconductor device and circuit designer. This improved pattern resolution has already yielded devices and circuits exhibiting higher density, higher operating frequency, and lower operating power than has been possible with other lithography methods. This paper discusses electron beam lithography and the devices and circuits that have been fabricated with this technology.

High resolution, steep profile, resist patterns

Abstract: High resolution and steep profile patterns have been generated in a 2.6-μm thick organic layer which conforms to the steps on a wafer surface and is planar on its top. This thick organic layer (a photoresist in the present experiments) is covered with an intermediate layer of SiO 2 and a top, thin layer of X-ray or photoresist. After exposure and development of the top resist layer, the intermediate layer is etched by CHF 3 reactive ion etching. The thick organic layer is then etched by O 2 reactive ion etching. Submicron resolution with essentially vertical walls in the thick organic material was achieved. The technique is also applicable to photo- and electron lithography. It reduces the need for thick resist patterns for the lithography step and, at the same time, ensures high resolution combined with good step coverage.

A Multichannel Depth Probe Fabricated Using Electron-Beam Lithography

Abstract: A multielectrode probe structure is described in which several thin-film metal electrodes are defined on the outer surface of a glass micropipette using electron-beam lithography. Electrode geometries are controlled to within one micron, resulting in electrode recording characteristics which are extremely well matched. Recording sites are 5 , um wide rings spaced 100 , um apart in depth. Analysis and characterization show the structure to be capable of accurately recording tissue potentials with a minimum of tissue damage. Use of these probes in current source-density (CSD) analysis of extraceliular current flow is described.

Ion-beam lithography for IC fabrication with submicrometer features

Abstract: We report an entirely new pattern‐replication technique for IC fabrication. It has demonstrated submicrometer (<0.5 μm) resolution and it has the capability of large throughput (wafer‐levels/h). It utilizes high‐energy protons as the exposing radiation through a mask placed in proximity to a wafer covered with resist. We call this new technique ’’ion‐beam lithography’’ (IBL). System parameters and measurements relevant to the use of IBL as a production technology are discussed and SEM micrographs of submicrometer patterns in PMMA are presented. The technique is similar to x‐ray lithography, in that a pattern is produced in a thin resist film after exposing it to radiation through a mask. High‐energy protons have the same advantage as x rays in eliminating wavelength diffraction problems which limit the resolution of photolithography. Also, a gap (∠15–25 μm) is permitted between the mask and wafer. Ions have an advantage over x rays in that penumbral distortion is avoided by using highly collimated ion beams which are available with present state of the art; ions are collimated using conventional ion‐optical techniques, whereas use of a distant ’’point’’ source is the only feasible scheme for collimation of x rays.

1 &#181;m MOSFET VLSI technology: Part VIII&#8212;Radiation effects

Abstract: In this paper the effect of electron-beam radiation on polysilicon-gate MOSFET's is examined. The irradiations were performed at 25 kV in a vector scan electron-beam lithography system at dosages typical of those used to expose electron-beam resists. Two types of studies are reported. In the first type, devices fabricated with optical lithography were exposed to blanket electron-beam radiation after fabrication. In the second, discrete devices from a test chip, fabricated entirely with electron-beam lithography, were used. It is shown that in addition to the threshold voltage shift, caused by the accumulation of radiation-induced positive charge in the gate oxides, these charged centers and additional uncharged (neutral) electron traps lead to an increase in the electron trapping in irradiated oxides. Temperatures above 550°C are shown to be required to anneal both the positive and neutral traps completely from the oxide underlying polysilicon after exposure to radiation. Annealing of the radiation-induced positive charge from the oxide is shown to depend on the metallurgy overlying the gate insulator during heat treatment. Annealing treatments which remove the charged centers from aluminum-gated MOS structures are demonstrated to leave small (about 5 × 1010cm-2) but significant amounts of charge in certain polysilicon-gate structures. The dependence of positive and neutral trap densities on direct electron-beam exposure was studied in the range between 10 and 200 µC/cm2. Studies on the electron-beam fabricated devices indicate that indirect exposure of the gate oxide by electrons scattered from the primary beam during lithography in areas away from the gate oxide is sufficient to cause appreciable damage. After postmetal annealing at 400° C for 20 min, the minimum residual charge density found in the electron-beam fabricated devices is 4 × 1010cm-2.

Method of compensating for proximity effects in electron-beam lithography

Abstract: In the process of constructing microelectronic circuits on a semiconductor chip, electron-beam lithography is utilized to fabricate high resolution resist patterns. The resolution however, is limited by proximity effects which are due to scattering of the electron-beam as it passes through the resist. In the disclosed method, those proximity effects are compensated for by making the energy that is absorbed by the resist from the electrons, substantially greater at the perimeter of each shape in the pattern than at the interior of those shapes.

Optical alignment system for submicron x‐ray lithography

Abstract: The alignment system described in this paper is applicable to all proximity mode replication systems. The inherent high accuracy of the method makes it particularly attractive for submicron lithography applications requiring positioning accuracy of better than 0.1 μm. The basic alignment mark on the mask is a one dimensional Fresnel zone whose primary focal length is equal to the proximity gap spacing. Helium–Neon laser illumination is used. Elimination of unwanted diffraction orders is achieved by incorporating a transverse grating structure on the alignment mark on the wafer. The alignment signal sensitivity to gap variation is such that it allows very precise setting of the gap spacing in an unambiguous fashion. Three pairs of such alignment marks are necessary to provide x–y–ϑ registration as well as gap spacing and parallelism settings. A key feature of the alignment system is the time varying incidence angle of the laser beam upon each Fresnel zone mark, which results in a small amplitude scanning of the wafer surface and allows continuous registration throughout the entire exposure duration. A description of the alignment system designed for a submicron x‐ray lithography system is given, together with some preliminary results.

1 &#181;m MOSFET VLSI technology: Part VI&#8212;Electron-beam lithography

Abstract: This paper discusses the fabrication of 1 µm minimum linewidth FET polysilicon-gate devices and circuits. These were designed for the tight dimensional ground rules (resolution, linewidth control, and overlay) achievable using direct wafer write scanning electron-beam lithography with individual chip registration. The present work focuses on vector-scan electron-beam technology and processing, while other papers in this series discuss other aspects of the work. Different types of 1 µm MOSFET chips were written on 57 mm Si wafers using a totally automated electron-beam system which performs table stepping, registration to fiducial marks, and pattern writing in a vector scan mode (on an individual shape basis) with control of exposure dose for individual shapes. The pattern data were prepared by batch processing which includes proximity correction as well as sorting of shapes to achieve data compaction and minimal distance between shapes. A novel two-layer positive resist system has been developed to achieve reproducible liftoff profiles over topography and better linewidth control. The final results presented here demonstrate that there are no fundamental barriers to the extension of this work to small dimensions.

Boron nitride mask structure for x‐ray lithography

Abstract: Properties of a new boron nitride mask structure for x‐ray lithography are described. Of particular importance is that this structure does not suffer from excessive mask distortion as did the Kapton x‐ray mask. Average pattern distortions less than 0.2 μm are achieved routinely.

X‐ray lithography source using a stationary solid Pd target

Abstract: This paper describes a relatively high power density (10–15 kW/cm2) x‐ray source for x‐ray lithography applications. The source utilizes a stationary solid Pd target cooled by a high velocity water flow. This source has been operated for several months in a shop environment. No degradation in performance has been observed.

Voltage dependence of proximity effects in electron beam lithography

Abstract: Intra line and inter line proximity effects and their dependence on beam voltage are explored via computer simulation of electron scattering, energy deposition, and subsequent development in electron‐beam lithography processes. For thin resist films (?1 μm) on silicon substrates,the simulation predicts that smaller linewidths and gaps can be achieved without proximity correction at 10 kV, compared to 20 kV. Experimental confirmation of the predictions is presented.

Impact of electron scattering on linewidth control in electron‐beam lithography

Abstract: The importance of electron‐scattering on pattern fidelity in electron‐beam lithography is examined using computer simulation of the exposure and development of resist images. It is found that electron scattering can be treated in terms of an effective Gaussian half‐width which is the quadrature sum of the incident Gaussian half‐width and the characteristic width for forward‐scattered electrons. Linewidth control is improved by reducing the effective half‐width; this is accomplished by using higher beam energies, thinner resists and smaller spot sizes. Developer simulation shows that using 2 pixels per minimum linewidth with a spot size equal to half the pixel size gives better developed images than the more conventional writing strategy which uses four pixels per minimum linewidth and a spot size equal to the pixel size.

Corrections to proximity effects in electron beam lithography. II. Implementation

Abstract: Mathematical formulations for the correction of proximity effects in electron beam lithography have been developed in the preceding paper. The implementation of these techniques to practical electron lithographic patterns involves (1) an efficient evaluation of the proximity interaction between every pair of shapes in the pattern. This interaction can be computed explicitly in limited cases; an algorithm for general cases is described. (2) The solution of the linear equations that yield the corrections to proximity effect. This is accomplished via a series of algorithms that involve dissecting the data into overlapping zones of different types. Pattern data manipulation is reduced by an algorithm involving generation of additional data, tagging, and sorting.

High resolution electron‐beam lithography on thin films

Abstract: The influence of electron scattering on the resolution of electron‐beam lithography has been studied. Theoretically, we have used two different Monte‐Carlo approaches to study the spatial extent of energy dissipation in a thin film of electron sensitive polymer film coated on various thicknesses of silicon substrates. The two Monte‐Carlo approaches are the conventional continuous‐slowing‐down approximation approach and the direct simulation approach in which individual inelastic scattering is taken into account. Experimentally, we have exposed lithographic patterns on the structures mentioned above. Agreement between both Monte‐Carlo approaches and experiment is satisfactory. Results show that higher resolution in electron beam lithography can be achieved by using thin electron sensitive resist layers and thin substrates. Improvement in proximity effect is also obtained for thin structures.

Corrections to proximity effects in electron beam lithograhy. III. Experiments

Abstract: Satisfactory corrections to intershape and intrashape proximity effects in electron lithography have been experimentally obtained for a variety of patterns and geometries. The self‐consistent formulation and the algorithms for computation described in the two preceeding papers have been used. The computer program used for the automatic computation of corrections to the incident electron exposure for an arbitrary pattern is described. Pattern delineation depends on the proximity function and its parameters. They are found to be not critical in practical lithography until submicron dimensions are reached.

1 &#181;m MOSFET VLSI technology: Part V&#8212;A single-level polysilicon technology using electron-beam lithography

Abstract: An n-channel single-level polysilicon, 25 nm gate-oxide technology, using electron-beam lithography with a minimum feature size of 1 µm, has been implemented for MOSFET logic applications. The six-mask process employs semirecessed oxide isolation and makes extensive use of ion implantation, resist liftoff techniques, and reactive ion etching. A description of the process is given, with particular emphasis on topographical considerations. Implementation of a field etchback after source/drain implant to eliminate a low thick-oxide parasitic-device threshold is also discussed.

High-resolution lithography with projection printing

Abstract: Very large-scale integration (VLSI) will want to increase circuit density and to reduce power dissipation at no sacrifice in speed. It will, therefore, ask for ever smaller circuit geometries, which, because of the increased sensitivity to defects, can economically be only projection printed. Projection optics are diffraction limited. Only blurred images of the mask expose the photoresist on the silicon wafer: the whole photoprocess becomes increasingly sensitive to variations of its many parameters. The parameters' interdependencies have been modeled identifying four distinct process steps. Measurement techniques are described, which allow to quantize each step independently. With standard IC technology one may measure the illumination profiles of the mask image directly in the projection printer. Characteristic curves describe the photoresist response to exposure. A simple time measurement allows to real-time control the photoresist development. Finally, the concept of an operating point on a characteristic is introduced. It helps to define an optimized set of process parameters.

Method for making a mask useful in X-ray lithography

Abstract: In order to make a mask for use in lithography a layer of reflective material is first deposited on a substrate which is transparent to the radiation with which the mask is to be used; a layer of photoresist then deposited; the photoresist exposed with the desired pattern by UV radiation; the photoresist developed to expose the reflective material in the areas where it is desired to deposit an absorber material; the reflective material etched away from these areas undercutting the resist; the absorber deposited through the openings in the resist and reflective layer and the resist then lifted off.

Light-sensitive lithographic printing plate and compositions therefore with multiple resins

Abstract: A light-sensitive lithographic printing plate comprising a support having on at least one surface thereof a light-sensitive layer, said light-sensitive layer exhibiting a higher oleophilicity (high affinity to grease) at the outermost surface thereof than in the balance of the light-sensitive layer. This light-sensitive lithographic printing plate is capable of beginning the printing operation with a relatively small number of spoilages and exhibits not only excellent press life but also high developability and excellent storage stability.

1 /spl mu/m MOSFET VLSI technology. VIII. Radiation effects

Abstract: For pt.VII see ibid., vol.SC14, no.2, p.291 (1979). The effect of electron-beam radiation on polysilicon-gate MOSFETs is examined. The irradiations were performed at 25 kV in a vector scan electron-beam lithography system at dosages typical of those used to expose electron-beam resists. Two types of studies are reported. In the first type, devices fabricated with optical lithography were exposed to blanket electron-beam radiation after fabrication. In the second, discrete devices from a test chip, fabricated entirely with electron-beam lithography, were used.

Radiation mask structure

Abstract: The discovery that boron nitride and boron carbide films can be made in tension allows nondistorting radiation windows or masks to be realized. Both low and high pressure techniques for making the tensile films lead to related mask structures utilizing such films. The resulting structures are sufficiently distortion free to be useful for x-ray lithography.

X-ray lithography apparatus and method of use

Abstract: In order to obtain shorter exposure time and to obtain a longer life in x-ray lithography apparatus, an x-ray target made of tungsten is utilized and the apparatus operated to generate the tungsten M-line, this line being at a wavelength which will be absorbed by the resist normally used in lithography. To develop the resist, which was initially designed for use in an electron beam lithography, a developing method is used in which a initial short development with a high concentration is first carried out followed by a longer, full development with a concentration which is approximately the lowest at which complete development will take place.