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Lithography

About: Lithography is a research topic. Over the lifetime, 23507 publications have been published within this topic receiving 348321 citations.


Papers
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Proceedings ArticleDOI
17 Oct 2008
TL;DR: In this article, a 1-D regular pitch SRAM bitcell design for interference-assisted lithography (IAL) was proposed. But the layout design for IAL is not addressed.
Abstract: As optical lithography advances into the 45nm technology node and beyond, new manufacturing-aware design requirements have emerged. We address layout design for interference-assisted lithography (IAL), a double exposure method that combines maskless interference lithography (IL) and projection lithography (PL); cf. hybrid optical maskless lithography (HOMA) in [2] and [3]. Since IL can generate dense but regular pitch patterns, a key challenge to deployment of IAL is the conversion of existing designs to regular-linewidth, regular-pitch layouts. In this paper, we propose new 1-D regular pitch SRAM bitcell layouts which are amenable to IAL. We evaluate the feasibility of our bitcell designs via lithography simulations and circuit simulations, and confirm that the proposed bitcells can be successfully printed by IAL and that their electrical characteristics are comparable to those of existing bitcells.

80 citations

Journal ArticleDOI
TL;DR: In this paper, a simple process for the fabrication of large-area well-ordered periodic nanopillar arrays has been developed based on a combination of colloidal lithography and etching techniques.
Abstract: A simple process for the fabrication of large-area well-ordered periodic nanopillar arrays have been developed based on a combination of colloidal lithography and etching techniques. Large-area nanopillar arrays have been successfully fabricated by this approach. The lateral dimensions of nanopillars as small as 40 nm and the aspect ratio as high as 7:1 have been achieved. Our results indicate that it is possible to control the size, shape, and height of nanopillar arrays by fine-tuning the etching recipes. These periodic nanopillar arrays can be used as stamps for nanoimprinting lithography and contact printing lithography to produce more complex periodic nanostructures.

80 citations

Journal ArticleDOI
TL;DR: In this article, the mask of a current EUV system is replaced by an array of micron-sized mirrors and patterns are achieved by modulating individual mirrors to create selected bright and dark spots.
Abstract: Masks have been identified as the high risk, high cost issue for extreme ultraviolet (EUV) lithography. Challenges in EUV mask technology such as providing a pellicle and correcting defects have prompted the search for a maskless technique. Here we describe two approaches in which the mask of a current EUV system is replaced by an array of micron-sized mirrors. Patterns are achieved by modulating individual mirrors to create selected bright and dark spots. In one approach, individual mirrors can be lowered by λ/4 to yield locally dark regions because of destructive interference. In another approach, each mirror is mounted on a cantilever. Selected cantilevers can be tilted such that incident light from those mirrors is out of the pupil of the imaging objective. The wafer is mechanically scanned and the object is electronically scrolled across the array of mirrors in order to build up the required pattern. We have simulated the mechanical properties of the micron-sized mirrors and some aerial images showin...

80 citations

Patent
16 Dec 2003
TL;DR: In this paper, a method for forming a hybrid active electronic and optical circuit using a lithography mask is proposed, which consists of projecting the mask onto the SOI waver in order to simultaneously pattern the component of the active electronic device and optical device on the SoI wafer.
Abstract: A method for forming a hybrid active electronic and optical circuit using a lithography mask. The hybrid active electronic and optical circuit comprising an active electronic device and at least one optical device on a Silicon-On-Insulator (SOI) wafer. The SOI wafer including an insulator layer and an upper silicon layer. The upper silicon layer including at least one component of the active electronic device and at least one component of the optical device. The method comprising projecting the lithography mask onto the SOI waver in order to simultaneously pattern the component of the active electronic device and the component of the optical device on the SOI wafer.

80 citations

Patent
Jack R. Caddell1, Harvey H. Hoehn1
19 Dec 1973
TL;DR: The use of a laser beam to etch the surface of a printing plate made from a polymer composition on a metal or plastic base and a thin top coating of a hard hydrophilic material produces a lithographic printing plate capable of accepting ink in the etched region and accepting water in the unetched regions.
Abstract: The use of a laser beam to etch the surface of a printing plate made from a polymer composition on a metal or plastic base and a thin top coating of a hard hydrophilic material produces a lithographic printing plate capable of accepting ink in the etched region and accepting water in the unetched regions.

79 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
2023546
20221,116
2021336
2020502
2019612
2018608