Showing papers on "Mask inspection published in 2006"

System and method for mask verification using an individual mask error model

Abstract: Methods and systems are disclosed to inspect a manufactured lithographic mask, to extract physical mask data from mask inspection data, to determine systematic mask error data based on differences between the physical mask data and mask layout data, to generate systematic mask error parameters based on the systematic mask error data, to create an individual mask error model with systematic mask error parameters, to predict patterning performance of the lithographic process using a particular mask and/or a particular projection system, and to predict process corrections that optimize patterning performance and thus the final device yield.

Inverse lithography technology (ILT): What is the impact to the photomask industry?

Abstract: Inverse Lithography Technology (ILT) is a rigorous approach to determine the mask shapes that produce the desired on-wafer results. In this paper, we briefly describe an image (or pixel))-based implementation of ILT in comparison to OPC technologies, which are usually edge-based. Such implementation is more computationally scalable and avoids laborious segmentation script-writing, which becomes more complex for newer generations because of complicated proximity effects. In this paper, we will give an overview of ILT, present some simulation and wafer examples to demonstrate the benefit of ILT, clarify common myths about ILT, discuss and show examples to illustrate the impact in every step of the mask making process. Specifically, studies done with several leading mask shops around the world on mask manufacturability (including data fracturing, writing strategy and writing time, mask inspection), will be shown.

Actinic inspection of extreme ultraviolet programed multilayer defects and cross-comparison measurements

Abstract: The production of defect-free mask blanks remains a key challenge for extreme ultraviolet (EUV) lithography. Integral to this effort is the development and characterization of mask inspection tools that are sensitive enough to detect critical defects with high confidence. Using a single programed-defect mask with a range of buried bump-type defects, the authors report a comparison of measurements made in four different mask inspection tools: one commercial tool using 488nm wavelength illumination, one prototype tool that uses 266nm illumination, and two noncommercial EUV “actinic” inspection tools. The EUV tools include a dark field imaging microscope and a scanning microscope. Their measurements show improving sensitivity with the shorter wavelength non-EUV tool, down to 33nm spherical-equivalent-volume diameter, for defects of this type. Measurements conditions were unique to each tool, with the EUV tools operating at a much slower inspection rate. Several defects observed with EUV inspection were below...

Mask Cost and Profitability in Photomask Manufacturing: An Empirical Analysis

Abstract: An empirical study of the economics of manufacturing photomasks concludes that the uncontrolled growth of optical proximity effect correction and resolution enhancement techniques is driving up the cost of pattern generation and mask inspection to levels that threaten the profitability of photomask manufacturing. The intrinsic cost of some leading edge photomasks has already exceeded the price that customers are willing to pay for them. A model of the lifecycle of photomask manufacturing, developed from interviews involving the 1990-to-2005 operations of six mask shops and a survey of seven photomask manufacturers, shows that design for manufacturability (DFM) constitutes the most promising approach for alleviating this market impasse. Unilateral action by mask shops to increase their capital productivity is necessary but insufficient and perhaps unaffordable. DFM solutions will require the majority of participants in the lithography value chain to collaborate according to a volatile demand schedule that is driven by semiconductor manufacturers

EUV mask pattern defect printability

Abstract: Mask defect specifications not only are needed to ensure quality masks for acceptable resist patterning on wafers, but also are utilized as a common goal for tool development, noticeably for mask inspection and repair. Defect specifications are generally determined by the allowable critical dimension (CD) changes from 'defect printability' experiments where a programmed defect mask (PDM) with intentionally placed defects is exposed in a stepper and the changes in resist CDs are measured. With the recent availability of extreme ultra-violet micro-exposure tools (EUV MET), a small field stepper with a numerical aperture (NA) of 0.3, 5X reduction and adjustable degrees of coherence, we are able for the first time to perform extensive studies of pattern defect printability for EUV masks with a high NA exposure tool. Such studies have investigated the defect impact to feature CDs for three different types of patterns: poly gate layer, contacts, and dense lines and spaces. This paper presents the experimental results and analysis of printability data collected under two illumination conditions, annular and dipole, on the MET with full focus and dose matrix (FEM). We have investigated as many as 10 types of defects designed on the PDM for each pattern layer. For each type of defect, a total of 15 sizes are coded on the PDM. With the consideration of limited resolution and line edge roughness of current EUV resists commonly used for EUV lithography development, the CDs under study were chosen in the range of about 40nm to 70nm. Extrapolations from these data are made to predict pattern defect specifications for smaller resist line features. Resist resolution is the main reason for the discrepancies between aerial image simulations and data presented in this paper.

Method for mask inspection for mask design and mask production

Abstract: The invention relates to a mask inspection method that can be used for the design and production of masks, in order to detect relevant weak points early on and to correct the same. According to said method for mask inspection, an aerial image simulation, preferably an all-over aerial image simulation, is carried out on the basis of the mask design converted into a mask layout, in order to determine a list of hot spots. The mask/test mask is analysed by means of an AIMS tool, whereby real aerial images are produced and compared with the simulated aerial images. The determined differences between the aerial images are used to improve the mask design. The inventive arrangement enables a method to be carried out for mask inspection for mask design and mask production. The use of the AIMS tool directly in the mask production process essentially accelerates the mask production, while reducing the error rate and cost.

Deep ultraviolet light source, mask inspection device using same, and exposure device

Abstract: PROBLEM TO BE SOLVED: To provide a laser light source which can be operated at room temperature and is capable of efficiently generate deep ultraviolet rays and to provide a mask inspection device and an exposure device which have a high defect detection sensitivity due to this deep ultraviolet laser light source and are small-sized and stable SOLUTION: The deep ultraviolet light source includes; a solid laser which emits laser light having a wavelength of 090 to 092μm; a fourth higher harmonic generation part which generates the fourth higher harmonic of the laser light having the wavelength of 090 to 092μm, which is taken out from the solid laser; and a sum frequency generation part which generates light having a sum frequency of the fourth higher harmonic generated by the fourth higher harmonic generation part and laser light having a wavelength of 13μm COPYRIGHT: (C)2007,JPO&INPIT

Development of advanced reticle inspection apparatus for hp 65 nm node device and beyond

Abstract: The usage of ArF immersion lithography for hp 65nm node and beyond leads to the increase of mask error enhancement factor in the exposure process. Wavelength of inspection tool is required to consistent with wavelength of lithography tool. Wavelength consistency becomes more important by the introduction of phase shift mask such as Tri-tone mask and alternating phase shift mask. Therefore, mask inspection system, whose inspection light wavelength is 199nm, has been developed. This system has transmission and reflection inspection mode, and throughput, using 70 nm pixel size, were designed within 2hours per mask. The experimental results show expected advantages for Die-to-Die and Die-to-Database inspection compared with the system using 257nm inspection optics. Shorter wavelength effect makes transmission inspection sensitivity increase, and realizes 40nm size particle inspection. As for the phase shift mask, the difference of gray value between the area with phase defect and without phase defect was clear relatively. In this paper, specifications and design, experimental results are described.

Phase defect observation using an EUV microscope

Abstract: We constructed the EUV microscope (EUVM) for actinic mask inspection which consists of Schwarzschild optics (NA0.3, 30X) and X-ray zooming tube. Using this system, EUVL finished mask and Mo/Si glass substrates are inspected. EUVM image of 250 nm width pattern on 6025 Grass mask was clealy observed. Resolution can be estimated to be 50 nm or less from this pattern. The programmed phase defect on the glass substrate is also used for inspection. By using EUV microscope, programmed phase defect with a width of 90 nm, 100 nm, 110 nm, a bump of 5 nm and a length of 400 μm can be observed finely. And the programmed phase defect of 100 nm-wide and 2 nm pit was also observed. Moreover, a programmed defect with a width of 500 nm is observed as two lines. This is because phase change produced with the edge of both sides of a programmed defect. Thus, in this research, observation of a program phase defect was advanced using the EUV microscope, and it succeeded in observation of the topological defect image inside a multilayer film. These results show that it is possible to catch internal reflectance distribution of multilayer under the EUV microscope, without being dependent on surface figure.

EUV mask process development and integration

Abstract: It becomes increasingly important to have an integrated process for Extreme UltraViolet (EUV) mask fabrication in order to meet all the requirements for the 32 nm technology node and beyond. Intel Corporation established the EUV mask pilot line by introducing EUV-specific tool sets while capitalizing on the existing photomask technology and utilizing the standard photomask equipment and processes in 2004. Since then, significant progress has been made in many areas including absorber film deposition, mask patterning optimization, mask blank and patterned mask defect inspection, pattern defect repair, and EUV mask reflectivity metrology. In this paper we will present the EUV mask process with the integrated solution and the results of the mask patterning process, Ta-based in-house absorber film deposition, absorber dry etch optimization, EUV mask pattern defect inspection, absorber defect repair, and mask reflectivity performance. The EUV resist wafer print using the test masks that are fabricated in the EUV mask pilot line will be discussed as well.

Development of next-generation mask inspection method by using the feature of mask image captured with 199-nm inspection optics

Abstract: We have developed a mask inspection system using 199nm inspection light wavelength. This system performs transmission and reflection inspection processes concurrently within two hours per plate. By the evaluation result of mask images and inspection sensitivity, it is confirmed that the 199nm inspection system has the advantage over the system using 257nm and has the possibility corresponding to next generation mask inspection. Furthermore, advanced die-to-database (D-DB) inspection, which can generate high-fidelity of a reference image based on the CAD data for alternating phase shift mask (PSM) or tri-tone, is required for next generation inspection system, too. Therefore, a reference image generation method using two-layer CAD data has been developed. In this paper, the effectiveness of this method is described.

Advanced non-disruptive manufacturing rule checks (MRC)

Abstract: New advanced mask rule checking (MRC) solutions are required to ensure cost effective, high yield photomask manufacturing processes at 65nm and below and are needed to provide new verification capabilities for mask makers and data prep engineers alike. Traditional MRC, which implements fundamental geometric data checks on limited data formats, is not sufficient for advanced photomask manufacturing. Like recent advances in design rule checking (DRC) software, which includes extensive "manufacturing-aware" rules (or DFM rules), MRC solutions must evolve to include a more comprehensive and intelligent rule checks for the mask manufacturing process. This paper describes the development and testing of an advanced MRC software solution developed within the CATS TM mask data preparation (MDP) solution from Synopsys Inc. The new MRC solution enables the inspection and analysis of mask layout patterns for simple and advanced data verification checks. Proposed applications for mask data prep applications are discussed and include incoming design verification, fracture data correction, inspection tool data tags, mask manufacturing tool or inspection tool selection, and job deck verification.

Defect printability study using EUV lithography

Abstract: Defect-free masks are one of the top issues for enabling EUV lithography at the 32-nm node. Since a defect-free process cannot be expected, an understanding of the defect printability is required in order to derive critical defect sizes for the mask inspection and repair. Simulations of the aerial image are compared to the experimental printing in resist on the wafer. Strong differences between the simulations and the actual printing are observed. In particular the minimum printable defect size is much larger than expected which is explained in terms of resist resolution. The defect printability in the current configuration is limited by the resist process rather than the projection optics.

Multilayer defects nucleated by substrate pits: a comparison of actinic inspection and non-actinic inspection techniques

Abstract: The production of defect-free mask blanks remains a key challenge for EUV lithography. Mask-blank inspection tools must be able to accurately detect all critical defects while simultaneously having the minimum possible false-positive detection rate. We have recently observed and here report the identification of bump-type buried substrate defects, that were below the detection limit of a non-actinic (i.e. non-EUV) in inspection tool. Presently, the occurrence inspection of pit-type defects, their printability, and their detectability with actinic techniques and non-actinic commercial tools, has become a significant concern. We believe that the most successful strategy for the development of effective non-actinic mask inspection tools will involve the careful cross-correlation with actinic inspection and lithographic printing. In this way, the true efficacy of prototype inspection tools now under development can be studied quantitatively against relevant benchmarks. To this end we have developed a dual-mode actinic mask inspection system capable of scanning mask blanks for defects (with simultaneous EUV bright-field and dark-field detection) and imaging those same defects with a zoneplate microscope that matches or exceeds the resolution of EUV steppers.

Novel algorithms for placement of rectangular covers for mask inspection in advanced lithography and other VLSI design applications

Abstract: The continuous drive of very large scale integrated (VLSI) chip manufacturers to meet Moore's law has spurred the development of novel resolution enhancement techniques (RETs) and optical proximity correction (OPC) methodologies in optical microlithography. These RET and OPC methods have increased the complexity of mask-manufacturing manifold and have, at the same time, put added emphasis on the mask inspection procedure. A technique to simplify mask inspection is to identify rectangular regions on the mask that do not require inspection. Such a region is referred to as a do not inspect region (DNIR). A novel and practical algorithm to place DNIR rectangles on the mask is presented. It is shown that the most general DNIR placement problem is at least NP-Hard (Garey and Johnson, 1979). However, under certain relaxed criteria, there exists a polynomial-time algorithm for DNIR placement using dynamic programming. However, the optimal algorithm has very-high-degree polynomial bounds on its runtime and space complexities. On the other hand, a very simple greedy algorithm extended by lookahead and randomization, or by simulated annealing, can greatly improve the performance of the DNIR placement and produce near-optimal results. Although the algorithm developed in this work is targeted primarily toward DNIR placement, it has many other VLSI design applications.

Actinic Inspection of EUV Programmed Multilayer Defects and Cross-Comparison Measurements

Abstract: The production of defect-free mask blanks remains a key challenge for extreme ultraviolet (EUV) lithography. Integral to this effort is the development and characterization of mask inspection tools that are sensitive enough to detect critical defects with high confidence. Using a single programmed-defect mask with a range of buried bump-type defects, we report a comparison of measurements made in four different mask-inspection tools: one commercial tool using 488-nm wavelength illumination, one prototype tool that uses 266-nm illumination, and two non-commercial EUV ''actinic'' inspection tools. The EUV tools include a darkfield imaging microscope and a scanning microscope. Our measurements show improving sensitivity with the shorter wavelength non-EUV tool, down to 33-nm spherical-equivalent-volume diameter, for defects of this type. Measurements conditions were unique to each tool, with the EUV tools operating at a much slower inspection rate. Several defects observed with EUV inspection were below the detection threshold of the non-EUV tools.

Wafer fab mask qualification techniques and limitations

Abstract: Mask inspection and qualification is a must for wafer fabs to ensure and guarantee high and stable yields. Single defect events can easily cause a million dollar loss through a defect duplicating onto the wafer. Several techniques and methods for mask qualification within a wafer fab are known but not all of them are neither used nor understood regarding their limitations. Increasing effort on existing tool platforms is necessary to detect the defects of interest which are at the limit of the tools specification - On the other hand next generation tools are very sensitive and therefore consume only a negligible amount of time for recipe optimization. Knowing the limits of each inspection tool helps to balance between effort and benefit. Masks with programmed defects of 90nm and 65nm design rule were used in order to compare the different available inspection techniques. During the course of this technical work, the authors concentrate mainly on two inspection techniques. The first one inspects the reticle itself using KLA-Tencor's SLF27 (TeraStar) and SL536 (TeraScan) tools. As the reticle gets inspected itself this is the so called "direct" mask defect inspection. The second inspection technique discussed is the "indirect" mask defect inspection which consists of printing the pattern on a blank wafer and use KLA-Tencor's bright-field wafer inspection tool (2xxx series) to inspect the wafer. Data of this work will include description of the techniques, inspection results, defect maps, sensitivity analysis, effort estimation as well as limitations for both techniques for the used design rule.

Mask inspection apparatus and mask inspection method

Abstract: PROBLEM TO BE SOLVED: To perform mask defect inspection with high accuracy by quantitatively judging a stripe defect caused in a mask. SOLUTION: A mask inspection apparatus 1 inspects a defect in a mask M by acquiring the light transmitted or reflected by a mask M having a predetermined pattern formed thereon, wherein the apparatus is equipped with: a light source 11 which irradiates the mask M with light at a wavelength longer than the minimum line width of the pattern in the mask M; a line sensor 12 which acquire transmitted light or reflected light by the mask M of the light emitting from the light source 11; and an operating unit 13 which obtains the intensity of the transmitted light or reflected light acquired by the line sensor 12 for each cell prepared by dividing the inspection region of the mask M into a matrix state, and performs calculation using the intensity of each cell. COPYRIGHT: (C)2006,JPO&NCIPI

Method of producing mask inspection data, method of manufacturing a photo mask and method of manufacturing a semiconductor device

Abstract: There is disclosed a method of producing mask inspection data, including preparing design data of a semiconductor device preparing a lithography condition relevant to a lithography process for transferring a mask pattern formed on a photo mask onto a wafer, preparing a wafer processing condition relevant to wafer processing using a pattern transferred onto the wafer, preparing a first proximity correction model for correcting proximity effect relevant to the lithography condition and the wafer processing condition, generating mask pattern data based on the design data and the first proximity correction model, and generating mask inspection data corresponding to the mask pattern data.

Photomask forming device and photomask inspection device

Abstract: PROBLEM TO BE SOLVED: To provide a photomask forming device in which a pattern indicating the applicable region and the non-applicable region of a redundant circuit is formed on a photomask and whether the redundant circuit is applicable or not to a defect position caused on the photomask can be decided during photomask inspection, and a photomask inspection device. SOLUTION: A photomask is formed by combining a mask pattern and a SRAF (sub-resolution assist feature) pattern indicating the applicable region/non-applicable region of a redundant circuit in the mask forming device 100, which enables a mask inspection process to decide whether the redundant circuit is applicable or not, the decision conventionally carried out by a person. Therefore, a human error on the decision can be eliminated and productivity of a photomask process can be improved. COPYRIGHT: (C)2008,JPO&INPIT

Mask inspection method using the electron-beam inspection system based on projection electron microscopy

Abstract: We developed the electron beam inspection system based on projection electron microscopy (EBI-PEM), and then applied this system to inspection of mask defects. Usually, inspection of mask defects (such as monitoring of growing defects) is carried out with resist pattern on Si wafer by using an optical inspection tool. In recent years, the shrinking of the design rule for LSI devices has fueled demand for mask inspection for small defects, which are hard to detect with the resolution of an optical inspection tool. Therefore, a high-resolution electron beam inspection tool is desired. However, conventional electron beam inspection systems based on scanning electron microscopy (EBI-SEM) require very long inspection time (10-100 times longer than in the case of optical inspection tool) and inspection costs are very high. In addition, it is difficult to inspect resist pattern by using an electron beam inspection tool, because of the charge- up problem. In order to solve the problem, we examined a new mask inspection method using an electron beam inspection system based on EBI-PEM. Although, EBI-PEM have an advantage in terms of inspection speed, it is more difficult to inspect resist pattern by EBI-PEM than by EBI-SEM, because EBI-PEM is very sensitive to charge-up of a sample surface. Therefore, we tried a method in which inspection is performed after transferring a pattern to SiO2 thin film formed on Si wafer. By optimizing the thickness of SiO2 thin film and the electron beam condition of EBI-PEM, we were able to minimize the influence of charge-up and obtained a higher contrast image. Using this method, EBI-PEM achieved inspection sensitivity of 35nm in the case of programmed defect wafer. We confirmed the probability of realizing high-speed and high-resolution mask inspection by using EBI-PEM.

Semiconductor wafer and calibration method of semiconductor inspection device using the same

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor wafer comprising a calibration element and a semiconductor device capable of calibrating, with accurate reproducibility, at the same measurement point as an actual semiconductor device, with no requirement for exchanging a board of the semiconductor inspection device. SOLUTION: A semiconductor inspection device can be calibrated under the same condition with measurement of the semiconductor device itself by integrating a reference resistor as a calibration element on the same semiconductor wafer as that, in which a semiconductor device measured using a semiconductor inspection device is formed. Since the calibration element is inside the semiconductor wafer, the board of the semiconductor inspection device is not required to be exchanged, and operation hours can be made efficient in the inspection device. COPYRIGHT: (C)2007,JPO&INPIT

Novel mask inspection flow for better defect review and analysis

Abstract: Mask inspection plays a pivotal role in current high grade mask making processes and further its importance is getting bigger. The purpose of inspection process is as follows. One is simple sorting of NG masks that have fatal defects with high sensitivity. The other is improvement of total mask manufacturing process and mask quality using defect source analysis. As semiconductor device is getting shrunk down, the influence of mask defect is increasing. Therefore, there are special needs for the efficient use of such expensive inspection machines and the systematic approach of defect analysis. In this paper, we propose novel mask inspection flow to improve mask inspection capacity and systematic defect management. In general, Inspection process is divided by two steps. One is detection of defects and the other is review for defect analysis. Our concept of new inspection flow is adoption of individual defect review system after defect detection in inspection machine. With this new inspection flow using defect review system, we could increase inspection capacity by 30% and set up unified defect analysis hub.

Method of fabrication of semiconductor integrated circuit device and mask fabrication method

Abstract: An area for fabricating a photomask having light-shielding patterns each formed of an organic film, and areas for fabricating a semiconductor integrated circuit device are provided within the same clean room. A manufacturing device and an inspecting device are commonly used during the fabrication of the photomask and the fabrication of the semiconductor integrated circuit device.

Real-time aerial images based mask inspection, Die-to-Wafer Image inspection

Abstract: The concept of defect printability, i.e., mask error enhancement factor (MEEF), should be integrated into mask defect inspection procedures, and thus avoid the huge burden of defect detection algorithm development. It is necessary to simplify the difficult task of defining defect size which is caused by nonlinear transfer of killer defects, and which is strongly dependent on defect types. One solution to the problem is to incorporate defect printability study using aerial image based inspection into the existing mask inspection system. This paper shows how the measured mask pattern images obtained from mask inspection system are transformed into wafer-like images by simulation-based software. It is important that wafer-like images (WI) from measured mask images are created within a reasonable calculation time and the result has sufficient accuracy. The paper also introduces calculation of aerial images using perturbation approach and demonstrates the possibility of D-to-WI inspection. The paper points out that the technique of generating wafer-like image from measured mask pattern is well established for attenuated PSMs and Cr binary masks.

Mask for charged particle beam exposure and mask inspection method

Abstract: PROBLEM TO BE SOLVED: To provide a mask for charged particle beam exposure capable of performing automatic focus even in a mask of a multilayer film structure and highly accurately measuring mask distortion, and an inspection method thereof. SOLUTION: The mask for charged particle beam exposure is provided with a strut section having a beam structure, a membrane section provided on the main surface of the strut section and consisting of a first thin film formed in such a way that a pattern to be transferred onto a substrate is divided into a plurality of collective exposure small regions, an intermediate layer made of a second thin film provided between the membrane section and the strut section, and a position mark provided on the main surface of the strut section. In the mask, the position mark has an eliminating section in which the first and second thin films are eliminated, and a projecting section having a laminate structure consisting of the first and second thin films, and the center point of the position mark is positioned at the eliminating section. COPYRIGHT: (C)2006,JPO&NCIPI

An automated mask defect analysis system for increasing mask shop productivity

Abstract: The detection, classification and disposition of defects is an important function that commands significant resources in mask making. Current processes use manual evaluation of defects, which is slow, subject to errors, and provides sparse data for process improvement. The automated defect analysis software described here reads inspection reports from mask inspection tools, classifies each defect, and measures both its size and printability. It combines and compares data from multiple inspections to provide critical process development data. Data from 144 masks is presented showing that the system missed no critical defects found by operators. These inspections also demonstrated numerous occasions for improved classifications compared to that given by the operators. This capability gives improved disposition, an easy path to using simulator based printability for disposition, and significant improvements in mask yield.

Advanced x-ray mask inspection system (AXIS) using scanning electron microscopy for sub-70nm die-to-database inspections

Abstract: The concept of using Scanning Electron Microscopy and Die-to-Database techniques to rigorously inspect advanced lithography products such as X-ray Lithography, Imprint, and Stencil masks as well as other Next Generation Lithography (NGL) is compelling. Current optical capabilities reach down to 0.2μm and do so by interpolating pixilated optical data. Applications at 4x magnifications, such as Chrome on Glass or Phase Shift Photomasks mesh with this resolution of inspection and have been able to migrate down the lithography nodes hand in hand. As the demands for resolution progress, optical lithography has been increasing the requirements upon inspection systems presently available through the addition of assist features and serifs, which are difficult to directly verify. These assist features are effectively approaching 1x dimensions. A printed feature that is slightly out-of-tolerance for CD, shape, or position relative to other structures, may still yield acceptable performance. This added resolution challenge of working closer to a 1x Magnification with ever decreasing structure sizes is easily achieved with Scanning Electron Microscope technology. The Die-to-Database inspection technique utilizes the CAD image, which defines the designer's original intended structure, as the reference image. In this paper, we will introduce a revolutionary approach for utilizing the full potential of Scanning Electron Microscope images for inspection purposes. The technique incorporates an aggressive but reliable interpretation of the image data to recreate GDS data files which can then be validated against the desired GDS data for hard defects, abbreviated / missing features, and even shifts or placement errors.

High-resolution mask inspection in advanced fab

Abstract: High resolution mask inspection in advanced wafer fabs is a necessity. Initial and progressive mask defect problem still remains an industry wide mask reliability issue. Defect incidences and its criticality vary significantly among the type of masks, technology node and layer, fab environment and mask usage. A usage and layer based qualification strategy for masks in production need to be adopted in wafer fabs. With the help of a high-resolution direct reticle inspection, early detection of critical and also non-critical defects at high capture rates is possible. A high-resolution inspection that is capable of providing necessary sensitivity to critical emerging defects (near edge) is very important in advanced nodes. At the same time, a way to disposition (make a go / no-go decision) on these defective masks is also very important. As the impact of these defects will depend on not only their size, but also on their transmission and MEEF, various defect types and characteristics have to be considered. In this technical report the adoption of such a high-resolution mask inspection system in wafer fab production is presented and discussed. Data on this work will include inspection results from advanced masks, layer and product based inspection pixel assignment, defect disposition and overall wafer fab strategies in day-to-day production towards mask inspection.