Mask inspection

About: Mask inspection is a research topic. Over the lifetime, 1072 publications have been published within this topic receiving 8696 citations.

Inspection method for mask pattern used in semiconductor device fabrication

Abstract: An inspection method of a mask pattern such as a reticle pattern (60) used in a fabrication of a semiconductor device, applying an optical system (20) is disclosed. The mask pattern is inspected by an imaging sensor (28) mounted on a stage (30) on which a fabricating object (26) is also mounted. The imaging sensor (28) converts an optical image of the mask pattern (60) being intended to be exposed on the object to a video signal (V a ) and it is inspected comparing with another video signal (V G ) provided from the data for designing the mask pattern (60). This inspection is made before the process of exposing the mask pattern on the fabricating object (26) to avoid the waste of time in the semiconductor patterning process.

Recent Activities on Extreme Ultraviolet Lithography in NewSUBARU

Abstract: Since the first presentation of extreme ultraviolet lithography (EUVL) was given in the Annual Meeting of the Japan Society of Applied Physics in 1986, a quarter of a century has passed. Currently, this technology is in the manufacturing developmental stage. The high-volume manufacturing of direct random access memory (DRAM) with a line width of 20 nm is expected in 2014. The remaining critical issues of development are a stand-alone source with higher power and a mask inspection tool for zero defects. The Center for EUVL in the University of Hyogo was established in 2010. This center is now available for utilizing some equipment, such as an EUV mask defect inspection tool, an interference lithography system, a device for the thickness measurement of the carbon contamination film deposited by resist outgassing, and reflectivity measurement systems.

Inspection of pattern

Abstract: PURPOSE:To permit a high accurate pattern inspection in a short time by accommodating a substrate completed pattern formation in an electron beam exposure device and scanning is done wherein the reflection is detected and compared with the pattern data CONSTITUTION:Patterns 9 are depicted by an electron beam exposure device and substrate to be tested 7 which completed such processes as development, etching or the like is again mounted on the stage of the electron beam exposure device Next, the electron beams 13 scan the whole surface of the substrate to be tested 7 by the same way as that done at the time of pattern depiction and by deflecting the electronbeams 13 The above is done under the condition that the electron beams 13 are always irradiated And emission electrons 14 generated when the electron beams 13 are irradiated to the substrate to be tested 7 are detected by a detector 15 and the emission electrons 14 are compared with the pattern data at the time of pattern depiction to detect defects In this way, a high accurate mask inspection by the electron beams are perfomred

Study of high sensitivity DUV inspection for sub-20nm devices with complex OPCs

Abstract: EUV lithography has been delayed due to well-known issues such as source power, debris, pellicle, etc. for high volume manufacturing. For this reason, conventional optical lithography has been developed to cover more generations with various kinds of Resolution Enhancement Techniques (RETs) and new process technology like Multiple Patterning Technology (MPT). Presently, industry lithographers have been adopting two similar techniques of the computational OPC scheme such as Inverse Lithography Technology (ILT) and Source Mask Optimization (SMO) [1]. Sub-20 nm node masks including these technologies are very difficult to fabricate due to many small features which are near the limits of mask patterning process. Therefore, these masks require the unseen level of difficulty for inspection. In other words, from the viewpoint of mask inspection, it is very challenging to maintain maximum sensitivities on main features and minimum detection rates on the Sub-Resolution Assist Features (SRAFs). This paper describes the proper technique as the alternative solution to overcome these critical issues with Aerial Imaging (AI) inspection and High Resolution (HR) imaging inspection.