Topic
Mask inspection
About: Mask inspection is a research topic. Over the lifetime, 1072 publications have been published within this topic receiving 8696 citations.
Papers published on a yearly basis
Papers
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12 Mar 2012
TL;DR: An EUV integrated circuit fabrication method and system EUV that includes blank inspection, defect characterization, simulation, pattern compensation, modification of the mask writer database, inspection and simulation of patterned masks, and patterned mask repair is described in this article.
Abstract: An EUV integrated circuit fabrication method and system EUV that includes blank inspection, defect characterization, simulation, pattern compensation, modification of the mask writer database, inspection and simulation of patterned masks, and patterned mask repair. The system performs blank inspection to identify defects at multiple focal planes within the blank. The mask can be relocated on the blank and alterations to the pattern can be developed to compensate for the defects prior to prior to patterning the mask. Once the mask has been patterned, the reticle is inspected to identify any additional or remaining defects that were not picked up during blank inspection or fully mitigated through pattern compensation. The patterned reticle can then be repaired prior to integrated circuit fabrication.
17 citations
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23 Feb 2004
TL;DR: In this article, a threshold look-up table is used to evaluate the impact of mask defect impact during the transfer of a mask pattern to a wafer layer by using mask images obtained during mask inspection.
Abstract: To exam mask defect impact during the transfer of a mask pattern to a wafer layer, tools can use mask images obtained during mask inspection. Specifically, these tools can also use optical models of such mask images to simulate wafer images. However, when feature sizes become very small, optical models may not provide sufficiently accurate simulation results. Using a photoresist model would yield significantly more accurate simulation results than using an optical model. Unfortunately, resist modeling is very slow, thereby making it commercially impractical. A simulation tool can generate a simulated wafer image having the accuracy of a photoresist model with the speed of an optical model by using a threshold look-up table. In one embodiment, the threshold look-up table could include variables such as feature size, pitch size, feature type, and defect type.
17 citations
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TSMC1
TL;DR: Lipton et al. as mentioned in this paper proposed a technique called Lithographic Plane Review (LPR) to reconstruct the defective mask from its inspection image, and then perform simulated AIMS evaluation on the reconstructed mask.
Abstract: As optical lithography continues to extend into low-k1 regime, resolution of mask patterns under mask inspection optical
conditions continues to diminish. Furthermore, as mask complexity and MEEF has also increased, it requires detecting
even smaller defects in the already narrower pitch mask patterns. This leaves the mask inspection engineer with the
option to either purchase a higher resolution mask inspection tool or increase the detector sensitivity on the existing
inspection system or maybe even both. In order to meet defect sensitivity requirements in critical features of sub-32nm
node designs, increasing sensitivity typically results in increased nuisance (i.e., small sub-specification) defect detection
by 5-20X defects making post-inspection defect review non-manufacturable.
As a solution for automatically dispositioning the increased number of nuisance and real defects detected at higher
inspection sensitivity, Luminescent has successfully extended Inverse Lithography Technology (ILT) and its patented
level-set methods to reconstruct the defective mask from its inspection image, and then perform simulated AIMS
dispositioning on the reconstructed mask. In this technique, named Lithographic Plane Review (LPR), inspection
transmitted and reflected light images of the test (i.e. defect) and reference (i.e., corresponding defect-free) regions are
provided to the "inversion" engine which then computes the corresponding test and reference mask patterns. An essential
input to this engine is a well calibrated model incorporating inspection tool optics, mask processing and 3D effects, and
also the subsequent AIMS tool optics to be able to then simulate the aerial image impact of the defects. This flow is
equivalent to doing an actual AIMS tool measurement of every defect detected during mask inspection, while at the same
time maintaining inspection at high enough resolution. What makes this product usable in mask volume production is the
high degree of accuracy of mask defect reconstruction, predicting actual AIMS measurements to within ±4% CD error
for > 95% of defects while not missing any OOS (out-of-specification) defect and maintaining high simulation
throughput of ≥250 defects/min on Luminescent's distributed computing platform. This technique enables inspection
recipes to be setup based on the sensitivity required to detect small but lithographically-significant defects, even if in the
process a large number of nuisance defects are detected.
LPR is being implemented as an integral part of defect classification for high-volume sub-32nm technology nodes and
higher. Furthermore, this technique will be essential to the lithographic disposition of defects detected on EUV masks
inspected under non-actinic conditions.
17 citations
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19 Nov 2014-Journal of Vacuum Science & Technology. B. Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena
TL;DR: In this article, a technique to measure telecentricity errors using EUV mask images from an actinic mask inspection tool, called the SEMATECH High NA Actinic Reticle Review Project (SHARP), is presented.
Abstract: Nontelecentric illumination in extreme ultraviolet (EUV) lithography leads to pattern shifts through focus called telecentricity errors. As the industry moves toward finer pitch structures and higher numerical apertures (NA) to improve resolution, the effects of telecentricity errors become more significant. These telecentricity errors are dependent on pattern pitch, pattern type, lens aberrations, mask stack, to name a few. In this paper, a novel technique to measure telecentricity errors using EUV mask images from an actinic mask inspection tool, called the SEMATECH High NA Actinic Reticle Review Project (SHARP) is presented. SHARP is SEMATECH's second generation actinic mask imaging tool developed by Lawrence Berkeley National Laboratory. The SHARP can image masks at different numerical aperture settings, even beyond the currently available scanner NA of 0.33 (high-NA EUV) and also has a set of programmable illuminator choices. A tuned multilayer EUV mask blank was fabricated with test structures optimized for imaging on SHARP. The test structures were designed to cover a variety of critical dimensions and pitches. The mask design was fabricated on a tuned multilayer blank optimized for NA > 0.4. The mask was fabricated at Advanced Mask Technology Center and imaged on the SHARP. SHARP images were analyzed in software customized for edge position extraction of features. Pattern shifts through focus were calculated for a variety of pitches under different NA and illumination settings. The results show a monotonic increase in pattern shifts as NA increases. Also, at a given NA, the pattern shift is dependent on pattern pitch. The paper provides a detailed discussion on the experiment setup, analysis of the results and applicability of these results to high volume manufacturing of semiconductor devices using production EUV scanners.
17 citations
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05 Feb 2003TL;DR: In this article, techniques for utilizing a microscope inspection system (100) capable of inspecting specimens at high throughput rates are described, and the inspection system achieves the higher throughput rates by utilizing more than one detector array and a large field of view to scan the surface of the semiconductor wafers.
Abstract: Techniques for utilizing a microscope inspection system (100) capable of inspecting specimens (112) at high throughput rates are described. The inspection system achieves the higher throughput rates by utilizing more than one detector array (116) and a large field of view to scan the surface of the semiconductor wafers. The microscope inspection system also has high magnification capabilities, a high numerical aperture, and a large field of view. By using more than one detector array, more surface area of a wafer can be inspected during each scanning swath across the semiconductor wafers. The microscope inspection system is configured to have a larger field of view so that the multiple detector arrays can be properly utilized. Additionally, special arrangements of reflective and/or refractive surfaces are used in order to fit the detector arrays within the physical constraints of the inspection system.
17 citations