Mask inspection

About: Mask inspection is a research topic. Over the lifetime, 1072 publications have been published within this topic receiving 8696 citations.

Applicability of e-beam mask inspection to EUV mask production

Abstract: Ever since the 180nm technology node the semiconductor industry has been battling the sub-wavelength regime in optical lithography. During the same time development for a 13.5nm Extreme Ultraviolet [EUV] solution has been in development, which would take us back from a λ/10 to a >λ regime again - at least for one node. Add to this the potential to increase the wafer size as well, and we are at a major crossroads. The introduction of EUV has been marred by many delays, but we are finally seeing the hardware development efforts converge and multiple customers around the world embarking on this adventure. As it becomes clear that this preproduction phase will occur at or below 20nmHP, it also becomes clear that this will happen at the limiting edge of existing 19x-based patterned mask inspection technology, reaching the practical resolution limits at around 20nm HP mask densities. Resolution is coupled with sensitivity and throughput such that the extended sensitivity may come at an unreasonable throughput. Loss of resolution also badly impacts defect dispositioning, or classification, which becomes impractical. As resolution is especially critical for die to database inspection, single die masks and masks with high flare bias are at risk of not being inspectable with 19xnm based inspectors. E-Beam based mask inspection has been proposed and demonstrated as a viable technology for patterned EUV mask inspection. In this paper, we study the key questions of sensitivity and throughput, in both die-to-die and die-to-database applications. We present new results, based on a new generation of E-Beam inspection technology, which has a higher data rate at smaller spot sizes. We will demonstrate the feasibility of acceptable inspection time with EBMI. We also will discuss die-to-data-base inspection and the advantage of using E-Beam imaging for meeting future requirements of single- die EUV masks.

Simulation based mask defect repair verification and disposition

Abstract: As the industry moves towards sub-65nm technology nodes, the mask inspection, with increased sensitivity and shrinking critical defect size, catches more and more nuisance and false defects. Increased defect counts pose great challenges in the post inspection defect classification and disposition: which defect is real defect, and among the real defects, which defect should be repaired and how to verify the post-repair defects. In this paper, we address the challenges in mask defect verification and disposition, in particular, in post repair defect verification by an efficient methodology, using SEM mask defect images, and optical inspection mask defects images (only for verification of phase and transmission related defects). We will demonstrate the flow using programmed mask defects in sub-65nm technology node design. In total 20 types of defects were designed including defects found in typical real circuit environments with 30 different sizes designed for each type. The SEM image was taken for each programmed defect after the test mask was made. Selected defects were repaired and SEM images from the test mask were taken again. Wafers were printed with the test mask before and after repair as defect printability references. A software tool SMDD-Simulation based Mask Defect Disposition-has been used in this study. The software is used to extract edges from the mask SEM images and convert them into polygons to save in GDSII format. Then, the converted polygons from the SEM images were filled with the correct tone to form mask patterns and were merged back into the original GDSII design file. This merge is for the purpose of contour simulation-since normally the SEM images cover only small area (~1 μm) and accurate simulation requires including larger area of optical proximity effect. With lithography process model, the resist contour of area of interest (AOI-the area surrounding a mask defect) can be simulated. If such complicated model is not available, a simple optical model can be used to get simulated aerial image intensity in the AOI. With built-in contour analysis functions, the SMDD software can easily compare the contour (or intensity) differences between defect pattern and normal pattern. With user provided judging criteria, this software can be easily disposition the defect based on contour comparison. In addition, process sensitivity properties, like MEEF and NILS, can be readily obtained in the AOI with a lithography model, which will make mask defect disposition criteria more intelligent.

Defect printability study using EUV lithography

Abstract: Defect-free masks are one of the top issues for enabling EUV lithography at the 32-nm node. Since a defect-free process cannot be expected, an understanding of the defect printability is required in order to derive critical defect sizes for the mask inspection and repair. Simulations of the aerial image are compared to the experimental printing in resist on the wafer. Strong differences between the simulations and the actual printing are observed. In particular the minimum printable defect size is much larger than expected which is explained in terms of resist resolution. The defect printability in the current configuration is limited by the resist process rather than the projection optics.

Mask inspection apparatus, and exposure method and mask inspection method using the same

Abstract: The present invention provides a mask inspection apparatus and method capable of inspecting masks used in double patterning with satisfactory accuracy. Optical images of two masks are acquired (S 100 ). The acquired optical images of the two masks are combined together (S 102 ). Relative positional displacement amounts of patterns of the first mask and patterns of the second mask are measured at the combined image (S 104 ). The measured relative positional displacement amounts are compared with standard values to thereby determine whether the two masks are good (S 106 ).

Manufacture of mask inspection device and semiconductor device

Abstract: PROBLEM TO BE SOLVED: To eliminate the need to reinspect for foreign matters, by simultaneously carrying out removal of foreign matters and check-up on the removal of foreign matters, in the case of a mask inspection device suitable to surely remove foreign matters on a mask. SOLUTION: When a foreign matter 21 is detected on a mask 20, the foreign matter 21 is removed. A gas ejector 38 and a foreign-matter aspirator 42 are disposed in positions confronting the mask 20. The gas ejector 38 ejects high- pressure air from above the foreign matter 21. The foreign-matter aspirator 42 aspirates the foreign matter 21 from below the foreign matter 21. A particle counter 44 is connected to the foreign-matter aspirator 42. When the foreign matter 21 is counted by the particle counter 44, the foreign matter 21 is judged to be removed from the mask 20. COPYRIGHT: (C)2000,JPO