Master clock

About: Master clock is a research topic. Over the lifetime, 2949 publications have been published within this topic receiving 35812 citations.

Apparatus and method for synchronizing an scdma upstream or any other type upstream to an mcns downstream or any other type downstream with a different clock rate than the upstream

Abstract: A bidirectional digital data communication system which generate phase coherent upstream clock and carrier signals from recovered downstream clock generated from a master clock in a central unit. The preferred species uses any downstream clock rate and generates a phase coherent upstream clock so long as the two clock rates can be related by the ratio M/N where M and N are integers. One embodiment uses an MCNS downstream and an SCDMA upstream and uses MNCN timestamp messages in the downstream to achieve an estimate of RU frame offset prior to establishing frame alignment using a ranging process. The use of timestamp messages to estimate the offset is aided by a low jitter method for inserting timestamp messages by avoiding straddling of MPEG packet headers with the sync message. Clock slip is detected by counting upstream clock cycles over a predetermined downstream clock interval and the RU transmitter is shut down if slip is detected to prevent ISI interference from misaligned codes. An SCDMA transmitter for the minislot environment of 802.14 and MCNS is disclosed along with a receiver for the minislot environment using TDMA or SCDMA demultiplexing.

Clock-gating and its application to low power design of sequential circuits

Abstract: This paper models the clock behavior in a sequential circuit by a quaternary variable and uses this representation to propose and analyze two clock-gating techniques. It then uses the covering relationship between the triggering transition of the clock and the active cycles of various flip flops to generate a derived clock for each flip flop in the circuit. A technique for clock gating is also presented, which generates a derived clock synchronous with the master clock. Design examples using gated clocks are provided next. Experimental results show that these designs have ideal logic functionality with lower power dissipation compared to traditional designs.

Method of controlling data sampling clocking of asynchronous network nodes in a frame-based communications network

Abstract: A method of controlling data sampling clocking of asynchronous network nodes, each asynchronous network node having a local clock and transmitting and receiving packets to and from an asynchronous network according to an asynchronous network media access protocol. An asynchronous network node capable of transmitting and receiving packets on the asynchronous network is designated as a master node. Each non-master asynchronous network node which desires to synchronously transport packets across the asynchronous network is designated as a slave node. A master node clock of the master node is synchronized with a slave node clock of each slave node. Each slave node clock is continuously corrected compared with the master node clock to smooth slave clock error to an average of zero compared with the master clock as a reference using timestamp information from the master node. A derivative clock at the slave node is derived from the continuously correcting each slave node clock to control data sampling at the slave node.

Daily rhythms of food-anticipatory behavioral activity do not require the known circadian clock

Abstract: When food availability is restricted to a particular time each day, mammals exhibit food-anticipatory activity (FAA), a daily increase in locomotor activity preceding the presentation of food. Considerable historical evidence suggests that FAA is driven by a food-entrainable circadian clock distinct from the master clock of the suprachiasmatic nucleus. Multiple food-entrainable circadian clocks have been discovered in the brain and periphery, raising strong expectations that one or more underlie FAA. We report here that mutant mice lacking known circadian clock function in all tissues exhibit normal FAA both in a light–dark cycle and in constant darkness, regardless of whether the mutation disables the positive or negative limb of the clock feedback mechanism. FAA is thus independent of the known circadian clock. Our results indicate either that FAA is not the output of an oscillator or that it is the output of a circadian oscillator different from known circadian clocks.

Apparatus and method for SCDMA digital data transmission using orthogonal codes and a head end modem with no tracking loops

Abstract: A system for bidirectional communication of digital data between a central unit and a remote unit wherein the need for tracking loops in the central unit has been eliminated. The central unit transmitter generates a master carrier and a master clock signal which are used to transmit downstream data to the remote units. The remote units recover the master carrier and master clock and synchronize local oscillators in each remote unit to these master carrier and master clock signals to generate reference carrier and clock signals for use by the remote unit receiver. These reference carrier and clock signals are also used by the remote unit transmitters to transmit upstream data to the central unit. The central unit receiver detects the phase difference between the reference carrier and clock signals from the remote units periodically and adjusts the phase of the master carrier and master clock signals for use by the central unit receiver to receive the upstream data.