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Memistor

About: Memistor is a research topic. Over the lifetime, 608 publications have been published within this topic receiving 34905 citations.


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Journal ArticleDOI
TL;DR: A novel technique for on-chip training of multi-layer neural networks implemented using a single crossbar per layer and two memristors per synapse using a novel variant of the back-propagation (BP) algorithm to reduce both circuit area and training time.
Abstract: Memristor crossbar arrays carry out multiply–add operations in parallel in the analog domain which is the dominant operation in a neural network application. On-chip training of memristor neural network systems have the significant advantage of being able to get around device variability and faults. This paper presents a novel technique for on-chip training of multi-layer neural networks implemented using a single crossbar per layer and two memristors per synapse. Using two memristors per synapse provides double the synaptic weight precision when compared to a design that uses only one memristor per synapse. Proposed system utilizes a novel variant of the back-propagation (BP) algorithm to reduce both circuit area and training time. During training, all the memristors in a crossbar are updated in four steps in parallel. We evaluated the training of the proposed system with some nonlinearly separable datasets through detailed SPICE simulations which take crossbar wire resistance and sneak-paths into consideration. The proposed training algorithm trained the nonlinearly separable functions with a slight loss in accuracy compared to training with the traditional BP algorithm.

26 citations

Journal ArticleDOI
TL;DR: A plug-and-play kit that can be used as a teaching aid in high school has been designed, which mimics the behavior of recently discovered TiO2 based memristor.
Abstract: A plug-and-play kit that can be used as a teaching aid in high school has been designed, which mimics the behavior of recently discovered TiO2 based memristor. The circuit uses easily available off-the-shelf components to emulate a memristor. SPICE simulations and lab results are shown to validate the proposed circuit.

26 citations

Journal ArticleDOI
TL;DR: In this article, the conductive mechanism of the memristor is analyzed and a method of continuously programming memristance is proposed and simulated in a simulation program with integrated circuit emphasis, and its feasibility and compatibility, both in simulations and physical realizations, are demonstrated.
Abstract: In many communication and signal routing applications, it is desirable to have a programmable analog filter. According to this practical demand, we consider the titanium oxide memristor, which is a kind of nano-scale electron device with low power dissipation and nonvolatile memory. Such characteristics could be suitable for designing the desired filter. However, both the non-analytical relation between the memristance and the charges that pass through it, and the changeable V—I characteristics in physical tests make it difficult to accurately set the memristance to the target value. In this paper, the conductive mechanism of the memristor is analyzed, a method of continuously programming the memristance is proposed and simulated in a simulation program with integrated circuit emphasis, and its feasibility and compatibility, both in simulations and physical realizations, are demonstrated. This method is then utilized in a first-order active filter as an example to show its applications in programmable filters. This work also provides a practical tool for utilizing memristors as resistance programmable devices.

26 citations

Proceedings ArticleDOI
08 Jul 2015
TL;DR: A circuit to read individual resistances from a 0T1M crossbar and a method to map neuron synaptic weights into a novel neural circuit to enable ex-situ training of a neural network are presented.
Abstract: This study proposes a technique for programming a dense memristor crossbar array without isolation transistors (0T1M) in order to achieve ex-situ training of a neural network. Programming memristors to a specific resistance level requires an iterative process needing the reading of individual memristor resistances due to memristor device stochasticity. This paper presents a circuit to read individual resistances from a 0T1M crossbar and a method to map neuron synaptic weights into a novel neural circuit to enable ex-situ training. The results show that we are able to train the resistances in a 0T1M crossbar and that the 0T1M system is about 93% smaller in area than 1T1M systems.

25 citations

Proceedings ArticleDOI
03 Oct 2011
TL;DR: A memristor based crossbar memory system was analyzed in terms of timing and switching energy using SPICE and the Memristor model in the simulations was designed to match the I–V characteristics of three different published devices.
Abstract: The recently discovered memristor has the potential to be the building block of a high-density memory system. A memristor based crossbar memory system was analyzed in terms of timing and switching energy using SPICE. The memristor model in the simulations was designed to match the I–V characteristics of three different published devices. The simulation results for each device were compared to demonstrate the performance of a one transistor one memristor (1T1M) memristor crossbar.

25 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202328
202277
20212
20201
20191
201815