Topic
Memistor
About: Memistor is a research topic. Over the lifetime, 608 publications have been published within this topic receiving 34905 citations.
Papers
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06 Jul 2014TL;DR: Simulation results show the potential of the neuromorphic network in low power and high speed computing system, including spike-timing dependent plasticity (STDP) scheme and a parallel supervised learning circuit.
Abstract: Emerging ferroelectric tunnel memristors show large OFF/ON resistance ratio (>100) and high operation speed (~10ns), promising to be widely applied in the future synapse-like systems. In this paper we propose a neuromorphic network with ferroelectric tunnel memristor. This network is arranged with classical crossbar topology, in which each crosspoint forms a synapse consisting of a MOS transistor and a memristor. Based on this architecture, we design a spike-timing dependent plasticity (STDP) scheme and a parallel supervised learning circuit. Using a compact model of ferroelectric tunnel memristor and CMOS 40nm design kit, we perform transient simulation to validate the functionality of the proposed STDP and learning circuit. Simulation results show the potential of our neuromorphic network in low power (~100nA or ~1μA) and high speed (μs or ~100ns) computing system.
20 citations
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24 Jun 2015TL;DR: This paper introduces a memristor emulator circuit based on operational transconductance amplifiers using commercial available integrated circuit which can be used as a teaching aid and for real circuit applications.
Abstract: This paper introduces a memristor emulator circuit based on operational transconductance amplifiers. This emulator circuit is imitated the behavior of a titanium dioxide memristor model using commercial available integrated circuit. Thus, the hardware of proposed emulator circuit can be built using devices that find in the market. Also the circuit can be tested in both simulations and experiments which can be used as a teaching aid and for real circuit applications. Simulation and experimental results are given as agree well with theory.
20 citations
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TL;DR: In this study, multiple memristors, both in series and parallel connections, and their characteristics are further studied including the transient behaviours when asynchronous change happens and the composite electric properties in steady state etc.
Abstract: With the increase of research interest on memristors, various single or multiple memristor configurations have been integrated with advanced complementary metal-oxide-semiconducor technology, which promises efficient implementations of synaptic connections in neuromorphic computing systems, or computing elements in signal processing systems. In this study, multiple memristors, both in series and parallel connections, and their characteristics are further studied including the transient behaviours when asynchronous change happens and the composite electric properties in steady state etc. Particularly, the specific conditions to reach steady state and produce composite memristive effects are presented in detail. Furthermore, several synaptic memristor circuits based on series and parallel connections are also discussed.
20 citations
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01 Jun 2014TL;DR: A MATLAB interface allows the user to load a binary image into the memory and observe the resulting internal memory states of each memristor in the array along with key performance metrics describing the speed and degree of success of the memory `write' operation.
Abstract: We demonstrate a practical application of memristors in a cross-bar memory array. The full set-up consists of only a PC, an mBED microcontroller and a PCB hosting external components and the memristor cross-bar chip. The system can be used for general purpose memory storage, but in this case we use it as a binary image storage device. A MATLAB interface allows the user to load a binary image into the memory and observe the resulting internal memory states of each memristor in the array along with key performance metrics describing the speed and degree of success of the memory `write' operation.
20 citations
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TL;DR: It is demonstrated that the proposed CRS model-based crossbar arrays can significantly reduce sneak path currents with high noise margin compared to traditional memristor-based architectures.
Abstract: In this paper, we propose a novel Verilog-A based memristor model for effective simulation and application. Our proposed model captures desired nonlinear characteristics using voltage-based state control. This model is flexible and accurate, it can exhibit all the behaviors of HP memristive device and a general class memristive device resistive random access memory which is important in logic and memory design. Furthermore, we can antiserially connect two proposed models to capture the ideal ${I}$ – ${V}$ characteristics of complementary resistive switch (CRS). We demonstrate that our proposed CRS model-based crossbar arrays can significantly reduce sneak path currents with high noise margin compared to traditional memristor-based architectures.
20 citations