Memistor

About: Memistor is a research topic. Over the lifetime, 608 publications have been published within this topic receiving 34905 citations.

Determining optimal switching speed for memristors in neuromorphic system

Abstract: As non-volatile memory based on resistive switching becomes more mature, memristor devices with very fast switching times are becoming more prominent. However, this reported work shows that memristor devices with slow switching times (of about 10 µs) are more appropriate for use in neuromorphic systems. This is done by modelling a series of memristors that differ in their switching time. Simulation of a memristor-based neuromorphic circuit is performed using each of these modelled devices. Devices with a high switching speed require unrealistically small voltage pulses to incrementally change the memristor resistance.

Overview: Memristive devices, circuits and systems

Abstract: With conventional CMOS technology approaching fundamental scaling limits, novel nanotechnologies offer great promise for VLSI integration at nanometer scales. The memristor, or "memory resistor," is a novel nanoelectronic device that holds great promise for emerging VLSI applications. Essentially, a memristor is a programmable resistor whose resistance is altered based on specified toggle conditions. Furthermore, memristors are non-volatile such that the state of the device remains until the next toggle condition. This paper will provide an overview of memristors and memristive systems with a particular focus on applications for emerging VLSI circuits and systems. Examples of memristor based memory and logic circuits are to be discussed in detail including device modeling, memristor memory analysis, and memristor based logic. While the examples shown are focused on digital applications, memristors also hold great promise for analog, mixed signal and biomedical systems. These several potential applications will be discussed as part of this overview.

Interference and memory capacity effects in memristive systems

Abstract: Short-term memory implies the existence of a capacity limit beyond which memory cannot be securely formed and retained. The underlying mechanisms are believed to be two primary factors: decay and interference. Here, we demonstrate through both simulation and experiment that the memory capacity effect can be implemented in a parallel memristor circuit, where decay and interference are achieved by the inherent ion diffusion in the device and the competition for current supply in the circuit, respectively. This study suggests it is possible to emulate high-level biological behaviors with memristor circuits and will stimulate continued studies on memristor-based neuromorphic circuits.

An a VLSI driving circuit for memristor-based STDP

Abstract: The main goal in realizing a VLSI (analog VLSI) systems able to mimic functionalities of biological neural networks is pointed to the reproduction of realistic synapses. Indeed, because of the relative high synapse/neuron ratio, especially in the case of extremely dense networks (i.e., reproduction of a real scenario), synapses represent a considerable limitation in terms of waste of silicon area and power consumption as well. Thanks to advancement made in the implementation of memristor, the interest in bio-inspired neural network design has been renewed. Memristors have tunable resistance which depends on its past state; this is analogous to the operating mode of biological synapses. In this paper, we present the circuit implementation of a simple memristor-based neural network. Here, we propose a driving circuit model that not requires specific shape input pulses to change the memristor conductance (i.e., synaptic strength), but it can be driven by arbitrary shaped input pulses. Moreover, this prototype circuit offers the chance of emulating the standard STDP behavior allowing “controlled” changes for the synaptic weights. Some preliminary experimental results are reported to validate the proposed driving circuit.

Low Cost Memristor Associative Memory Design for Full and Partial Matching Applications

Abstract: Novel memory circuits based on variable-resistance devices (such as memristors) have been recently proposed to overcome the limitations of CMOS based memories. These novel memories although based on different technologies, all share the principle of storing information as the resistance value imposed to a variable-resistance devices. Another promising application of memristors is in content-addressable memory (CAM). The study of memristor based CAM design has become increasingly important with the advent of new hybrid CMOS molecular technologies. To this end, we present a two-transistor–memristor (2T2M) bitcell for CAM design, suitable for low-power applications. The proposed circuit consists of memristors to store data and transistors as access devices, and utilizes complementary logic values at the input. We present detailed simulation based characterization (for both full match and partial match cases) and analysis, considering different word sizes of the proposed bitcells, including full parasitics, using BPTM 45-nm CMOS device models.