Memistor

About: Memistor is a research topic. Over the lifetime, 608 publications have been published within this topic receiving 34905 citations.

Bottleneck of using single memristor as a synapse and its solution

Abstract: Physical realization of the first memristor by researchers at Hewlett Packard (HP) labs attracts so much interest in this newly found circuit element which has so many applications specially in a field of neuromorphic systems Now, it is well known that one of the main applications of memristor is for the hardware implementation of synapses because of their capability in dense fabrication and acting as a perfect analog memory However, synapses in biological systems have this property that by progressing in the learning process, variation rate of the synapses weights should decrease which is not the case in the currently suggested memristor-based structures of neuromorphic systems In this paper, we show that using two dissimilar memristors connected in series as a synapse perform better than the single memristor

SPICE simulator for hybrid CMOS memristor circuit and system

Abstract: Memristor is a two-terminal non-linear passive electrical device. After its recently successful fabrication, a variety of applications based on memristor have been explored, such as non-volatile memory, reconfigurable computing and neural network. However, one major challenge when designing hybrid CMOS memristor integrated circuit is the lack of SPICE-like simulator for design validation. Current approach is to describe memristor device with equivalent circuit, which is however extremely time-consuming for large scale design simulation due to additional modeling components. In this paper, a memristor SPICE simulator is introduced based on the recent new modified nodal analysis (MNA) framework, which can effectively support the non-conventional state variable such as doping ratio of memristor. As such, the memristor device can be stamped into state matrix similarly as one BSIM MOSFET. Compared with equivalent circuit simulation approach, our new MNA based approach exhibits 40x less simulation time for a 32×32 memristor crossbar circuit. A hybrid CMOS memristor circuit for classic conditioning training has also been studied by the developed SPICE simulator.

A novel memristor emulator based only on an exponential amplifier and CCII

Abstract: This paper introduces a novel memristor emulator circuit, which consists only of an exponential amplifier and a second generation current conveyor (CCII+) to achieve the non-linearity behavior of the memristor in the I-V plane. This emulator circuit is very simple and less complex compared to the previously published circuits. Furthermore, this circuit can accurately imitate the behavior of a memristor and satisfy the fingerprints of the memristors. The paper also presents the mathematical modeling and analysis of the proposed emulator. Finally, PSPICE and analytical validations are provided to validate the proposed emulator circuit.

FPAA/Memristor Hybrid Computing Infrastructure

Abstract: This paper presents a circuit in which tungsten oxide -based analog memristors are post-processed on a CMOS-based Field-Programmable Analog Array Integrated Circuit (FPAA-IC). FPAAs are powerful tools for rapid analog experimentation, prototyping and power-efficient computing, and they allow custom analog circuits to be built and reconfigured. The primary motivation for this work is to introduce and demonstrate the operation of the FPAA/memristor hybrid circuit and the board-level infrastructure, and to form a basis for subsequent empirical work on analog memristive computing. The experiments shown in this paper demonstrate a successful fabrication of memristors on the FPAA substrate, and the usefulness of the hybrid computing infrastructure in terms of experimentation with memristors. The experiments suggest that a single state variable cannot capture the adaptation of a memristor. To this end, a SPICE compatible memristor model with two state variables is presented. Furthermore, a memristor-based adaptive coincidence detector is demonstrated on the FPAA/Memristor computing infrastructure.

Programmable memristor emulator ASIC for biologically inspired memristive learning

Abstract: This paper details a fully programmable floating memristor (resistor with memory) emulator ASIC designed for biologically inspired memristive learning. Since real memristor is not commercially available, a compact memristor emulator is needed for device study. The designed ASIC has a memristor emulator with conductance range from 4.88nS to 4.99µS (200KΩ to 204.8MΩ). The memristor emulator is a switched-resistor based circuit with processing performed off-chip in a FPGA. The processing has been planned to be off-chip to get the freedom of programmability of any function. This paper explains the memristor emulator and the realization of synapse functionality used in neuromorphic circuits like long term potentiation (LTP), Long Term depression (LTD) and synaptic plasticity. The ASIC has been designed and fabricated in AMS 350nm process.