Memistor

About: Memistor is a research topic. Over the lifetime, 608 publications have been published within this topic receiving 34905 citations.

Memristor-Based Multilayer Neural Networks With Online Gradient Descent Training

Abstract: Learning in multilayer neural networks (MNNs) relies on continuous updating of large matrices of synaptic weights by local rules. Such locality can be exploited for massive parallelism when implementing MNNs in hardware. However, these update rules require a multiply and accumulate operation for each synaptic weight, which is challenging to implement compactly using CMOS. In this paper, a method for performing these update operations simultaneously (incremental outer products) using memristor-based arrays is proposed. The method is based on the fact that, approximately, given a voltage pulse, the conductivity of a memristor will increment proportionally to the pulse duration multiplied by the pulse magnitude if the increment is sufficiently small. The proposed method uses a synaptic circuit composed of a small number of components per synapse: one memristor and two CMOS transistors. This circuit is expected to consume between 2% and 8% of the area and static power of previous CMOS-only hardware alternatives. Such a circuit can compactly implement hardware MNNs trainable by scalable algorithms based on online gradient descent (e.g., backpropagation). The utility and robustness of the proposed memristor-based circuit are demonstrated on standard supervised learning tasks.

Memristor-Based Cellular Nonlinear/Neural Network: Design, Analysis, and Applications

Abstract: Cellular nonlinear/neural network (CNN) has been recognized as a powerful massively parallel architecture capable of solving complex engineering problems by performing trillions of analog operations per second. The memristor was theoretically predicted in the late seventies, but it garnered nascent research interest due to the recent much-acclaimed discovery of nanocrossbar memories by engineers at the Hewlett-Packard Laboratory. The memristor is expected to be co-integrated with nanoscale CMOS technology to revolutionize conventional von Neumann as well as neuromorphic computing. In this paper, a compact CNN model based on memristors is presented along with its performance analysis and applications. In the new CNN design, the memristor bridge circuit acts as the synaptic circuit element and substitutes the complex multiplication circuit used in traditional CNN architectures. In addition, the negative differential resistance and nonlinear current–voltage characteristics of the memristor have been leveraged to replace the linear resistor in conventional CNNs. The proposed CNN design has several merits, for example, high density, nonvolatility, and programmability of synaptic weights. The proposed memristor-based CNN design operations for implementing several image processing functions are illustrated through simulation and contrasted with conventional CNNs. Monte-Carlo simulation has been used to demonstrate the behavior of the proposed CNN due to the variations in memristor synaptic weights.

A Memristor SPICE Implementation and a New Approach for Magnetic Flux-Controlled Memristor Modeling

Abstract: This paper introduces a behavior model of a memristive soild-state device for simulation with a simulation program for integrated circuits emphasis (SPICE) compatible circuit simulator. After showing the underlying functional mechanics and model equations of a memristor the SPICE equivalent circuit based on a charge controlled memristor is presented and discussed. Hereafter, a magnetic flux controlled memristor model is introduced including technical description and SPICE implementation. It is shown that the presented SPICE models meet the requirements for simulations of multi memristor circuits.

A magnetic synapse: multilevel spin-torque memristor with perpendicular anisotropy.

Abstract: Memristors are non-volatile nano-resistors which resistance can be tuned by applied currents or voltages and set to a large number of levels. Thanks to these properties, memristors are ideal building blocks for a number of applications such as multilevel non-volatile memories and artificial nano-synapses, which are the focus of this work. A key point towards the development of large scale memristive neuromorphic hardware is to build these neural networks with a memristor technology compatible with the best candidates for the future mainstream non-volatile memories. Here we show the first experimental achievement of a multilevel memristor compatible with spin-torque magnetic random access memories. The resistive switching in our spin-torque memristor is linked to the displacement of a magnetic domain wall by spin-torques in a perpendicularly magnetized magnetic tunnel junction. We demonstrate that our magnetic synapse has a large number of intermediate resistance states, sufficient for neural computation. Moreover, we show that engineering the device geometry allows leveraging the most efficient spin torque to displace the magnetic domain wall at low current densities and thus to minimize the energy cost of our memristor. Our results pave the way for spin-torque based analog magnetic neural computation.

A Floating Analog Memristor Emulator Circuit

Abstract: This brief introduces a new floating memristor emulator circuit based on second-generation current conveyors and passive elements. A mathematical model to characterize the memristor behavior was derived, showing a good accuracy among HSPICE simulations and experimental results. An analysis of the frequency behavior of the memristor is also described, showing that the frequency-dependent pinched hysteresis loop in the current-versus-voltage plane holds up to 20.2 kHz. Theoretical derivations and related results are experimentally validated through implementations from commercially available devices, and the proposed memristor emulator circuit can easily be reproducible at a low cost. Furthermore, the emulator circuit can be used as a teaching aid and for future applications with memristors, such as sensors, cellular neural networks, chaotic systems, programmable analog circuits, and nonvolatile memory devices.