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Memistor

About: Memistor is a research topic. Over the lifetime, 608 publications have been published within this topic receiving 34905 citations.


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Proceedings ArticleDOI
TL;DR: The results show that memristors can potentially be used to reduce the unit cell area, which could increase the fill factor of the photodetector in single chip detector and readout designs.
Abstract: This paper presents a memristor based unit cell design for a readout integrated circuit (ROIC). The memristor is a non-volatile nanoscale circuit component that has dynamic resistance dependent on the total charge applied between the positive and negative terminals. In the circuit presented, the memristor acts as the integrator in the unit cell. This eliminates the need for a large integrating capacitor. Simula tions demonstrate the functionality of the unit cell, where the memristor is accurately modeled according to previously pub lished device characterization data. The results show that memristors can potentially be used to reduce the unit cell area, which could increase the fill factor of the photodetector in single chip detector and readout designs. Keywords: Memristor, Photodetector, ROIC, simulation, SPICE

9 citations

Proceedings ArticleDOI
01 Nov 2015
TL;DR: Critical issues of memristor degrading the performance of neuromorphic system are presented and it is suggested that thememristor which satisfies the specification required in system is essential.
Abstract: This paper presents critical issues of memristor degrading the performance of neuromorphic system. Among possible defects of memristor, problems of sneak path and weight retention are critical for performance of memristive neuromorphic system. To solve these inherent problems, specific methods are introduced, and consequently, it is suggested that the memristor which satisfies the specification required in system is essential.

9 citations

Proceedings ArticleDOI
19 Apr 2014
TL;DR: A new Read/Write circuit design is proposed based on the Memristor as a memory element that exhibits low power consumption, short delay time, and occupying less layout area.
Abstract: The recently found Memristor is a potential candidate for the next-generation memory because of its nano-scale and non-volatile advantages. In this paper, a new Read/Write circuit design is proposed based on the Memristor as a memory element. The proposed circuit exhibits low power consumption, short delay time, and occupying less layout area. In addition, the proposed circuit has the advantage of non-destructive successive reading cycles capability.

9 citations

Journal ArticleDOI
TL;DR: In this paper, the authors introduce three evaluation criteria for memristor models, checking for plausibility of the I-V characteristics, the presence of a sufficiently non-linearity of the switching kinetics, and the feasibility of predicting the behavior of two anti-serially connected devices correctly.
Abstract: Highly accurate and predictive models of resistive switching devices are needed to enable future memory and logic design. Widely used is the memristive modeling approach considering resistive switches as dynamical systems. Here we introduce three evaluation criteria for memristor models, checking for plausibility of the I-V characteristics, the presence of a sufficiently non-linearity of the switching kinetics, and the feasibility of predicting the behavior of two anti-serially connected devices correctly. We analyzed two classes of models: the first class comprises common linear memristor models and the second class widely used non-linear memristive models. The linear memristor models are based on Strukovs initial memristor model extended by different window functions, while the non-linear models include Picketts physics-based memristor model and models derived thereof. This study reveals lacking predictivity of the first class of models, independent of the applied window function. Only the physics-based model is able to fulfill most of the basic evaluation criteria.

9 citations

Proceedings ArticleDOI
01 Dec 2011
TL;DR: It is shown that reading a memristor by a decaying voltage can balance the tradeoff between stable reading and fast writing.
Abstract: The realization of the missing forth element by HP in 2008, the memristor, which was theorized by Leon Chau in 1971, adds new promising technology that enables the continuing improvement of performance, power and cost of integrated circuits and keeping Moore's law alive. Memristor-based technology provides much better scalability, higher utilization when used as memory, and overall lower power consumption. The goal of this paper is to study the read and write behavior of memristors using mathematical and SPICE simulations. This modeling will help us understand the behavior and the stability of the memristor state especially under the repeated read process. We show in this study that reading a memristor by a decaying voltage can balance the tradeoff between stable reading and fast writing

9 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202328
202277
20212
20201
20191
201815