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Memistor

About: Memistor is a research topic. Over the lifetime, 608 publications have been published within this topic receiving 34905 citations.


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Proceedings ArticleDOI
01 Nov 2014
TL;DR: From the SPICE simulation results, it is found that the power dissipation which is driven by the triangular supply waveform is smaller as compared with the other power supplies.
Abstract: This paper reports a memory resistance (memristor) behavior for low power integrated circuit applications. The power dissipation of memristor is analyzed by using Simulation Program with Integrated Circuit Emphasis (SPICE). For power dissipation checking, the memristor is driven by some power supplies: sinusoidal, trapezoidal, triangular, and rectangle waveforms. From the SPICE simulation results, we found that the power dissipation which is driven by the triangular supply waveform is smaller as compared with the other power supplies.

4 citations

Journal ArticleDOI
TL;DR: This paper depicts a compact model of the spintronic memristor based on the magnetic-domain-wall motion mechanism that can be easily implemented in Verilog-A language, compatible to SPICE-based simulation, and beneficial to minimize the design margin of Memristor-based circuit implementations.
Abstract: The fourth fundamental passive circuit element - memristor, has received the increased attentions after a real device was demonstrated by HP Lab in 2008. The distinctive characteristic of a memristor to record the historical profile of the voltage/current through itself creates great potentials in highly integrated circuit and system design. Among all the proposed memristor structures, magnetic-based spintronic memristor becomes a promising technology for its simple structure and the compatibility to the traditional CMOS process. In this paper, we depict a compact model of the spintronic memristor based on the magnetic-domain-wall motion mechanism. Our model takes into account the variations of material parameters and fabrication process, which significantly affect the actual electrical characteristics of a memristor in nano-scale technologies. Furthermore, we present the applications of the compact model, analyze the effect of process variations on memristor electrical properties, and discuss the corresponding circuit design considerations. Our proposed compact model can be easily implemented in Verilog-A language, compatible to SPICE-based simulation, and beneficial to minimize the design margin of memristor-based circuit implementations.

4 citations

Proceedings ArticleDOI
01 Aug 2017
TL;DR: A programmable delay element (PDE) which consists of memristor resistance write circuit, read circuit and delay element is presented, and both conventional DLL and DLL with proposed PDE successfully locked input and output clock.
Abstract: Until now, only few researches have been reported in application of memristor in analog circuits, despite the actual fact that analog memristor switching (MRS) is more intriguing than digital memristor switching. In this research, potential application of memristor in analog circuit is explored. A programmable delay element (PDE) which consists of memristor resistance write circuit, read circuit and delay element is presented. Operation of proposed PDE started with write circuit to program memristor resistance and read circuit to read the current from memristor that change according to resistance. A sample/hold circuit acted as nonvolatile characteristic of actual memristor that hold memristor current when voltage supply is off. Memristor current then supplied to delay element to regulate the delays. If memristor resistance is small, current flow is large and resulting in small delay and otherwise. This is how memristor able to program the delay of PDE. Maximum and minimum memristor current achieved are 265μΑ and 197μΑ that results in delay range from 1.31ms to 1.68 ms for 167 MHz input clock. Next, a case study of proposed PDE application in delay locked loop circuit (DLL) is discussed to prove PDE functionality in more complex system. For input frequency 5MHz, both conventional DLL and DLL with proposed PDE successfully locked input and output clock. Operating frequency range of conventional DLL is 5–7(MHz), while for DLL with PDE is 3–5 (MHz). This shows comparable result of CMOS DLL and DLL with PDE.

4 citations

Proceedings ArticleDOI
01 Nov 2014
TL;DR: A hybrid combination of CMOS (Complimentary Metal-oxide Semiconductors) and the memristor is presented to design a non-volatile load 4-Transistor (4T) Static Random Access Memory (SRAM) cell for Low Power applications.
Abstract: Introduction to Memristor and Memristive devices in VLSI design and electronics add new features to both analog and digital circuit design. Memristor finds applications in different fields like memories with a non-volatile behaviour (NVRAM-Non-Volatile Random Access Memory), neural networks, robotics to mimic biological entities, Low-power and remote sensing applications, Analog computation and circuit Applications, Crossbar Latches, and Programmable Logic and Signal Processing. The basic property of Memristors is data storage, i.e. it serves as a memory element. This paper presents a hybrid combination of CMOS (Complimentary Metal-oxide Semiconductors) and the memristor to design a non-volatile load 4-Transistor (4T) Static Random Access Memory (SRAM) cell for Low Power applications. By combining the flexibility of MOS devices and the non-volatility of Memristors, storage circuitry shows potential to realize highly power-efficient and non-volatile storage systems. Memristor is a non-volatile element that memorizes the amount of charge passed through it while storing the information in the form of resistance. Simulations demonstrate the utility and functionality of the circuitry, where the memristor is precisely modeled using CAD tools. Simulation results are performed on Cadence virtuoso tool at 45nm technology. The results show that the proposed SRAM cell has the optimized results at a resistance of 10MΩ. The proposed circuit has Static Power (4.89×10−9 Watts), Dynamic Power (5.09×10−8 Watts) and Average Power (2.79×10−8 Watts).

4 citations

Proceedings ArticleDOI
01 Nov 2015
TL;DR: In this paper, the authors proposed the designs of various functional blocks like multiplexers, encoders and decoders using the hybrid memristor structure, with analyses regarding their design complexities.
Abstract: The memristor device has emerged as the missing fourth fundamental circuit element after resistor, inductor and capacitor. Various implementations of memristors have been reported, with the one using a TiO2 layer sandwiched between two platinum electrodes considered to be most promising. Because of its very small feature sizes and low power consumption, it is projected to replace CMOS technology in several application areas. Various memory and logic design styles using memristors have been reported. A hybrid technology that combines memristors with CMOS gates is promising, and can be fabricated on the same silicon wafer. The present paper proposes the designs of various functional blocks like multiplexers, encoders and decoders using the hybrid memristor structure, with analyses regarding their design complexities. The design methodology is general, and can be used to synthesize arbitrary functional blocks as well.

4 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202328
202277
20212
20201
20191
201815