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Memistor

About: Memistor is a research topic. Over the lifetime, 608 publications have been published within this topic receiving 34905 citations.


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Patent
28 Apr 2015
TL;DR: In this paper, a memristor apparatus with variable transmission delay is presented, in which the capacitance of the capacitor is connected between the first memristors and the transistor, and the application of a reading voltage across the second memrisor is delayed by a time period equivalent to the programmed resistance level of the first and capacitance.
Abstract: In an example, a memristor apparatus with variable transmission delay may include a first memristor programmable to have one of a plurality of distinct resistance levels, a second memristor, a transistor connected between the first memristor and the second memristor, and a capacitor having a capacitance, in which the capacitor is connected between the first memristor and the transistor. In addition, application of a reading voltage across the second memristor is delayed by a time period equivalent to the programmed resistance level of the first memristor and the capacitance of the capacitor.

3 citations

Proceedings ArticleDOI
01 Dec 2015
TL;DR: A compact model of the spintronic memristor based on the magnetic-domain-wall motion mechanism is described to optimize the yield of the Spintronic Memristor-based memory arrays.
Abstract: The missing fourth passive essential circuit element-memristor enticed a big attention after HP labs evolved the first memristor device in 2008. Aside from the solid-state thin film memristor device, spintronic memristor was also feigned based on the magnetic technology. As it is at nano-scale geometry size, the memristor device suffers from the process variations in the fabrication process. Process variations swerve the actual electrical behavior of memristors from the desired values. This deviation results reduce the yield particularly in the memristor-based memory design. Therefore, it is serious to understand and distinguish the impact of process variations on memristor performance and yield and attempt to optimize the yield of the spintronic memristor-based memory arrays. In this paper, we describe a compact model of the spintronic memristor based on the magnetic-domain-wall motion mechanism.

3 citations

Proceedings ArticleDOI
01 Dec 2015
TL;DR: The model of memristor described in the paper is designed for building models of large networks for analog computations, and a benchmark circuit for testing the applications of various complexities confirms a perfect operation of the model.
Abstract: The model of memristor described in the paper is designed for building models of large networks for analog computations. A circuit containing thousands of memristors for finding the shortest path in a complicated maze is a typical example. The model is designed to meet the following criteria: 1. It is a model of HP memristor with linear dopant drift while respecting the physical bounds of the internal state variable. 2. Reliable operation in the SPICE environment also when simulating extremely large networks. 3. Minimization of the simulation time while computing bias points and during transient analyses. A benchmark circuit for testing the applications of various complexities is presented. The results confirm a perfect operation of the model also in applications containing thousands of memristors.

3 citations

Proceedings ArticleDOI
14 Nov 2013
TL;DR: In this paper, the authors investigated two and three memistor circuits to elucidate the origin and nature of these rich dynamics, and found that the distinctive switching spikes seen in single memristor circuits can be suppressed in networks of memristors.
Abstract: The distinctive switching spikes seen in single memristor circuits can be suppressed in networks of memristors. Instead oscillatory behaviour interrupted by spontaneous irregular bursting spike patterns are observed. An investigation of two and three memistor circuits was undertaken to elucidate the origin and nature of these rich dynamics. No spiking or oscillations are seen in circuits where all the memristors are arranged with matching polarity. Spiking is seen in circuits where memristors are arranged anti-parallel. These dynamics may be due to increased sensitivity to initial conditions or deterministic chaos and are potentially useful for neuromorphic computing.

3 citations

Posted Content
TL;DR: This article proposes a frequency dependent rectifier memristor bridge for different purposes and describes the circuit theory and shows that the Picard Iteration is one possibility to solve the system of nonlinear state equations of Memristor circuits analytically.
Abstract: Reasoned by its dynamical behavior, the memristor enables a lot of new applications in analog circuit design. Since some realizations are shown (e.g. 2007 by Hewlett Packard), the development of applications with memristors becomes more and more interesting. Whereas most of the research was done in the direction of memristor applications in neural networks and storage devices, less publications deal with practical applications of analog memristive circuits. But this topic is also promising further applications. Therefore, this article proposes a frequency dependent rectifier memristor bridge for different purposes (e.g. using as a programmable synaptic membrane voltage generator for Spike-Time-Dependent-Plasticity) and describes the circuit theory. In this context it is shown that the Picard Iteration is one possibility to solve the system of nonlinear state equations of memristor circuits analytically. An intuitive picture of how a memristor works in a network in general is given as well. In this context some research on the dynamical behavior of a HP memristor should be done.

3 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202328
202277
20212
20201
20191
201815