Showing papers on "Memory management published in 1972"

The Multics virtual memory: concepts and design

Abstract: As experience with use of on-line operating systems has grown, the need to share information among system users has become increasingly apparent. Many contemporary systems permit some degree of sharing. Usually, sharing is accomplished by allowing several users to share data via input and output of information stored in files kept in secondary storage. Through the use of segmentation, however, Multics provides direct hardware addressing by user and system programs of all information, independent of its physical storage location. Information is stored in segments each of which is potentially sharable and carries its own independent attributes of size and access privilege.Here, the design and implementation considerations of segmentation and sharing in Multics are first discussed under the assumption that all information resides in a large, segmented main memory. Since the size of main memory on contemporary systems is rather limited, it is then shown how the Multics software achieves the effect of a large segmented main memory through the use of the Honeywell 645 segmentation and paging hardware.

The page fault frequency replacement algorithm

Abstract: Dynamic memory management is an important advance in memory allocation especially in virtual memory and multiprogramming systems. In this paper we consider the case of paged memory systems: that is, the physical and logical address space of these systems is partitioned into equal size blocks of contiguous addresses. The paged memory system has been used by many computer systems. However, the basic memory management problem of deciding which pages should be kept in the main memory to allow efficient operation without wasting space is still not sufficiently understood and has been of considerable interest. Obviously, pages should only be removed from the main memory if there is a very low probability that they will be used in the near future. The difficulty lies in trying to determine which pages to remove, without incurring difficult implementation problems at the same time.

A study of storage partitioning using a mathematical model of locality

Abstract: Both fixed and dynamic storage partitioning procedures are examined for use in multiprogramming systems. The storage requirement of programs is modeled as a stationary Gaussian process. Experiments justifying this model are described. By means of this model dynamic storage partitioning is shown to provide substantial increases in storage utilization and operating efficiency over fixed partitioning.

Micro-program having an overlay micro-instruction

Abstract: There is described a micro-programmed data processor having, in addition to the main memory, a memory for currently used strings of micro-operators in which any portion of the latter memory can be overlayed from main memory by a unique micro-instruction that is handled as one more micro step in whatever micro-string is being executed. Once the overlay is complete, the next micro-operation in sequence is executed. This micro-operator may be from the previously stored micro-operator string or from the overlayed instructions, depending upon where the overlay is positioned in the memory.

Memory and program protection system for a digital computer system

Abstract: A small size digital computer system is designed so that a hardware memory violation protect subsystem may be added to the computer system as a hardware option. The memory protect subsystem includes hardware which may operate in parallel with the digital computer system memory subsystem and which monitors each attempt to alter data within the memory subsystem. Any attempt to alter data within a protected region may be defeated. Following such an attempt, program execution is interrupted and program control is transferred to the computer system executive software. The computer system is also designed so that it may either modify or prevent the execution of certain instructions at times when the memory protect subsystem is in operation so as to defeat all attempts on the part of any software entity to destroy the integrity of the operating system.

On modeling program behavior

Abstract: This is a paper about the history of the working set model for program behavior. It traces briefly the origins and bases of the idea and some of the results subsequently obtained. The physical context is a hierarchical memory system consisting of a severely limited quantity of main (directly-addressable) storage and an essentially unlimited quantity of secondary (backup) storage. In this context, the intuitive notion of "working information" as the set of words which are (or should be) loaded in main memory at any given time in order that a program may operate efficiently is as old as programming itself. The sharply increased interest in program models since the mid-1960s is a direct consequence of the widening use of virtual memory and multiprogramming techniques, which have shifted the responsibility of memory management from programmers to machines. I am assuming here that the purpose of memory management is ensuring that an active program's working information is present in main memory, and the purpose of a program model is providing a basis for determining a program's working information at a given time and predicting what it will be at a future time.

Dynamic Memories with Enhanced Data Access

Abstract: Dynamic memories are commonly constructed as circulating shift registers, and thus have access times that are proportional to the size of memory. When each word in a dynamic memory is connected to r words, r ? 2, access time can be proportional to the base r logarithm of the size of memory. A memory that achieves minimum access time for r = 2 is described. The memory can also be operated in an efficient binary search mode. Slight variations of the interconnection patterns lead to a memory that is well suited for FFT and certain matrix computations.

Demand paging through utilization of working sets onr the MANIAC II

Abstract: A hardware implementatio~ on the Maniac II computer of the s.orking set model fur demand paging, as intr~duced by Denning, is discussed. Characteristics of the Maniac II are given, along wi~th a description of the basic demand paging scheme and the associative memory which has hee~ added to the Maniac 1I hardware. Finally, a description of the hardware design for impiementati(m of ~he working s~t model is discussed and a specification of the actions taken under ~arious conditions which may ar i~ during the operation of the full working set mode|, demand ~aging system is given.

Memory system restoration

Abstract: Restoration of information in a memory of the type requiring periodic restoration to maintain viability of the information is carried out in a manner dependent on the relative need of memory cells in the memory for restoration. This system includes an array of memory cells in which the stored information must be restored periodically to maintain its viability. Means for accessing the memory cells in the array desirably accomplishes a restoration of a memory cell each time it is accessed. Means for determining a priority list of the memory cells in the array for restoration does so in an order substantially dependent on the relative need of the memory cells for restoration. Means are provided for restoring the memory cells sequentially in the absence of a requested access to the memory array in accordance with the priority list established by the priority list determining means. In this manner, a memory requiring, e.g., 50 percent of its operating time for restoration may be available 90 or even 100 percent of the time a requested access is made.

Garbage collection for virtual memory computer systems

Abstract: In list processing there is typically a growing demand for space during program execution. This paper examines the practical implications of this growth within a virtual memory computer system, proposes two new garbage collection techniques for virtual memory systems, and compares them with traditional methods by discussion and by simulation.

A model of memory contention in a paging machine

Abstract: This paper is concerned with certain aspects of contention for main memory resources in a multiprogrammed computer system operating under demand paging. In the model presented, the number of page-frames of main memory allocated to a problem program varies in time. These changes in memory configuration are represented explicitly in the model, CPU requirements and page exception characteristics of program material being described statistically. Expressions for the distribution of the number of page-frames allocated to an executing program, the long run expected fraction of a program's execution time in a given number of page-frames, and the average execution interval of the multi-programmed load are obtained. It is pointed out heuristically and demonstrated numerically that an increase is obtainable in the average execution interval of the multiprogrammed load over that resulting from equal fixed partitioning of main memory.

An Adaptive Replacement Algorithm for Paged-Memory Computer Systems

Abstract: A general class of adaptive replacement schemes for use in paged memories is developed. One such algorithm, called SIM, is simulated using a probability model that generates memory traces, and the results of the simulation of this adaptive scheme are compared with those obtained using the best nonlookahead algorithms. A technique for implementing this type of adaptive replacement algorithm with state of the art digital hardware is also presented.

Adaptive Signal Detection with Finite Memory

Abstract: The purpose of this presentation is to develop and evaluate an algorithm for determining a finite memory detector applicable to statistical signal detection theory. In the Bayesian signal detection theory, infinite soft or changeable memory is tacitly assumed. Since an infinite memory is physically unrealizable, this study postulates a finite memory scheme which is applicable to a large class of signal detection problems. A general sequentially operating finite memory detector design is obtained and then evaluated for the signal known exactly and the signal known except amplitude problems. Detection performance as a function of memory size is presented for finite observation records using the receiver operating characteristic and plots of probability of decision error versus time. These results show the tradeoff between memory size and processing time to achieve a given detection performance. An important result is that for finite sample records a small finite memory detector with a memory size on the order of 7 states, i.e., a 3-bit computer word, yields detection performance very near that of the optimum infinite memory detector.

Multiplexed memory request interface

Abstract: A multiplexed memory request interface capable of staging one memory access request while an immediately previously received memory access address request is being received and processed in the memory, and employing a common memory access path and other common circuitry for both address requests.

Virtual memories for mini-computers

Abstract: This paper is concerned with the application and implementation of virtual memory systems on mini-computers. The system constraints and their effect on the design parameters are discussed in detail and a general design philosophy is developed. A specific implementation, both software and hardware, of a virtual memory system on a PDP-11/20 is described. The final system makes a machine with 8K of core and a small disk appear to the user as an off-the-shelf 32K computer with the capability of banking as many 32K sections as the disk can support. Memory protection is also available.