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Memory management

About: Memory management is a research topic. Over the lifetime, 16743 publications have been published within this topic receiving 312028 citations. The topic is also known as: memory allocation.


Papers
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01 Sep 1991
TL;DR: A memory management toolkit for language implementors that offers efficient and flexible generation scavenging garbage collection and includes auxiliary compo- nents that east implementation of garbage collection for programming languages.
Abstract: We describe a memory management toolkit for language implementors. It offers efficient and flexible generation scavenging garbage collection. In addition to providing a core of language-independent algorithms and data structures, the toolkit includes auxiliary compo- nents that east implementation of garbage collection for programming languages. We have detailed designs for Smalltalk and Modula-3 and are confident the toolkit can be used with a wide variety of languages. The toolkit approach is itself novel, and our design includes a number of additional innovations in flexibility, efficiency, accuracy, and cooperation between the compiler and the collector.

72 citations

Patent
Shai Traister1, Jason Lin1
04 Aug 2006
TL;DR: In this article, a non-volatile memory storage system is described, which includes a memory configured to store a storage system firmware and a nonvolatile cell array configured to maintain a buffer.
Abstract: A non-volatile memory storage system is provided. The non-volatile memory storage system includes a memory configured to store a storage system firmware and a non-volatile memory cell array configured to maintain a buffer. A processor in communication with the memory and the non-volatile memory cell array also is included in the non-volatile memory storage system. Here, the processor is configured to execute the storage system firmware stored in the memory. The storage system firmware comprises program instructions for receiving a write command to write data to the non-volatile memory cell array. The write command is allocated a timeout period to complete an execution of the write command. The storage system firmware also comprises program instructions for performing a portion of a garbage collection operation within the timeout period and for storing the data in the buffer.

72 citations

Proceedings ArticleDOI
12 Oct 2018
TL;DR: This paper focuses on analyzing and organizing the extensive body of literature on near- memory computing across various dimensions: starting from the memory level where this paradigm is applied, to the granularity of the application that could be executed on the near-memory units.
Abstract: The conventional approach of moving stored data to the CPU for computation has become a major performance bottleneck for emerging scale-out data-intensive applications due to their limited data reuse. At the same time, the advancement in integration technologies have made the decade-old concept of coupling compute units close to the memory (called Near-Memory Computing) more viable. Processing right at the "home" of data can completely diminish the data movement problem of data-intensive applications. This paper focuses on analyzing and organizing the extensive body of literature on near-memory computing across various dimensions: starting from the memory level where this paradigm is applied, to the granularity of the application that could be executed on the near-memory units. We highlight the challenges as well as the critical need of evaluation methodologies that can be employed in designing these special architectures. Using a case study, we present our methodology and also identify topics for future research to unlock the full potential of near-memory computing.

72 citations

Proceedings ArticleDOI
05 Sep 2001
TL;DR: This paper presents a unified Floyd-Hoare Logic inspired region type system for reasoning about and inferring region-based memory management, using a sublanguage of imperative region commands and describes automatic inference of region commands that give consistently better memory performance as existing inference techniques.
Abstract: Region-based memory management can be used to control dynamic memory allocations and deallocations safely and efficiently. Existing (direct-style) region systems that statically guarantee region safety---no dereferencing of dangling pointers---are based on refinements of Tofte and Talpin's seminal work on region inference for managing heap memory in stacks of regions.We present a unified Floyd-Hoare Logic inspired region type system for reasoning about and inferring region-based memory management, using a sublanguage of imperative region commands. Our system expresses and performs control-sensitive region management without requiring a stack discipline for allocating and deallocating regions. Furthermore, it captures storage mode analysis and late allocation/early deallocation analysis in a single, expressive, unified logical framework. Explicit region aliasing in combination with reference-counted regions provides flexible, context-sensitive early memory deallocation and simultaneously dispenses with the need for an integrated region alias analysis.In this paper we present the design of our region type system, illustrate its practical expressiveness, compare it to existing region analyses, demonstrate how this eliminates the need for previously required source code rewritings for good memory performance, and describe automatic inference of region commands that give consistently better (or at least equally good) memory performance as existing inference techniques.

72 citations

Journal ArticleDOI
Ramzi Mahmoudi1, Mohamed Akil1
TL;DR: In this paper, the authors presented an enhanced computation method for smoothing 2D object in binary case, which provides a parallel computation and better memory management, while preserving the topology of the original image by using homotopic transformations defined in the framework of digital topology.
Abstract: To prepare images for better segmentation, we need preprocessing applications, such as smoothing, to reduce noise. In this paper, we present an enhanced computation method for smoothing 2D object in binary case. Unlike existing approaches, proposed method provides a parallel computation and better memory management, while preserving the topology (number of connected components) of the original image by using homotopic transformations defined in the framework of digital topology. We introduce an adapted parallelization strategy called split, distribute and merge (SDM) strategy which allows efficient parallelization of a large class of topological operators. To achieve a good speedup and better memory allocation, we cared about task scheduling and managing. Distributed work during smoothing process is done by a variable number of threads. Tests on 2D grayscale image (512*512), using shared memory parallel machine (SMPM) with 8 CPU cores (2 Xeon E5405 running at frequency of 2 GHz), showed an enhancement of 5.2 with cache success rate of 70%.

72 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202333
202288
2021629
2020467
2019461
2018591