Showing papers on "Memristor published in 2010"
TL;DR: A nanoscale silicon-based memristor device is experimentally demonstrated and it is shown that a hybrid system composed of complementary metal-oxide semiconductor neurons and Memristor synapses can support important synaptic functions such as spike timing dependent plasticity.
Abstract: A memristor is a two-terminal electronic device whose conductance can be precisely modulated by charge or flux through it. Here we experimentally demonstrate a nanoscale silicon-based memristor device and show that a hybrid system composed of complementary metal−oxide semiconductor neurons and memristor synapses can support important synaptic functions such as spike timing dependent plasticity. Using memristors as synapses in neuromorphic circuits can potentially offer both high connectivity and high density required for efficient computing.
3,650 citations
TL;DR: Bipolar voltage-actuated switches, a family of nonlinear dynamical memory devices, can execute material implication (IMP), which is a fundamental Boolean logic operation on two variables p and q such that pIMPq is equivalent to (NOTp)ORq.
Abstract: The authors of the International Technology Roadmap for Semiconductors-the industry consensus set of goals established for advancing silicon integrated circuit technology-have challenged the computing research community to find new physical state variables (other than charge or voltage), new devices, and new architectures that offer memory and logic functions beyond those available with standard transistors. Recently, ultra-dense resistive memory arrays built from various two-terminal semiconductor or insulator thin film devices have been demonstrated. Among these, bipolar voltage-actuated switches have been identified as physical realizations of 'memristors' or memristive devices, combining the electrical properties of a memory element and a resistor. Such devices were first hypothesized by Chua in 1971 (ref. 15), and are characterized by one or more state variables that define the resistance of the switch depending upon its voltage history. Here we show that this family of nonlinear dynamical memory devices can also be used for logic operations: we demonstrate that they can execute material implication (IMP), which is a fundamental Boolean logic operation on two variables p and q such that pIMPq is equivalent to (NOTp)ORq. Incorporated within an appropriate circuit, memristive switches can thus perform 'stateful' logic operations for which the same devices serve simultaneously as gates (logic) and latches (memory) that use resistance instead of voltage or charge as the physical state variable.
1,642 citations
TL;DR: This work has demonstrated experimentally the formation of associative memory in a simple neural network consisting of three electronic neurons connected by two memristor-emulator synapses and opens up new possibilities in the understanding of neural processes using memory devices.
840 citations
TL;DR: An approach to use memristors (resistors with memory) in programmable analog circuits in which low voltages are applied to memristor during their operation as analog circuit elements and high voltage are used to program the Memristor's states.
Abstract: We suggest an approach to use memristors (resistors with memory) in programmable analog circuits. Our idea consists in a circuit design in which low voltages are applied to memristors during their operation as analog circuit elements and high voltages are used to program the memristor's states. This way, as it was demonstrated in recent experiments, the state of memristors does not essentially change during analog mode operation. As an example of our approach, we have built several programmable analog circuits demonstrating memristor-based programming of threshold, gain and frequency. In these circuits the role of memristor is played by a memristor emulator developed by us.
553 citations
TL;DR: A practical implementation of a memristor based chaotic circuit that employs the four fundamental circuit elements — the resistor, capacitor, inductor and the Memristor using off-the-shelf components is provided.
Abstract: This paper provides a practical implementation of a memristor based chaotic circuit. We realize a memristor using off-the-shelf components and then construct the memristor along with the associated chaotic circuit on a breadboard. The goal is to construct a physical chaotic circuit that employs the four fundamental circuit elements — the resistor, capacitor, inductor and the memristor. The central concept behind the memristor circuit is to use an analog integrator to obtain the electric flux across the memristor and then use the flux to obtain the memristor's characterstic function.
522 citations
TL;DR: A chaotic attractor has been observed with an autonomous circuit that uses only two energy-storage elements: a linear passive inductor and alinear passive capacitor and a nonlinear active memristor.
Abstract: A chaotic attractor has been observed with an autonomous circuit that uses only two energy-storage elements: a linear passive inductor and a linear passive capacitor. The other element is a nonlinear active memristor. Hence, the circuit has only three circuit elements in series. We discuss this circuit topology, show several attractors and illustrate local activity via the memristor's DC vM - iM characteristic.
440 citations
TL;DR: A new simulation program with integrated circuit emphasis macromodel of the recently physically implemented memristor, which provides a solution for the modeling of boundary conditions following exactly the published mathematical model of HP Labs.
Abstract: In this paper, we present a new simulation program with integrated circuit emphasis macromodel of the recently physically implemented memristor. This macromodel could be a powerful tool for electrical engineers to design and experiment new circuits with memristors. Our simulation results show similar behavior to the already published measurements of the physical implementation. Our approach provides a solution for the modeling of boundary conditions following exactly the published mathematical model of HP Labs. The functionality of our macromodel is demonstrated with computer simulations. The source code of our macromodel is provided.
249 citations
TL;DR: In this article, the authors report on nanoscale resistive memory devices that exhibit diodelike I-V characteristics at on-state with reverse bias current suppressed to below 10−13 A and rectifying ratio >106.
Abstract: We report studies on nanoscale resistive memory devices that exhibit diodelike I-V characteristics at on-state with reverse bias current suppressed to below 10−13 A and rectifying ratio >106 The intrinsic diodelike characteristics are robust during device operation and can survive >108 write/erase programming cycles The devices can be programmed at reduced programming voltages compared to earlier studies without the initial high-voltage forming process Multibit storage capability was also reported The intrinsic diode characteristics provide a possible solution to suppress crosstalk in high-density crossbar memory or logic arrays particularly for those based on bipolar resistive switches (memristors)
230 citations
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TL;DR: In this paper, a Memristor resistor-based Content Addressable Memory (CAM) architecture is proposed, which uses a combination of memristor MOS devices to form the core of a memory/compare logic cell that forms the building block of the CAM architecture.
Abstract: Large-capacity Content Addressable Memory (CAM) is a key element in a wide variety of applications. The inevitable complexities of scaling MOS transistors introduce a major challenge in the realization of such systems. Convergence of disparate technologies, which are compatible with CMOS processing, may allow extension of Moore's Law for a few more years. This paper provides a new approach towards the design and modeling of Memristor (Memory resistor) based Content Addressable Memory (MCAM) using a combination of memristor MOS devices to form the core of a memory/compare logic cell that forms the building block of the CAM architecture. The non-volatile characteristic and the nanoscale geometry together with compatibility of the memristor with CMOS processing technology increases the packing density, provides for new approaches towards power management through disabling CAM blocks without loss of stored data, reduces power dissipation, and has scope for speed improvement as the technology matures.
225 citations
TL;DR: In this article, compact models for memristors are developed based on the fundamental constitutive relationships between charge and flux of the memristor, with a few simple steps, and implemented in circuit simulators, including SPICE, Verilog-A, and Spectre.
Abstract: This paper introduces compact models for memristors. The models are developed based on the fundamental constitutive relationships between charge and flux of memristors. The modeling process, with a few simple steps, is introduced. For memristors with limited resistance ranges, a simple method to find their constitutive relationships is discussed, and examples of compact models are shown for both current-controlled and voltage-controlled memristors. Our models satisfy all of the memristor properties such as frequency dependent hysteresis behaviors and also unique boundary assurance to simulate memristors whether they behave memristively or resistively. Our models are implementable in circuit simulators, including SPICE, Verilog-A, and Spectre.
217 citations
TL;DR: A numerical solution of the fractional-order memristor-based Chua's equations is derived for simulations and the dynamical behavior and stability analysis of this system are described and investigated.
Abstract: This express brief deals with the memristor-based Chua's circuit. For the first time, the fractional-order model for such system is presented. A numerical solution of the fractional-order memristor-based Chua's equations is derived for simulations. The dynamical behavior and stability analysis of this system are described and investigated as well.
18 Jul 2010
TL;DR: A simplified mathematical model is proposed to characterize the pinched hysteretic feature of the memristor, amemristor-based recurrent neural network model is given, and its global stability is studied.
Abstract: Memristor is a newly prototyped nonlinear circuit device. Its value is not unique and changes according to the value of the magnitude and polarity of the voltage applied to it. In this paper, a simplified mathematical model is proposed to characterize the pinched hysteretic feature of the memristor, a memristor-based recurrent neural network model is given, and its global stability is studied. Using differential inclusion, two sufficient conditions for the global uniform asymptotic stability of memristor-based recurrent neural networks are obtained.
TL;DR: The memristor is reviewed and mathematical and SPICE models for memristors are provided, including Chua’s arguments based on electromagnetic theory, which provide new paradigms in application-specific integrated circuits and field programmable gate arrays.
Abstract: In 2008, researchers at the HewlettPackard (HP) laboratories published a paper in Nature reporting the development of a new basic circuit element that completes the missing link between charge and ...
TL;DR: This work experimentally demonstrates an adaptive filter by placing a memristor into an LC contour, and extends the learning-circuit framework mathematically to include memory-reactive elements, such as memcapacitors and meminductors, and shows how this expands the functionality of adaptive memory filters.
Abstract: Using the memristive properties of vanadium dioxide, we experimentally demonstrate an adaptive filter by placing a memristor into an LC contour. This circuit reacts to the application of select frequency signals by sharpening the quality factor of its resonant response, and thus “learns” according to the input waveform. The proposed circuit employs only analog passive elements, and may find applications in biologically inspired processing and information storage. We also extend the learning-circuit framework mathematically to include memory-reactive elements, such as memcapacitors and meminductors, and show how this expands the functionality of adaptive memory filters.
29 Mar 2010
TL;DR: This paper considers using memristors to implement the neighborhood connections of a CNN by improving an existing memristor model and implementing a new model implemented in the SPICE simulation environment.
Abstract: In this paper we consider using memristors to implement the neighborhood connections of a CNN. First the benefits and drawbacks of using memristors as programmable CNN weights are described. Then, an existing memristor model is improved to allow full-scale simulation of the design. The new model is implemented in the SPICE simulation environment and is not restricted to CNN applications. Then, the CNN cell design is presented and simulations describing memristor programming are performed.
TL;DR: In this paper, a memristor based oscillator is presented, which generates a steady periodic orbit and has a transition from transient chaotic to steady periodic behaviour, but the complicated dynamical behaviour is extremely dependent on the initial condition of the Memristor.
Abstract: By replacing Chua's diode in the canonical Chua's oscillator with a smooth flux-controlled memristor, a memristor based oscillator is presented. The memristor oscillator generates a steady periodic orbit and has a transition from transient chaotic to steady periodic behaviour. The complicated dynamical behaviour is extremely dependent on the initial condition of the memristor.
TL;DR: Memory effects are ubiquitous in nature and the class of memory circuit elements - which includes memristors, memcapacitors and meminductors - shows great potential to understand and simulate the associated fundamental physical processes as discussed by the authors.
Abstract: Memory effects are ubiquitous in nature and the class of memory circuit elements - which includes memristors, memcapacitors and meminductors - shows great potential to understand and simulate the associated fundamental physical processes. Here, we show that such elements can also be used in electronic schemes mimicking biologically-inspired computer architectures, performing digital logic and arithmetic operations, and can expand the capabilities of certain quantum computation schemes. In particular, we will discuss few examples where the concept of memory elements is relevant to the realization of associative memory in neuronal circuits, spike-timing-dependent plasticity of synapses, digital and field-programmable quantum computing.
TL;DR: In this article, a memristor emulator has been used to demonstrate the connection between resistors with memory and meminductors, showing a useful and interesting connection between the three memory elements.
Abstract: Electronic circuits with memristors (resistors with memory) that operate as memcapacitors (capacitors with memory) and meminductors (inductors with memory) are proposed. Using a memristor emulator, the suggested circuits have been built and their operation has been demonstrated, showing a useful and interesting connection between the three memory elements.
13 Jun 2010
TL;DR: Two parameters are introduced to measure the fluctuation of the overall internal state (or the resistance) of a Memristor under the impact of process variations and Monte-Carlo simulations are conducted to evaluate the device mismatch effects in the memristor-based memory.
Abstract: The memristor, known as the fourth basic two-terminal circuit element, has attracted many research interests since the first real device was developed by HP labs in 2008. The nano-scale memristive device has the potential to construct some novel computing systems because of its distinctive characters, such as non-volatility, non-linearity, low-power, and good scalability. These electrical characteristics of memristors are mainly determined by the material characteristic and the fabrication process. For example, process variations may cause the deviation of the actual electrical behavior of memristors from the original design and result in the malfunction of the device. Therefore, it is very important to understand and characterize the impact of process variations on the electrical behaviors of the memristor and its implication to the circuit design. In this paper, we analyze the impact of the geometry variations on the electrical characteristics of the memristor. Two parameters - NARD (Normalized Accumulative Resistance Deviation) and NAARD (Normalized Accumulative Absolute Resistance Deviation), are introduced to measure the fluctuation of the overall internal state (or the resistance) of a memristor under the impact of process variations. Based on our analysis, Monte-Carlo simulations are conducted to evaluate the device mismatch effects in the memristor-based memory.
29 Mar 2010
TL;DR: The write-in (programming) circuit and the readout/restoration circuit which share the information storing technique using the reference resistance array by forcing the memristor to stick at a set of predetermined fixed reference resistance values.
Abstract: A method to utilize the memristor as a multilevel memory has been proposed. There are several roadblocks in the practical use of memristors for multilevel memory. A difficulty comes from the nonlinearity in the ? vs. q curve which makes it difficult to determine the proper pulse width for desired resistance values. Another one comes from the property of the memristor which integrates any kind of signals including noise that appeared at the memristor and causes memristors to be perturbed from their original values. The proposed method enables the memristor to be used as multilevel memory using a reference resistance array by forcing the memristor to stick at a set of predetermined fixed reference resistance values. We propose the write-in (programming) circuit and the readout/restoration circuit which share the information storing technique using the reference resistance array.
TL;DR: In this article, a new smooth memristor oscillator was derived from Chua's oscillator by replacing the diode with a flux-controlled memristors and a negative conductance.
Abstract: This paper presents a new smooth memristor oscillator, which is derived from Chua's oscillator by replacing Chua's diode with a flux-controlled memristor and a negative conductance. Novel parameters and initial conditions are dependent upon dynamical behaviours such as transient chaos and stable chaos with an intermittence period and are found in the smooth memristor oscillator. By using dynamical analysis approaches including time series, phase portraits and bifurcation diagrams, the dynamical behaviours of the proposed memristor oscillator are effectively investigated in this paper.
TL;DR: The characteristics, structures and relations for the invented hp's memristor are briefly reviewed, two general SPICE models for the charge-controlled and flux-controlled memristors are introduced for the first time and circuit simulations are done and the results are presented.
Abstract: Memristor had been first theorized nearly 40 years ago by Prof. Chua, as the fourth fundamental circuit element beside the three existing elements (Resistor, Capacitor and Inductor) but because no one has succeeded in building a memristor, it has long remained a theoretical element. Some months ago, Hewlett-Packard (hp) announced it created a memristor using a TiO2/TiO2-X structure. In this paper, the characteristics, structures and relations for the invented hp's memristor are briefly reviewed and then two general SPICE models for the charge-controlled and flux-controlled memristors are introduced for the first time. By adjusting the model parameters to the hp's memristor characteristics some circuit properties of the device are studied and then two important memristor applications as the memory cell in a nonvolatile-RAM structure and as the synapse in an artificial neural network are studied. By utilizing the introduced models and designing the appropriate circuits for two most important applications; a nonvolatile memory structure and a programmable logic gate, circuit simulations are done and the results are presented.
TL;DR: The status and continuing scaling trends of the flash memory are discussed and a detailed discussion on technologies trying to replace flash in the near-term is provided.
Abstract: This article reviews the current status and future prospects for the use of nanomaterials and devices in memory technology. First, the status and continuing scaling trends of the flash memory are discussed. Then, a detailed discussion on technologies trying to replace flash in the near-term is provided. This includes phase change random access memory, Fe random access memory and magnetic random access memory. The long-term nanotechnology prospects for memory devices include carbon-nanotube-based memory, molecular electronics and memristors based on resistive materials such as TiO(2).
TL;DR: With this technique, arrays of TiO(2)-based memristive devices were fabricated that did not require electrical forming and were operated with nanoampere currents.
Abstract: We demonstrate a technique to fabricate memristor cross-point arrays using a self-aligned, one step nanoimprint lithography process that simultaneously patterns the bottom electrode, switching material film and the top electrode. Since this process does not require overlay alignment, the fabrication complexity is greatly reduced and the throughput is significantly increased. The critical interfaces are exposed to much less contamination and thus under better chemical control. With this technique, we fabricated arrays of TiO2-based memristive devices (junction area 100 nm by 100 nm) that did not require electrical forming and were operated with nanoampere currents.
16 May 2010
TL;DR: This work describes the design of a multilevel memristor memory (MLMM) system, and the design constraints imposed in the realization of such a memory.
Abstract: With technology migration into nano and molecular scales several hybrid CMOS/nano logic and memory architectures have been proposed thus far that aim to achieve high device density with low power consumption. The discovery of the memristor has further enabled the realization of denser nanoscale logic and memory systems. This work describes the design of such a multilevel memristor memory (MLMM) system, and the design constraints imposed in the realization of such a memory. In particular, the limitations on load, bank size, number of bits achievable per device, placed by the required noise margin (NM) for accurately reading the data stored in a device are analyzed.
TL;DR: In this article, a recently published circuit that operates as a memcapacitor (MC), utilising a memristor (MR) emulator, is analyzed with a confirmation that it simulates MC only approximately.
Abstract: A recently published circuit that operates as a memcapacitor (MC), utilising a memristor (MR) emulator, is analysed with a confirmation that it simulates MC only approximately. A MR to MC mutator is designed by means of off-the-shelf circuits. The SPICE analysis confirms that this circuit transforms exactly the constitutive relation of MR into the constitutive relation of MC.
01 Dec 2010
TL;DR: In this article, a simple mathematical model of Memristors characterized by linear dopant drift for sinusoidal input voltage, showing a high matching with the nonlinear SPICE simulations is derived.
Abstract: Since the fourth fundamental element (Memristor) became a reality by HP labs, and due to its huge potential, its mathematical models became a necessity. In this paper, we provide a simple mathematical model of Memristors characterized by linear dopant drift for sinusoidal input voltage, showing a high matching with the nonlinear SPICE simulations. The frequency response of the Memristor's resistance and its bounding conditions are derived. The fundamentals of the pinched i-v hysteresis, such as the critical resistances, the hysteresis power and the maximum operating current, are derived for the first time.
TL;DR: In this article, the initial state dependent dynamical behaviors of the memristor based chaotic circuit are investigated both theoretically and numerically, and the stability of the system is investigated.
Abstract: Unlike conventional chaotic systems, a memristor based chaotic circuit has an equilibrium set, whose stability is dependent on the initial state of the memristor. The initial state dependent dynamical behaviors of the memristor based chaotic circuit are investigated both theoretically and numerically.
03 Aug 2010
TL;DR: Studies on nanoscale Si-based memristive devices for memory and neuromorphic applications, based on ion motion inside an insulating a-Si matrix, show excellent performance metrics including scalability, speed, ON/OFF ratio, endurance and retention.
Abstract: We report studies on nanoscale Si-based memristive devices for memory and neuromorphic applications. The devices are based on ion motion inside an insulating a-Si matrix. Digital devices show excellent performance metrics including scalability, speed, ON/OFF ratio, endurance and retention. High density non-volatile memory arrays based on a crossbar structure have been fabricated and tested. Devices inside a 1kb array can be individually addressed with excellent reproducibility and reliability. By adjusting the device and material structures, nanoscale analog memristor devices have also been demonstrated. The analog memristor devices exhibit incremental conductance changes that are controlled by the charge flown through the device. The performances of the digital and analog devices are thought to be determined by the formation of a dominant conducting filament and the continuous motion of a uniform conduction front, respectively.
16 Aug 2010
TL;DR: In this article, the HP Memristor for DC and periodic signal inputs is provided and the limiting conditions for saturation are also provided in case of either DC or periodic signals in terms of voltage and current.
Abstract: In this paper mathematical models of the HP Memristor for DC and periodic signal inputs are provided. The need for a rigid model for the Memristor using conventional current and voltage quantities is essential for the development of many promising Memristors' applications. Unlike the previous works, which focuses on the sinusoidal input waveform, we derived rules for any periodic signals in general in terms of voltage and current. Square and triangle waveforms are studied explicitly, extending the formulas for any general square wave. The limiting conditions for saturation are also provided in case of either DC or periodic signals. The derived equations are compared to the SPICE model of the Memristor showing a perfect match.