Showing papers on "Memristor published in 2014"

If it’s pinched it’s a memristor

Abstract: This chapter consists of two parts. Part I gives a circuit-theoretic foundation for the first four elementary nonlinear 2-terminal circuit elements, namely, the resistor, the capacitor, the inductor, and the memristor. Part II consists of a collection of colorful “Vignettes” with carefully articulated text and colorful illustrations of the rudiments of the memristor and its characteristic fingerprints and signatures. It is intended as a self-contained pedagogical primer for beginners who have not heard of memristors before.

Comprehensive Physical Model of Dynamic Resistive Switching in an Oxide Memristor

Abstract: Memristors have been proposed for a number of applications from nonvolatile memory to neuromorphic systems. Unlike conventional devices based solely on electron transport, memristors operate on the principle of resistive switching (RS) based on redistribution of ions. To date, a number of experimental and modeling studies have been reported to probe the RS mechanism; however, a complete physical picture that can quantitatively describe the dynamic RS behavior is still missing. Here, we present a quantitative and accurate dynamic switching model that not only fully accounts for the rich RS behaviors in memristors in a unified framework but also provides critical insight for continued device design, optimization, and applications. The proposed model reveals the roles of electric field, temperature, oxygen vacancy concentration gradient, and different material and device parameters on RS and allows accurate predictions of diverse set/reset, analog switching, and complementary RS behaviors using only material...

Memristor Crossbar-Based Neuromorphic Computing System: A Case Study

Abstract: By mimicking the highly parallel biological systems, neuromorphic hardware provides the capability of information processing within a compact and energy-efficient platform. However, traditional Von Neumann architecture and the limited signal connections have severely constrained the scalability and performance of such hardware implementations. Recently, many research efforts have been investigated in utilizing the latest discovered memristors in neuromorphic systems due to the similarity of memristors to biological synapses. In this paper, we explore the potential of a memristor crossbar array that functions as an autoassociative memory and apply it to brain-state-in-a-box (BSB) neural networks. Especially, the recall and training functions of a multianswer character recognition process based on the BSB model are studied. The robustness of the BSB circuit is analyzed and evaluated based on extensive Monte Carlo simulations, considering input defects, process variations, and electrical fluctuations. The results show that the hardware-based training scheme proposed in the paper can alleviate and even cancel out the majority of the noise issue.

Exponential Adaptive Lag Synchronization of Memristive Neural Networks via Fuzzy Method and Applications in Pseudorandom Number Generators

Abstract: This paper investigates the problem of exponential lag synchronization control of memristive neural networks (MNNs) via the fuzzy method and applications in pseudorandom number generators. Based on the knowledge of memristor and recurrent neural networks, the model of MNNs is established. Then, considering the state-dependent properties of memristor, a fuzzy model of MNNs is employed to provide a new way of analyzing the complicated MNNs with only two subsystems, and update laws for the connection weights of slave systems and controller gain are designed to make the slave systems exponentially lag synchronized with the master systems. Two examples about synchronization problems are presented to show the effectiveness of the obtained results, and an application of the obtained theory is also given in the pseudorandom number generator.

A Floating Analog Memristor Emulator Circuit

Abstract: This brief introduces a new floating memristor emulator circuit based on second-generation current conveyors and passive elements. A mathematical model to characterize the memristor behavior was derived, showing a good accuracy among HSPICE simulations and experimental results. An analysis of the frequency behavior of the memristor is also described, showing that the frequency-dependent pinched hysteresis loop in the current-versus-voltage plane holds up to 20.2 kHz. Theoretical derivations and related results are experimentally validated through implementations from commercially available devices, and the proposed memristor emulator circuit can easily be reproducible at a low cost. Furthermore, the emulator circuit can be used as a teaching aid and for future applications with memristors, such as sensors, cellular neural networks, chaotic systems, programmable analog circuits, and nonvolatile memory devices.

Polymer memristor for information storage and neuromorphic applications

Abstract: Polymermaterials have been considered as promising candidates for the implementation of memristor devices due to their low-cost, easy solution processability, mechanical flexibility and ductibility, tunable electronic performance through innovative molecular design cum synthesis strategy and compatibility with complementary metal oxide semiconductor (CMOS) technology as well. The digital-type polymer memristor behaves as resistive random access memory with non-volatility, high density, more speed, low power consumption, large ON/OFF ratio, high endurance and long retention, and is recognized as an appealing candidate for the next generation "universal memory". As a logic component, the analog-type memristor, with the ability to emulate the fundamental synaptic functions of short-term/long-term plasticity (STP/LTP), spike-timing dependent-plasticity (STDP), spike-rate dependent plasticity (SRDP) and "learningexperience" behaviors, can be used to construct artificial neural networks for neuromorphic computation. In this review, we shall attempt to summarize the recent progress in research on the materials, switching characteristics and mechanism aspects of two terminal polymer memristors, for both information storage and neuromorphic applications that inspire great interest in the industrial and academic communities.

Attractivity Analysis of Memristor-Based Cellular Neural Networks With Time-Varying Delays

Abstract: This paper presents new theoretical results on the invariance and attractivity of memristor-based cellular neural networks (MCNNs) with time-varying delays. First, sufficient conditions to assure the boundedness and global attractivity of the networks are derived. Using state-space decomposition and some analytic techniques, it is shown that the number of equilibria located in the saturation regions of the piecewise-linear activation functions of an n-neuron MCNN with time-varying delays increases significantly from 2n to 22n2+n (22n2 times) compared with that without a memristor. In addition, sufficient conditions for the invariance and local or global attractivity of equilibria or attractive sets in any designated region are derived. Finally, two illustrative examples are given to elaborate the characteristics of the results in detail.

Exponential synchronization of memristive Cohen–Grossberg neural networks with mixed delays

Abstract: This paper concerns the problem of global exponential synchronization for a class of memristor-based Cohen–Grossberg neural networks with time-varying discrete delays and unbounded distributed delays. The drive-response set is discussed. A novel controller is designed such that the response (slave) system can be controlled to synchronize with the drive (master) system. Through a nonlinear transformation, we get an alternative system from the considered memristor-based Cohen–Grossberg neural networks. By investigating the global exponential synchronization of the alternative system, we obtain the corresponding synchronization criteria of the considered memristor-based Cohen–Grossberg neural networks. Moreover, the conditions established in this paper are easy to be verified and improve the conditions derived in most of existing papers concerning stability and synchronization for memristor-based neural networks. Numerical simulations are given to show the effectiveness of the theoretical results.

Finite-time stability analysis of fractional-order complex-valued memristor-based neural networks with time delays

Abstract: In this paper, the problem of finite-time stability of fractional-order complex-valued memristor-based neural networks (NNs) with time delays is extensively investigated. We first initiate the fractional-order complex-valued memristor-based NNs with the Caputo fractional derivatives. Using the theory of fractional-order differential equations with discontinuous right-hand sides, Laplace transforms, Mittag-Leffler functions and generalized Gronwall inequality, some new sufficient conditions are derived to guarantee the finite-time stability of the considered fractional-order complex-valued memristor-based NNs. In addition, some sufficient conditions are also obtained for the asymptotical stability of fractional-order complex-valued memristor-based NNs. Finally, a numerical example is presented to demonstrate the effectiveness of our theoretical results.

TiO2-based memristors and ReRAM: materials, mechanisms and models (a review)

Abstract: The memristor is the fundamental nonlinear circuit element, with uses in computing and computer memory. Resistive Random Access Memory (ReRAM) is a resistive switching memory proposed as a non-volatile memory. In this review we shall summarize the state of the art for these closely-related fields, concentrating on titanium dioxide, the well-utilized and archetypal material for both. We shall cover material properties, switching mechanisms and models to demonstrate what ReRAM and memristor scientists can learn from each other and examine the outlook for these technologies.

Brains Are Made of Memristors

Abstract: This exposition shows that the potassium ion-channels and the sodium ion-channels that are distributed over the entire length of the axons of our neurons are in fact locally-active memristors. In particular, they exhibit all of the fingerprints of memristors, including the characteristic pinched hysteresis Lissajous figures in the voltage-current plane, whose loop areas shrink as the frequency of the periodic excitation signal increases. Moreover, the pinched hysteresis loops for the potassium ion-channel memristor, and the sodium ion-channel memristor, from the Hodgkin-Huxley axon circuit model are unique for each periodic excitation signal. An in-depth circuit-theoretic analysis and characterizations of these two classic biological memristors are presented via their small-signal memristive equivalent circuits, their frequency response, and their Nyquist plots. Just as the Hodgkin-Huxley circuit model has stood the test of time, its constituent potassium ion-channel and sodium ion-channel memristors are destined to be classic examples of locally-active memristors in future textbooks on circuit theory and bio-physics.

A floating Memristor emulator based relaxation oscillator

Abstract: In this paper, a flux-controlled memristor emulator with floating terminals by making use of four current conveyors is newly proposed. By replacing the three resistors in the positive and negative feedback loops of a typical relaxation oscillator respectively, three cases of memristor emulator based oscillating circuits are theoretically constructed and mathematically analyzed. To further probe the practicability and inherent features of the new memristor emulator and oscillator, experimental tests are carried out and the measured experimental results show differences from typical relaxation oscillators, this new memristor emulator based oscillator can provide novel and steady oscillating behaviors. The comparison of measured data with theoretical analysis is in good agreement, which further confirms the practicability of this new memristor emulator and oscillator.

Analog memristive memory with applications in audio signal processing

Abstract: Since the development of the HP memristor, much attention has been paid to studies of memristive devices and applications, particularly memristor-based nonvolatile semiconductor memory. Owing to its unique properties, theoretically, one could restart a memristor-based computer immediately without the need for reloading the data. Further, current memories are mainly binary and can store only ones and zeros, whereas memristors have multilevel states, which means a single memristor unit can replace many binary transistors and realize higher-density memory. It is believed that memristors can also implement analog storage besides binary and multilevel information memory. In this paper, an implementation scheme for analog memristive memory is considered. A charge-controlled memristor model is derived and the corresponding SPICE model is constructed. Special write and read operations are demonstrated through numerical analysis and circuit simulations. In addition, an audio analog record/play system using a memristor crossbar array is designed. This system can provide great storage capacity (long recording time) and high audio quality with a simple small circuit structure. A series of computer simulations and analyses verify the effectiveness of the proposed scheme.

Design and Optimization of Nonvolatile Multibit 1T1R Resistive RAM

Abstract: Memristor-based random access memory (RAM) is being explored as a potential replacement for flash memory to sustain the historic trends in the improvement of density, access time, and energy consumption of nonvolatile memory. In this paper, we present the detailed functionality of multibit one-transistor one-memristor (1T1R) cell-based memory arrays, and propose circuit-level performance and energy models for an individual memory cell and the memory array as a whole. We consider titanium dioxide (TiO 2 )and hafnium oxide (HfO x )based memristors, and for these technologies, there is a sub-10% difference between energy and performance computed using our models and HSPICE simulations. Using a performance-driven design approach, the energy-optimized TiO 2 -based resistive RAM (RRAM) array consumes the least write (4.06 pJ/b) and read energy (188 fJ/b) when storing 3 b/cell for 100-ns write and 1-ns read access times. Similarly, HfO x -based RRAM array consumes the least write (365 fJ/b) and read energy (173 fJ/b) when storing 3 b/cell for 1-ns write and 200-ns read access times. We also present a detailed analysis of the implications of process, voltage, and temperature variations on the performance and energy consumption of a multibit RRAM cell.

Memristor Networks

Abstract: Using memristors one can achieve circuit functionalities that are not possible to establish with resistors, capacitors and inductors, therefore the memristor is of great pragmatic usefulness. Potential unique applications of memristors are in spintronic devices, ultra-dense information storage, neuromorphic circuits and programmable electronics. Memristor Networks focuses on the design, fabrication, modelling of and implementation of computation in spatially extended discrete media with many memristors. Top experts in computer science, mathematics, electronics, physics and computer engineering present foundations of the memristor theory and applications, demonstrate how to design neuromorphic network architectures based on memristor assembles, analyse varieties of the dynamic behaviour of memristive networks and show how to realise computing devices from memristors. All aspects of memristor networks are presented in detail, in a fully accessible style. An indispensable source of information and an inspiring reference text, Memristor Networks is an invaluable resource for future generations of computer scientists, mathematicians, physicists and engineers.

Reduction and IR-drop compensations techniques for reliable neuromorphic computing systems

Abstract: Neuromorphic computing system (NCS) is a promising architecture to combat the well-known memory bottleneck in Von Neumann architecture. The recent breakthrough on memristor devices made an important step toward realizing a low-power, small-footprint NCS on-a-chip. However, the currently low manufacturing reliability of nano-devices and the voltage IR-drop along metal wires and memristors arrays severely limits the scale of me-mristor crossbar based NCS and hinders the design scalability. In this work, we propose a novel system reduction scheme that significantly lowers the required dimension of the memristor crossbars in NCS while maintaining high computing accuracy. An IR-drop compensation technique is also proposed to overcome the adverse impacts of the wire resistance and the sneak-path problem in large memristor crossbar designs. Our simulation results show that the proposed techniques can improve computing accuracy by 27.0% and 38.7% less circuit area compared to the original NCS design.

Generalized Memristor Consisting of Diode Bridge with First Order Parallel RC Filter

Abstract: A generalized memristor consisting of a memristive diode bridge with a first order parallel RC filter is proposed in this letter. The mathematical model of the circuit is established and its fingerprints are analyzed by the pinched hysteresis loops with different periodic stimuli. The results verified by experimental measurements indicate that the proposed circuit is a simple voltage-controlled generalized memristor.

Tuning Resistive Switching Characteristics of Tantalum Oxide Memristors through Si Doping

Abstract: An oxide memristor device changes its internal state according to the history of the applied voltage and current. The principle of resistive switching (RS) is based on ion transport (e.g., oxygen vacancy redistribution). To date, devices with bi-, triple-, or even quadruple-layered structures have been studied to achieve the desired switching behavior through device structure optimization. In contrast, the device performance can also be tuned through fundamental atomic-level design of the switching materials, which can directly affect the dynamic transport of ions and lead to optimized switching characteristics. Here, we show that doping tantalum oxide memristors with silicon atoms can facilitate oxygen vacancy formation and transport in the switching layer with adjustable ion hopping distance and drift velocity. The devices show larger dynamic ranges with easier access to the intermediate states while maintaining the extremely high cycling endurance (>1010 set and reset) and are well-suited for neuromorp...

Random telegraph noise and resistance switching analysis of oxide based resistive memory

Abstract: Resistive random access memory (RRAM) devices (e.g. “memristors”) are widely believed to be a promising candidate for future memory and logic applications. Although excellent performance has been reported, the nature of resistance switching is still under extensive debate. In this study, we perform systematic investigation of the resistance switching mechanism in a TaOx based RRAM through detailed noise analysis, and show that the resistance switching from high-resistance to low-resistance is accompanied by a semiconductor-to-metal transition mediated by the accumulation of oxygen-vacancies in the conduction path. Specifically, pronounced random-telegraph noise (RTN) with values up to 25% was observed in the device high-resistance state (HRS) but not in the low-resistance state (LRS). Through time-domain and temperature dependent analysis, we show that the RTN effect shares the same origin as the resistive switching effects, and both can be traced to the (re)distribution of oxygen vacancies (VOs). From noise and transport analysis we further obtained the density of states and average distance of the VOs at different resistance states, and developed a unified model to explain the conduction in both the HRS and the LRS and account for the resistance switching effects in these devices. Significantly, it was found that even though the conduction channel area is larger in the HRS, during resistive switching a localized region gains significantly higher VO and dominates the conduction process. These findings reveal the complex dynamics involved during resistive switching and will help guide continued optimization in the design and operation of this important emerging device class.

The plasmonic memristor: a latching optical switch

Abstract: Plasmonic memristors are electrically activated optical switches with a memory effect. This effect is important for a new generation of latching optical switches that maintain their state without power consumption. It is also of interest for new optical memories that can be activated by a single electrical write/erase impulse. The operation principle is based on the reversible formation of a conductive path in the dielectric layer of a plasmonic metal–insulator–metal waveguide. Extinction ratios of 12 dB (6 dB) are demonstrated in 10 μm (5 μm) long devices for operating voltages of ±2 V. With this, the devices feature the characteristics of electronic resistive random access memory, but for the field of plasmonics. Such plasmonic memristors are interesting in view of new applications in information storage and for low power circuit switching.

New Memristor-Based Crossbar Array Architecture with 50-% Area Reduction and 48-% Power Saving for Matrix-Vector Multiplication of Analog Neuromorphic Computing

Abstract: In this paper, we propose a new memristorbased crossbar array architecture, where a single memristor array and constant-term circuit are used to represent both plus-polarity and minus-polarity matrices This is different from the previous crossbar array architecture which has two memristor arrays to represent plus-polarity and minus-polarity connection matrices, respectively The proposed crossbar architecture is tested and verified to have the same performance with the previous crossbar architecture for applications of character recognition For areal density, however, the proposed crossbar architecture is twice better than the previous architecture, because only single memristor array is used instead of two crossbar arrays Moreover, the power consumption of the proposed architecture can be smaller by 48% than the previous one because the number of memristors in the proposed crossbar architecture is reduced to half compared to the previous crossbar architecture From the high areal density and high energy efficiency, we can know that this newly proposed crossbar array architecture is very suitable to various applications of analog neuromorphic computing that demand high areal density and low energy consumption

Applicability of Well-Established Memristive Models for Simulations of Resistive Switching Devices

Abstract: Highly accurate and predictive models of resistive switching devices are needed to enable future memory and logic design. Widely used is the memristive modeling approach considering resistive switches as dynamical systems. Here we introduce three evaluation criteria for memristor models, checking for plausibility of the I-V characteristics, the presence of a sufficiently nonlinearity of the switching kinetics, and the feasibility of predicting the behavior of two antiserially connected devices correctly. We analyzed two classes of models: the first class comprises common linear memristor models and the second class widely used nonlinear memristive models. The linear memristor models are based on Strukov's initial memristor model extended by different window functions, while the nonlinear models include Pickett's physics-based memristor model and models derived thereof. This study reveals lacking predictivity of the first class of models, independent of the applied window function. Only the physics-based model is able to fulfill most of the basic evaluation criteria.

A Native Stochastic Computing Architecture Enabled by Memristors

Abstract: A two-terminal memristor device is a promising digital memory for its high integration density, substantially lower energy consumption compared to CMOS, and scalability below 10 nm. However, a nanoscale memristor is an inherently stochastic device, and extra energy and latency are required to make a deterministic memory based on memristors. Instead of enforcing deterministic storage, we take advantage of the nondeterministic memory for native stochastic computing, where the randomness required by stochastic computing is intrinsic to the devices without resorting to expensive stochastic number generation. This native stochastic computing system can be implemented as a hybrid integration of memristor memory and simple CMOS stochastic computing circuits. We use an approach called group write to program memristor memory cells in arrays to generate random bit streams for stochastic computing. Three methods are proposed to program memristors using stochastic bit streams and compensate for the nonlinear memristor write function: voltage predistortion, parallel single-pulse write, and downscaled write and upscaled read. To evaluate these technical approaches, we show by simulation a memristor-based stochastic processor for gradient descent optimization, and k-means clustering. The native stochastic computing based on memristors demonstrates key advantages in energy and speed in compute-intensive, data-intensive, and probabilistic applications.

Memristor Kinetics and Diffusion Characteristics for Mixed Anionic-Electronic SrTiO3-δ Bits: The Memristor-Based Cottrell Analysis Connecting Material to Device Performance

Abstract: Memristors based on mixed anionic-electronic conducting oxides are promising devices for future data storage and information technology with applications such as non-volatile memory or neuromorphic computing. Unlike transistors solely operating on electronic carriers, these memristors rely, in their switch characteristics, on defect kinetics of both oxygen vacancies and electronic carriers through a valence change mechanism. Here, Pt|SrTiO3-δ|Pt structures are fabricated as a model material in terms of its mixed defects which show stable resistive switching. To date, experimental proof for memristance is characterized in hysteretic current–voltage profiles; however, the mixed anionic-electronic defect kinetics that can describe the material characteristics in the dynamic resistive switching are still missing. It is shown that chronoamperometry and bias-dependent resistive measurements are powerful methods to gain complimentary insights into material-dependent diffusion characteristics of memristors. For example, capacitive, memristive and limiting currents towards the equilibrium state can successfully be separated. The memristor-based Cottrell analysis is proposed to study diffusion kinetics for mixed conducting memristor materials. It is found that oxygen diffusion coefficients increase up to 3 × 10–15 m2s–1 for applied bias up to 3.8 V for SrTiO3-δ memristors. These newly accessible diffusion characteristics allow for improving materials and implicate field strength requirements to optimize operation towards enhanced performance metrics for valence change memristors.

Chaotic behavior in fractional-order memristor-based simplest chaotic circuit using fourth degree polynomial

Abstract: In this paper, a memristor with a fourth degree polynomial memristance function is used in the simplest chaotic circuit which has only three circuit elements: a linear passive inductor, a linear passive capacitor, and a nonlinear active memristor. We use second order exponent internal state memristor function and fourth degree polynomial memristance function to increase complexity of the chaos. So, the system can generate double-scroll attractor and four-scroll attractor. Systematic studies of chaotic behavior in the integer-order and fractional-order systems are performed using phase portraits, bifurcation diagrams, Lyapunov exponents, and stability analysis. Simulation results show that both integer-order and fractional-order systems exhibit chaotic behavior over a range of control parameters.