Showing papers on "Memristor published in 2015"

Training and operation of an integrated neuromorphic network based on metal-oxide memristors

Abstract: Despite much progress in semiconductor integrated circuit technology, the extreme complexity of the human cerebral cortex, with its approximately 10(14) synapses, makes the hardware implementation of neuromorphic networks with a comparable number of devices exceptionally challenging. To provide comparable complexity while operating much faster and with manageable power dissipation, networks based on circuits combining complementary metal-oxide-semiconductors (CMOSs) and adjustable two-terminal resistive devices (memristors) have been developed. In such circuits, the usual CMOS stack is augmented with one or several crossbar layers, with memristors at each crosspoint. There have recently been notable improvements in the fabrication of such memristive crossbars and their integration with CMOS circuits, including first demonstrations of their vertical integration. Separately, discrete memristors have been used as artificial synapses in neuromorphic networks. Very recently, such experiments have been extended to crossbar arrays of phase-change memristive devices. The adjustment of such devices, however, requires an additional transistor at each crosspoint, and hence these devices are much harder to scale than metal-oxide memristors, whose nonlinear current-voltage curves enable transistor-free operation. Here we report the experimental implementation of transistor-free metal-oxide memristor crossbars, with device variability sufficiently low to allow operation of integrated neural networks, in a simple network: a single-layer perceptron (an algorithm for linear classification). The network can be taught in situ using a coarse-grain variety of the delta rule algorithm to perform the perfect classification of 3 × 3-pixel black/white images into three classes (representing letters). This demonstration is an important step towards much larger and more complex memristive neuromorphic networks.

VTEAM: A General Model for Voltage-Controlled Memristors

Abstract: Memristors are novel electrical devices used for a variety of applications, including memory, logic circuits, and neuromorphic systems. Memristive technologies are attractive due to their nonvolatility, scalability, and compatibility with CMOS. Numerous physical experiments have shown the existence of a threshold voltage in some physical memristors. Additionally, as shown in this brief, some applications require voltage-controlled memristors to operate properly. In this brief, a Voltage ThrEshold Adaptive Memristor (VTEAM) model is proposed to describe the behavior of voltage-controlled memristors. The VTEAM model extends the previously proposed ThrEshold Adaptive Memristor (TEAM) model, which describes current-controlled memristors. The VTEAM model has similar advantages as the TEAM model, i.e., it is simple, general, and flexible, and can characterize different voltage-controlled memristors. The VTEAM model is accurate (below 1.5% in terms of the relative root-mean-square error) and computationally efficient as compared with existing memristor models and experimental results describing different memristive technologies.

Experimental demonstration of a second-order memristor and its ability to biorealistically implement synaptic plasticity.

Abstract: Memristors have been extensively studied for data storage and low-power computation applications. In this study, we show that memristors offer more than simple resistance change. Specifically, the dynamic evolutions of internal state variables allow an oxide-based memristor to exhibit Ca2+-like dynamics that natively encode timing information and regulate synaptic weights. Such a device can be modeled as a second-order memristor and allow the implementation of critical synaptic functions realistically using simple spike forms based solely on spike activity.

Biorealistic Implementation of Synaptic Functions with Oxide Memristors through Internal Ionic Dynamics

Abstract: Memristors have attracted broad interest as a promising candidate for future memory and computing applications. Particularly, it is believed that memristors can effectively implement synaptic functions and enable efficient neuromorphic systems. Most previous studies, however, focus on implementing specific synaptic learning rules by carefully engineering external programming parameters instead of focusing on emulating the internal cause that leads to the apparent learning rules. Here, it is shown that by taking advantage of the different time scales of internal oxygen vacancy (VO) dynamics in an oxide-based memristor, diverse synaptic functions at different time scales can be implemented naturally. Mathematically, the device can be effectively modeled as a second-order memristor with a simple set of equations including multiple state variables. Not only is this approach more biorealistic and easier to implement, by focusing on the fundamental driving mechanisms it allows the development of complete theoretical and experimental frameworks for biologically inspired computing systems.

Neuromorphic Hardware System for Visual Pattern Recognition With Memristor Array and CMOS Neuron

Abstract: This paper presents a neuromorphic system for visual pattern recognition realized in hardware. A new learning rule based on modified spike-timing-dependent plasticity is also presented and implemented with passive synaptic devices. The system includes an artificial photoreceptor, a $\hbox{Pr}_{0.7}\hbox{Ca}_{0.3}\hbox{MnO}_{3} $ -based memristor array, and CMOS neurons. The artificial photoreceptor consisting of a CMOS image sensor and a field-programmable gate array converts an image into spike signals, and the memristor array is used to adjust the synaptic weights between the input and output neurons according to the learning rule. A leaky integrate-and-fire model is used for the output neuron that is built together with the image sensor on a single chip. The system has 30 input neurons that are interconnected to 10 output neurons through 300 memristors. Each input neuron corresponding to a pixel in a 5 $\times$ 6 pixel image generates voltage pulses according to the pixel value. The voltage pulses are then weighted and integrated by the memristors and the output neurons, respectively, to be compared with a certain threshold voltage above which an output neuron fires. The system has been successfully demonstrated by training and recognizing number images from 0 to 9.

Adaptive synchronization of fractional-order memristor-based neural networks with time delay

Abstract: This paper is concerned with the adaptive synchronization problem of fractional-order memristor-based neural networks with time delay. By combining the adaptive control, linear delay feedback control, and a fractional-order inequality, sufficient conditions are derived which ensure the drive–response systems to achieve synchronization. Finally, two numerical examples are given to demonstrate the effectiveness of the obtained results.

Memristor-Based Multilayer Neural Networks With Online Gradient Descent Training

Abstract: Learning in multilayer neural networks (MNNs) relies on continuous updating of large matrices of synaptic weights by local rules. Such locality can be exploited for massive parallelism when implementing MNNs in hardware. However, these update rules require a multiply and accumulate operation for each synaptic weight, which is challenging to implement compactly using CMOS. In this paper, a method for performing these update operations simultaneously (incremental outer products) using memristor-based arrays is proposed. The method is based on the fact that, approximately, given a voltage pulse, the conductivity of a memristor will increment proportionally to the pulse duration multiplied by the pulse magnitude if the increment is sufficiently small. The proposed method uses a synaptic circuit composed of a small number of components per synapse: one memristor and two CMOS transistors. This circuit is expected to consume between 2% and 8% of the area and static power of previous CMOS-only hardware alternatives. Such a circuit can compactly implement hardware MNNs trainable by scalable algorithms based on online gradient descent (e.g., backpropagation). The utility and robustness of the proposed memristor-based circuit are demonstrated on standard supervised learning tasks.

Memristor-Based Cellular Nonlinear/Neural Network: Design, Analysis, and Applications

Abstract: Cellular nonlinear/neural network (CNN) has been recognized as a powerful massively parallel architecture capable of solving complex engineering problems by performing trillions of analog operations per second. The memristor was theoretically predicted in the late seventies, but it garnered nascent research interest due to the recent much-acclaimed discovery of nanocrossbar memories by engineers at the Hewlett-Packard Laboratory. The memristor is expected to be co-integrated with nanoscale CMOS technology to revolutionize conventional von Neumann as well as neuromorphic computing. In this paper, a compact CNN model based on memristors is presented along with its performance analysis and applications. In the new CNN design, the memristor bridge circuit acts as the synaptic circuit element and substitutes the complex multiplication circuit used in traditional CNN architectures. In addition, the negative differential resistance and nonlinear current–voltage characteristics of the memristor have been leveraged to replace the linear resistor in conventional CNNs. The proposed CNN design has several merits, for example, high density, nonvolatility, and programmability of synaptic weights. The proposed memristor-based CNN design operations for implementing several image processing functions are illustrated through simulation and contrasted with conventional CNNs. Monte-Carlo simulation has been used to demonstrate the behavior of the proposed CNN due to the variations in memristor synaptic weights.

Adaptive Synchronization of Memristor-Based Neural Networks with Time-Varying Delays

Abstract: In this paper, adaptive synchronization of memristor-based neural networks (MNNs) with time-varying delays is investigated. The dynamical analysis here employs results from the theory of differential equations with discontinuous right-hand sides as introduced by Filippov. Sufficient conditions for the global synchronization of MNNs are established with a general adaptive controller. The update gain of the controller can be adjusted to control the synchronization speed. The obtained results complement and improve the previously known results. Finally, numerical simulations are carried out to demonstrate the effectiveness of the obtained results.

Periodicity, chaos, and multiple attractors in a memristor-based Shinriki's circuit.

Abstract: In this contribution, a novel memristor-based oscillator, obtained from Shinriki's circuit by substituting the nonlinear positive conductance with a first order memristive diode bridge, is introduced. The model is described by a continuous time four-dimensional autonomous system with smooth nonlinearities. The basic dynamical properties of the system are investigated including equilibria and stability, phase portraits, frequency spectra, bifurcation diagrams, and Lyapunov exponents' spectrum. It is found that in addition to the classical period-doubling and symmetry restoring crisis scenarios reported in the original circuit, the memristor-based oscillator experiences the unusual and striking feature of multiple attractors (i.e., coexistence of a pair of asymmetric periodic attractors with a pair of asymmetric chaotic ones) over a broad range of circuit parameters. Results of theoretical analyses are verified by laboratory experimental measurements.

Exponential Stabilization of Memristor-based Chaotic Neural Networks with Time-Varying Delays via Intermittent Control

Abstract: This paper is concerned with the global exponential stabilization of memristor-based chaotic neural networks with both time-varying delays and general activation functions. Here, we adopt nonsmooth analysis and control theory to handle memristor-based chaotic neural networks with discontinuous right-hand side. In particular, several new sufficient conditions ensuring exponential stabilization of memristor-based chaotic neural networks are obtained via periodically intermittent control. In addition, the proposed results here are easy to verify and they also extend the earlier publications. Finally, numerical simulations illustrate the effectiveness of the obtained results.

Dynamics of self-excited attractors and hidden attractors in generalized memristor-based Chua’s circuit

Abstract: A novel memristive chaotic circuit is presented, which is derived from the classical Chua’s circuit by substituting Chua’s diode with a first-order memristive diode bridge. The dynamical characteristics with the variations of circuit parameters are investigated both theoretically and numerically. The research results indicate that this circuit has three determined equilibrium points and displays complex nonlinear phenomena including coexisting bifurcation modes and coexisting attractors. Specifically, with another parameter setting, the memristive Chua’s circuit can generate hidden attractors and coexisting hidden attractors in a narrow parameter region. The phenomena of self-excited attractors and hidden attractors are experimentally captured from a physical circuit, which verify the numerical simulations.

Memristor based computation-in-memory architecture for data-intensive applications

Abstract: One of the most critical challenges for today's and future data-intensive and big-data problems is data storage and analysis. This paper first highlights some challenges of the new born Big Data paradigm and shows that the increase of the data size has already surpassed the capabilities of today's computation architectures suffering from the limited bandwidth, programmability overhead, energy inefficiency, and limited scalability. Thereafter, the paper introduces a new memristor-based architecture for data-intensive applications. The potential of such an architecture in solving data-intensive problems is illustrated by showing its capability to increase the computation efficiency, solving the communication bottleneck, reducing the leakage currents, etc. Finally, the paper discusses why memristor technology is very suitable for the realization of such an architecture; using memristors to implement dual functions (storage and logic) is illustrated.

Vortex: variation-aware training for memristor X-bar

Abstract: Recent advances in development of memristor devices and crossbar integration allow us to implement a low-power on-chip neuromorphic computing system (NCS) with small footprint. Training methods have been proposed to program the memristors in a crossbar by following existing training algorithms in neural network models. However, the robustness of these training methods has not been well investigated by taking into account the limits imposed by realistic hardware implementations. In this work, we present a quantitative analysis on the impact of device imperfections and circuit design constraints on the robustness of two popular training methods -- "close-loop on-device" (CLD) and "open-loop off-device" (OLD). A novel variation-aware training scheme, namely, Vortex, is then invented to enhance the training robustness of memristor crossbar-based NCS by actively compensating the impact of device variations and optimizing the mapping scheme from computations to crossbars. On average, Vortex can significantly improve the test rate by 29.6% and 26.4%, compared to the traditional OLD and CLD, respectively.

Characterization and Modeling of Nonfilamentary Ta/TaOx/TiO2/Ti Analog Synaptic Device

Abstract: A two-terminal analog synaptic device that precisely emulates biological synaptic features is expected to be a critical component for future hardware-based neuromorphic computing. Typical synaptic devices based on filamentary resistive switching face severe limitations on the implementation of concurrent inhibitory and excitatory synapses with low conductance and state fluctuation. For overcoming these limitations, we propose a Ta/TaOx/TiO2/Ti device with superior analog synaptic features. A physical simulation based on the homogeneous (nonfilamentary) barrier modulation induced by oxygen ion migration accurately reproduces various DC and AC evolutions of synaptic states, including the spike-timing-dependent plasticity and paired-pulse facilitation. Furthermore, a physics-based compact model for facilitating circuit-level design is proposed on the basis of the general definition of memristor devices. This comprehensive experimental and theoretical study of the promising electronic synapse can facilitate realizing large-scale neuromorphic systems.

Memristor: A New Concept in Synchronization of Coupled Neuromorphic C ircuits

Abstract: The existence of the memristor, as a fourth fundamental circuit element, by researchers at Hewlett Packard (HP) labs in 2008, has attracted much interest since then. This occurs because the memristor opens up new functionalities in electronics and it has led to the interpretation of phenomena not only in electronic devices but also in biological systems. Furthermore, many research teams work on projects, which use memristors in neuromorphic devices to simulate learning, adaptive and spontaneous behavior while other teams on systems, which attempt to simulate the behavior of biological synapses. In this paper, the latest achievements and applications of this newly development circuit element are presented. Also, the basic features of neuromorphic circuits, in which the memristor can be used as an electrical synapse, are studied. In this direction, a flux-controlled memristor model is adopted for using as a coupling element between coupled electronic circuits, which simulate the behavior of neuron-cells. For this reason, the circuits which are chosen realize the systems of differential equations that simulate the well-known Hindmarsh-Rose and FitzHugh-Nagumo neuron models. Finally, the simulation results of the use of a memristor as an electric synapse present the effectiveness of the proposed method and many interesting dynamic phenomena concerning the behavior of coupled neuron-cells.

Nonlinear Dynamics of a Locally-Active Memristor

Abstract: This work elucidates some aspects of the nonlinear dynamics of a thermally-activated locally-active memristor based on a micro-structure consisting of a bi-layer of ${\rm Nb}_{2}{\rm O}_{5}$ and ${\rm Nb}_{2}{\rm O}_{x}$ materials. Through application of techniques from the theory of nonlinear dynamics to an accurate and simple mathematical model for the device, we gained a deep insight into the mechanisms at the origin of the emergence of local activity in the memristor. This theoretical study sets a general constraint on the biasing arrangement for the stabilization of the negative differential resistance effect in locally active memristors and provides a theoretical justification for an unexplained phenomenon observed at HP labs. As proof-of-principle, the constraint was used to enable a memristor to induce sustained oscillations in a one port cell. The capability of the oscillatory cell to amplify infinitesimal fluctuations of energy was theoretically and experimentally proved.

A Circuit-Based Learning Architecture for Multilayer Neural Networks With Memristor Bridge Synapses

Abstract: Memristor-based circuit architecture for multilayer neural networks is proposed. It is a first of its kind demonstrating successful circuit-based learning for multilayer neural network built with memristors. Though back-propagation algorithm is a powerful learning scheme for multilayer neural networks, its hardware implementation is very difficult due to complexities of the neural synapses and the operations involved in the learning algorithm. In this paper, the circuit of a multilayer neural network is designed with memristor bridge synapses and the learning is realized with a simple learning algorithm called Random Weight Change (RWC). Though RWC algorithm requires more iterations than back-propagation algorithm, we show that a circuit-based learning using RWC is two orders faster than its software counterpart. The method to build a multilayer neural network using memristor bridge synapses and a circuit-based learning architecture of RWC algorithm is proposed. Comparison between software-based and memristor circuit-based learning are presented via simulations.

A Memristor-Based Hyperchaotic System with Hidden Attractors: Dynamics, Synchronization and Circuital Emulating

Abstract: Memristor-based systems and their potential applications, in which memristor is both a nonlinear element and a memory element, have been received significant attention recently. A memristor-based hyperchaotic system with hidden attractor is studied in this paper. The dynamics properties of this hyperchaotic system are discovered through equilibria, Lyapunov exponents, bifurcation diagram, Poincaré map and limit cycles. In addition, its anti-synchronization scheme via adaptive control method is also designed and MATLAB simulations are shown. Finally, an electronic circuit emulating the memristor-based hyperchaotic system has been designed using off-the-shelf components.

Self-Adaptive Spike-Time-Dependent Plasticity of Metal-Oxide Memristors

Abstract: Metal-oxide memristors have emerged as promising candidates for hardware implementation of artificial synapses - the key components of high-performance, analog neuromorphic networks - due to their excellent scaling prospects Since some advanced cognitive tasks require spiking neuromorphic networks, which explicitly model individual neural pulses (spikes) in biological neural systems, it is crucial for memristive synapses to support the spike-time-dependent plasticity (STDP), which is believed to be the primary mechanism of Hebbian adaptation A major challenge for the STDP implementation is that, in contrast to some simplistic models of the plasticity, the elementary change of a synaptic weight in an artificial hardware synapse depends not only on the pre-synaptic and post-synaptic signals, but also on the initial weight (memristor's conductance) value Here we experimentally demonstrate, for the first time, STDP protocols that ensure self-adaptation of the average memristor conductance, making the plasticity stable, ie insensitive to the initial state of the devices The experiments have been carried out with 200-nm Al2O3/TiO2-x memristors integrated into 12x12 crossbars The experimentally observed self-adaptive STDP behavior has been complemented with numerical modeling of weight dynamics in a simple system with a leaky-integrate-and-fire neuron with a random spike-train input, using a compact model of memristor plasticity, fitted for quantitatively correct description of our memristors

Memristors Empower Spiking Neurons With Stochasticity

Abstract: Recent theoretical studies have shown that probabilistic spiking can be interpreted as learning and inference in cortical microcircuits. This interpretation creates new opportunities for building neuromorphic systems driven by probabilistic learning algorithms. However, such systems must have two crucial features: 1) the neurons should follow a specific behavioral model, and 2) stochastic spiking should be implemented efficiently for it to be scalable. This paper proposes a memristor-based stochastically spiking neuron that fulfills these requirements. First, the analytical model of the memristor is enhanced so it can capture the behavioral stochasticity consistent with experimentally observed phenomena. The switching behavior of the memristor model is demonstrated to be akin to the firing of the stochastic spike response neuron model, the primary building block for probabilistic algorithms in spiking neural networks. Furthermore, the paper proposes a neural soma circuit that utilizes the intrinsic nondeterminism of memristive switching for efficient spike generation. The simulations and analysis of the behavior of a single stochastic neuron and a winner-take-all network built of such neurons and trained on handwritten digits confirm that the circuit can be used for building probabilistic sampling and pattern adaptation machinery in spiking networks. The findings constitute an important step towards scalable and efficient probabilistic neuromorphic platforms.

Data Clustering using Memristor Networks.

Abstract: Memristors have emerged as a promising candidate for critical applications such as non-volatile memory as well as non-Von Neumann computing architectures based on neuromorphic and machine learning systems. In this study, we demonstrate that memristors can be used to perform principal component analysis (PCA), an important technique for machine learning and data feature learning. The conductance changes of memristors in response to voltage pulses are studied and modeled with an internal state variable to trace the analog behavior of the device. Unsupervised, online learning is achieved in a memristor crossbar using Sanger’s learning rule, a derivative of Hebb’s rule, to obtain the principal components. The details of weights evolution during training is investigated over learning epochs as a function of training parameters. The effects of device non-uniformity on the PCA network performance are further analyzed. We show that the memristor-based PCA network is capable of linearly separating distinct classes from sensory data with high clarification success of 97.6% even in the presence of large device variations.

The Missing Memristor has Not been Found

Abstract: In 1971, not only the theoretical and by definition already existing ‘ideal memristor’ concept was introduced, but a real memristor device was suggested on grounds of the already known real inductors. The latter is a scientifically significant hypothesis grounded in fundamental symmetries of basic physics, here electro-magnetism. 2008 claimed the discovery of the “missing memristor.” Controversy arose: The devices were not new and the hypothesized device needs magnetism but has no material memory, while the available devices constitute analogue memory that would work in a world without magnetism. Nevertheless, even the originator of the prediction accepted the discovery. Defenders of the 2008 claim emphasize that the devices are not merely ‘memristive systems,’ which is however a distinction defined in 1976, not 1971. We clarify widely confused concepts and maintain that the originally hypothesized real memristor device is missing and likely impossible. The argument is illustrated also by finding an ideal mechanical memristor element and purely mechanical memristive systems and hypothesizing a real mechanical memristor device that requires inert mass just like the 1971 implied device requires magnetic induction.

Synchronization of Memristor-Based Coupling Recurrent Neural Networks With Time-Varying Delays and Impulses

Abstract: Synchronization of an array of linearly coupled memristor-based recurrent neural networks with impulses and time-varying delays is investigated in this brief. Based on the Lyapunov function method, an extended Halanay differential inequality and a new delay impulsive differential inequality, some sufficient conditions are derived, which depend on impulsive and coupling delays to guarantee the exponential synchronization of the memristor-based recurrent neural networks. Impulses with and without delay and time-varying delay are considered for modeling the coupled neural networks simultaneously, which renders more practical significance of our current research. Finally, numerical simulations are given to verify the effectiveness of the theoretical results.