Showing papers on "Memristor published in 2016"

Dot-product engine for neuromorphic computing: programming 1T1M crossbar to accelerate matrix-vector multiplication

Abstract: Vector-matrix multiplication dominates the computation time and energy for many workloads, particularly neural network algorithms and linear transforms (e.g, the Discrete Fourier Transform). Utilizing the natural current accumulation feature of memristor crossbar, we developed the Dot-Product Engine (DPE) as a high density, high power efficiency accelerator for approximate matrix-vector multiplication. We firstly invented a conversion algorithm to map arbitrary matrix values appropriately to memristor conductances in a realistic crossbar array, accounting for device physics and circuit issues to reduce computational errors. The accurate device resistance programming in large arrays is enabled by close-loop pulse tuning and access transistors. To validate our approach, we simulated and benchmarked one of the state-of-the-art neural networks for pattern recognition on the DPEs. The result shows no accuracy degradation compared to software approach (99 % pattern recognition accuracy for MNIST data set) with only 4 Bit DAC/ADC requirement, while the DPE can achieve a speed-efficiency product of 1,000× to 10,000× compared to a custom digital ASIC.

Memristive Behavior and Ideal Memristor of 1T Phase MoS2 Nanosheets

Abstract: Memristor, which had been predicted a long time ago (Chua, L. O. IEEE Trans. Circuit Theory 1971, 18, 507), was recently invented (Strukov, D. B.; et al. Nature 2008, 453, 80). The introduction of a memristor is expected to open a new era for nonvolatile memory storage, neuromorphic computing, digital logic, and analog circuit. Furthermore, several breakthroughs were made for memristive phenomena and transistors with single-layer MoS2 (Sangwan, V. K.; et al. Nat. Nanotechnol. 2015, 10, 403. van der Zande, A. M.; et al. Nat. Mater. 2013, 12, 554. Liu, H.; et al. ACS Nano 2014, 8, 1031. Bessonov, A. A.; et al. Nat. Mater. 2015, 14, 199. Yuan, J.; et al. Nat. Nanotechnol. 2015, 10, 389). Herein, we demonstrate that 2H phase of bulk MoS2 possessed an ohmic feature, whereas 1T phase of exfoliated MoS2 nanosheets exhibited a unique memristive behavior due to voltage-dependent resistance change. Furthermore, an ideal odd-symmetric memristor with odd-symmetric I–V characteristics was successfully fabricated by th...

Engineering incremental resistive switching in TaOx based memristors for brain-inspired computing

Abstract: Brain-inspired neuromorphic computing is expected to revolutionize the architecture of conventional digital computers and lead to a new generation of powerful computing paradigms, where memristors with analog resistive switching are considered to be potential solutions for synapses. Here we propose and demonstrate a novel approach to engineering the analog switching linearity in TaOx based memristors, that is, by homogenizing the filament growth/dissolution rate via the introduction of an ion diffusion limiting layer (DLL) at the TiN/TaOx interface. This has effectively mitigated the commonly observed two-regime conductance modulation behavior and led to more uniform filament growth (dissolution) dynamics with time, therefore significantly improving the conductance modulation linearity that is desirable in neuromorphic systems. In addition, the introduction of the DLL also served to reduce the power consumption of the memristor, and important synaptic learning rules in biological brains such as spike timing dependent plasticity were successfully implemented using these optimized devices. This study could provide general implications for continued optimizations of memristor performance for neuromorphic applications, by carefully tuning the dynamics involved in filament growth and dissolution.

Multiple attractors in a non-ideal active voltage-controlled memristor based Chua's circuit

Abstract: Multiple attractors can be found in many nonlinear dynamical system with multistability. Recently, experimental attractors with two stable saddle-foci were reported to find in a non-ideal active voltage-controlled memristor based Chua's circuit. In this paper we focus on the multiple attractors found in the proposed memristive Chua's circuit. Concretely, by numerical simulations of mathematical model, hardware circuit experiments and PSIM circuit simulations, multiple attractors with different initial states are revealed and with the dimensionless system equations, complex dynamics with different initial conditions are further discussed. Theoretical derivation results indicate that the normalized memristive Chua's system has two stable nonzero saddle-foci in globally adjusting normalized parameter region and exhibits the unusual and striking dynamical behavior of multiple attractors with multistability.

A magnetic synapse: multilevel spin-torque memristor with perpendicular anisotropy.

Abstract: Memristors are non-volatile nano-resistors which resistance can be tuned by applied currents or voltages and set to a large number of levels. Thanks to these properties, memristors are ideal building blocks for a number of applications such as multilevel non-volatile memories and artificial nano-synapses, which are the focus of this work. A key point towards the development of large scale memristive neuromorphic hardware is to build these neural networks with a memristor technology compatible with the best candidates for the future mainstream non-volatile memories. Here we show the first experimental achievement of a multilevel memristor compatible with spin-torque magnetic random access memories. The resistive switching in our spin-torque memristor is linked to the displacement of a magnetic domain wall by spin-torques in a perpendicularly magnetized magnetic tunnel junction. We demonstrate that our magnetic synapse has a large number of intermediate resistance states, sufficient for neural computation. Moreover, we show that engineering the device geometry allows leveraging the most efficient spin torque to displace the magnetic domain wall at low current densities and thus to minimize the energy cost of our memristor. Our results pave the way for spin-torque based analog magnetic neural computation.

Extreme multistability in a memristive circuit

Abstract: A memristive Chua's circuit regarded as a paradigm is reconsidered to exhibit its extreme multistability in this Letter. Memristor initial state-dependent dynamics is analysed and the coexistence of infinitely many attractors related to memristor initial states is revealed by numerical simulations and circuit simulations. The dynamical behaviour just reflects the emergence of extreme multistability in the memristive circuit.

Sub-10 nm Ta Channel Responsible for Superior Performance of a HfO2 Memristor.

Abstract: Memristive devices are promising candidates for the next generation non-volatile memory and neuromorphic computing. It has been widely accepted that the motion of oxygen anions leads to the resistance changes for valence-change-memory (VCM) type of materials. Only very recently it was speculated that metal cations could also play an important role, but no direct physical characterizations have been reported yet. Here we report a Ta/HfO2/Pt memristor with fast switching speed, record high endurance (120 billion cycles) and reliable retention. We programmed the device to 24 discrete resistance levels, and also demonstrated over a million (220) epochs of potentiation and depression, suggesting that our devices can be used for both multi-level non-volatile memory and neuromorphic computing applications. More importantly, we directly observed a sub-10 nm Ta-rich and O-deficient conduction channel within the HfO2 layer that is responsible for the switching. This work deepens our understanding of the resistance switching mechanism behind oxide-based memristive devices and paves the way for further device performance optimization for a broad spectrum of applications.

Coexisting infinitely many attractors in active band-pass filter-based memristive circuit

Abstract: This paper presents an inductor-free memristive circuit, which is implemented by linearly coupling an active band-pass filter (BPF) with a parallel memristor and capacitor filter. Mathematical model is established, and numerical simulations are performed. The results verified by hardware experiments show that the active BPF-based memristive circuit exhibits the dynamical behaviors of point, period, chaos, and period-doubling bifurcation route. Most important of all, the newly proposed memristive circuit has a line equilibrium and its stability closely relies on memristor initial condition, which results in the emergence of extreme multistability. Stability distribution related to memristor initial condition is numerically estimated and the coexistence of infinitely many attractors is intuitively captured by numerical simulations and PSIM circuit simulations.

Status and Prospects of ZnO-Based Resistive Switching Memory Devices

Abstract: In the advancement of the semiconductor device technology, ZnO could be a prospective alternative than the other metal oxides for its versatility and huge applications in different aspects. In this review, a thorough overview on ZnO for the application of resistive switching memory (RRAM) devices has been conducted. Various efforts that have been made to investigate and modulate the switching characteristics of ZnO-based switching memory devices are discussed. The use of ZnO layer in different structure, the different types of filament formation, and the different types of switching including complementary switching are reported. By considering the huge interest of transparent devices, this review gives the concrete overview of the present status and prospects of transparent RRAM devices based on ZnO. ZnO-based RRAM can be used for flexible memory devices, which is also covered here. Another challenge in ZnO-based RRAM is that the realization of ultra-thin and low power devices. Nevertheless, ZnO not only offers decent memory properties but also has a unique potential to be used as multifunctional nonvolatile memory devices. The impact of electrode materials, metal doping, stack structures, transparency, and flexibility on resistive switching properties and switching parameters of ZnO-based resistive switching memory devices are briefly compared. This review also covers the different nanostructured-based emerging resistive switching memory devices for low power scalable devices. It may give a valuable insight on developing ZnO-based RRAM and also should encourage researchers to overcome the challenges.

A novel memristive neural network with hidden attractors and its circuitry implementation

Abstract: Neural networks have been applied in various fields from signal processing, pattern recognition, associative memory to artificial intelligence. Recently, nanoscale memristor has renewed interest in experimental realization of neural network. A neural network with a memristive synaptic weight is studied in this work. Dynamical properties of the proposed neural network are investigated through phase portraits, Poincare map, and Lyapunov exponents. Interestingly, the memristive neural network can generate hyperchaotic attractors without the presence of equilibrium points. Moreover, circuital implementation of such memristive neural network is presented to show its feasibility.

Extreme multistability in a memristor-based multi-scroll hyper-chaotic system

Abstract: In this paper, a new memristor-based multi-scroll hyper-chaotic system is designed. The proposed memristor-based system possesses multiple complex dynamic behaviors compared with other chaotic systems. Various coexisting attractors and hidden coexisting attractors are observed in this system, which means extreme multistability arises. Besides, by adjusting parameters of the system, this chaotic system can perform single-scroll attractors, double-scroll attractors, and four-scroll attractors. Basic dynamic characteristics of the system are investigated, including equilibrium points and stability, bifurcation diagrams, Lyapunov exponents, and so on. In addition, the presented system is also realized by an analog circuit to confirm the correction of the numerical simulations.

Reconfigurable Nonvolatile Logic Operations in Resistance Switching Crossbar Array for Large-Scale Circuits.

Abstract: Resistance switching (RS) devices have potential to offer computing and memory function. A new computer unit is built of RS array, where processing and storing of information occur on same devices. Resistance states stored in devices located in arbitrary positions of RS array can be performed various nonvolatile logic operations. Logic functions can be reconfigured by altering trigger signals.

An accurate locally active memristor model for S-type negative differential resistance in NbOx

Abstract: A number of important commercial applications would benefit from the introduction of easily manufactured devices that exhibit current-controlled, or “S-type,” negative differential resistance (NDR). A leading example is emerging non-volatile memory based on crossbar array architectures. Due to the inherently linear current vs. voltage characteristics of candidate non-volatile memristor memory elements, individual memory cells in these crossbar arrays can be addressed only if a highly non-linear circuit element, termed a “selector,” is incorporated in the cell. Selectors based on a layer of niobium oxide sandwiched between two electrodes have been investigated by a number of groups because the NDR they exhibit provides a promisingly large non-linearity. We have developed a highly accurate compact dynamical model for their electrical conduction that shows that the NDR in these devices results from a thermal feedback mechanism. A series of electrothermal measurements and numerical simulations corroborate this model. These results reveal that the leakage currents can be minimized by thermally isolating the selector or by incorporating materials with larger activation energies for electron motion.

Low-Power, Self-Rectifying, and Forming-Free Memristor with an Asymmetric Programing Voltage for a High-Density Crossbar Application

Abstract: A Pt/NbOx/TiOy/NbOx/TiN stack integrated on a 30 nm contact via shows a programming current as low as 10 nA and 1 pA for the set and reset switching, respectively, and a self-rectifying ratio as high as ∼105, which are suitable characteristics for low-power memristor applications. It also shows a forming-free characteristic. A charge-trap-associated switching model is proposed to account for this self-rectifying memrisive behavior. In addition, an asymmetric voltage scheme (AVS) to decrease the write power consumption by utilizing this self-rectifying memristor is also described. When the device is used in a 1000 × 1000 crossbar array with the AVS, the programming power can be decreased to 8.0% of the power consumption of a conventional biasing scheme. If the AVS is combined with a nonlinear selector, a power consumption reduction to 0.31% of the reference value is possible.

State of the art of metal oxide memristor devices

Abstract: Abstract Memristors are one of the emerging technologies that can potentially replace state-of-the-art integrated electronic devices for advanced computing and digital and analog circuit applications including neuromorphic networks. Over the past few years, research and development mostly focused on revolutionizing the metal oxide materials, which are used as core components of the popular metal-insulator-metal memristors owing to their highly recognized resistive switching behavior. This paper outlines the recent advancements and characteristics of such memristive devices, with a special focus on (i) their established resistive switching mechanisms and (ii) the key challenges associated with their fabrication processes including the impeding criteria of material adaptation for the electrode, capping, and insulator component layers. Potential applications and an outlook into future development of metal oxide memristive devices are also outlined.

Repeatable, accurate, and high speed multi-level programming of memristor 1T1R arrays for power efficient analog computing applications.

Abstract: Beyond use as high density non-volatile memories, memristors have potential as synaptic components of neuromorphic systems. We investigated the suitability of tantalum oxide (TaOx) transistor-memristor (1T1R) arrays for such applications, particularly the ability to accurately, repeatedly, and rapidly reach arbitrary conductance states. Programming is performed by applying an adaptive pulsed algorithm that utilizes the transistor gate voltage to control the SET switching operation and increase programming speed of the 1T1R cells. We show the capability of programming 64 conductance levels with <0.5% average accuracy using 100 ns pulses and studied the trade-offs between programming speed and programming error. The algorithm is also utilized to program 16 conductance levels on a population of cells in the 1T1R array showing robustness to cell-to-cell variability. In general, the proposed algorithm results in approximately 10× improvement in programming speed over standard algorithms that do not use the transistor gate to control memristor switching. In addition, after only two programming pulses (an initialization pulse followed by a programming pulse), the resulting conductance values are within 12% of the target values in all cases. Finally, endurance of more than 10(6) cycles is shown through open-loop (single pulses) programming across multiple conductance levels using the optimized gate voltage of the transistor. These results are relevant for applications that require high speed, accurate, and repeatable programming of the cells such as in neural networks and analog data processing.

Self-Adaptive Spike-Time-Dependent Plasticity of Metal-Oxide Memristors.

Abstract: Metal-oxide memristors have emerged as promising candidates for hardware implementation of artificial synapses – the key components of high-performance, analog neuromorphic networks - due to their excellent scaling prospects. Since some advanced cognitive tasks require spiking neuromorphic networks, which explicitly model individual neural pulses (“spikes”) in biological neural systems, it is crucial for memristive synapses to support the spike-time-dependent plasticity (STDP). A major challenge for the STDP implementation is that, in contrast to some simplistic models of the plasticity, the elementary change of a synaptic weight in an artificial hardware synapse depends not only on the pre-synaptic and post-synaptic signals, but also on the initial weight (memristor’s conductance) value. Here we experimentally demonstrate, for the first time, an STDP behavior that ensures self-adaptation of the average memristor conductance, making the plasticity stable, i.e. insensitive to the initial state of the devices. The experiments have been carried out with 200-nm Al2O3/TiO2−x memristors integrated into 12 × 12 crossbars. The experimentally observed self-adaptive STDP behavior has been complemented with numerical modeling of weight dynamics in a simple system with a leaky-integrate-and-fire neuron with a random spike-train input, using a compact model of memristor plasticity, fitted for quantitatively correct description of our memristors.

Chaotic and periodic bursting phenomena in a memristive Wien-bridge oscillator

Abstract: Bursting, an important communication activity in biological neurons and endocrine cells, has been widely found in fast-slow dynamical systems In this paper, a modified second-order generalized memristor, memristive diode bridge cascaded with LC network, is presented and its fingerprints of the pinched hysteresis loops are analyzed By replacing the parallel resistor with the modified generalized memristor, a novel memristive Wien-bridge oscillator is constructed and its mathematical model is established, from which the dynamical behaviors of symmetric chaotic and periodic bursting oscillations are observed and the corresponding bifurcation mechanisms are explained Based on a hardware realization circuit, experimental observations are performed, which verify the numerical simulations

Lag Synchronization of Memristor-Based Coupled Neural Networks via $\omega $ -Measure

Abstract: This paper deals with the lag synchronization problem of memristor-based coupled neural networks with or without parameter mismatch using two different algorithms. Firstly, we consider the memristor-based neural networks with parameter mismatch, lag complete synchronization cannot be achieved due to parameter mismatch, the concept of lag quasi-synchronization is introduced. Based on the $\omega $ -measure method and generalized Halanay inequality, the error level is estimated, a new lag quasi-synchronization scheme is proposed to ensure that coupled memristor-based neural networks are in a state of lag synchronization with an error level. Secondly, by constructing Lyapunov functional and applying common Halanary inequality, several lag complete synchronization criteria for the memristor-based neural networks with parameter match are given, which are easy to verify. Finally, two examples are given to illustrate the effectiveness of the proposed lag quasi-synchronization or lag complete synchronization criteria, which well support theoretical results.

Memristor Circuits: Flux—Charge Analysis Method

Abstract: Memristor-based circuits are widely exploited to realize analog and/or digital systems for a broad scope of applications (e.g., amplifiers, filters, oscillators, logic gates, and memristor as synapses). A systematic methodology is necessary to understand complex nonlinear phenomena emerging in memristor circuits. The manuscript introduces a comprehensive analysis method of memristor circuits in the flux-charge $(\varphi,q)$ -domain. The proposed method relies on Kirchhoff Flux and Charge Laws and constitutive relations of circuit elements in terms of incremental flux and charge. The main advantages (over the approaches in the voltage-current $(v,i)$ -domain) of the formulation of circuit equations in the $(\varphi,q)$ -domain are: a) a simplified analysis of nonlinear dynamics and bifurcations by means of a smaller set of ODEs; b) a clear understanding of the influence of initial conditions. The straightforward application of the proposed method provides a full portrait of the nonlinear dynamics of the simplest memristor circuit made of one memristor connected to a capacitor. In addition, the concept of invariant manifolds permits to clarify how initial conditions give rise to bifurcations without parameters.

A novel memristive time–delay chaotic system without equilibrium points

Abstract: Memristor and time–delay are potential candidates for constructing new systems with complex dynamics and special features. A novel time–delay system with a presence of memristive device is proposed in this work. It is worth noting that this memristive time–delay system can generate chaotic attractors although it possesses no equilibrium points. In addition, a circuitry implementation of such time–delay system has been introduced to show its feasibility.

Voltage divider effect for the improvement of variability and endurance of TaO(x) memristor.

Abstract: The impact of a series resistor (R(S)) on the variability and endurance performance of memristor was studied in the TaO(x) memristive system. A dynamic voltage divider between the R(S) and memristor during both the set and the reset switching cycles can suppress the inherent irregularity of the voltage dropped on the memristor, resulting in a greatly reduced switching variability. By selecting the proper resistance value of R(S) for the set and reset cycles respectively, we observed a dramatically improved endurance of the TaO(x) memristor. Such a voltage divider effect can thus be critical for the memristor applications that require low variability, high endurance and fast speed.

Generating hyperchaotic multi-wing attractor in a 4D memristive circuit

Abstract: It is very important to generate hyperchaotic attractor with more complicated dynamics for theoretical research and practical application. The paper proposes a novel method to generate hyperchaotic multi-wing attractor. By replacing the resistor in the circuit of modified Lu system with flux-controlled memristor respectively, this new memristive system can exhibit a hyperchaotic multi-wing attractor, and the values of two positive Lyapunov exponents are relatively large. The dynamical behaviors of the proposed system are analyzed by phase portrait, Lyapunov exponents, Poincare maps, and bifurcation diagram. Moreover, the influences of memristor’s strength and position of replaced resistor are analyzed. To further probe the inherent features of the new memristive hyperchaotic system, the circuit implementation is carried out. The proposed method can be easily extended to the generalized Lorenz system family.

Emulating the Electrical Activity of the Neuron Using a Silicon Oxide RRAM Cell.

Abstract: In recent years, formidable effort has been devoted to exploring the potential of Resistive RAM (RRAM) devices to model key features of biological synapses. This is done to strengthen the link between neuro-computing architectures and neuroscience, bearing in mind the extremely low power consumption and immense parallelism of biological systems. Here we demonstrate the feasibility of using the RRAM cell to go further and to model aspects of the electrical activity of the neuron. We focus on the specific operational procedures required for the generation of controlled voltage transients, which resemble spike-like responses. Further, we demonstrate that RRAM devices are capable of integrating input current pulses over time to produce thresholded voltage transients. We show that the frequency of the output transients can be controlled by the input signal, and we relate recent models of the redox-based nanoionic resistive memory cell to two common neuronal models, the Hodgkin-Huxley (HH) conductance model and the leaky integrate-and-fire model. We employ a simplified circuit model to phenomenologically describe voltage transient generation.

High-performance perovskite memristor based on methyl ammonium lead halides

Abstract: Memristors are devices that can store and process information based on their switchable internal resistance. Although these devices offer better performance than the conventional technology, the use of materials such as complex metal oxides usually requires high-temperature annealing processing or vacuum processing such as sputtering, which complicates the fabrication of the devices and hinders their development for practical use. Here we show a high-performance memristor based on organometal trihalides and electrochemical active metals, which achieved an on–off current ratio of 1.9 × 109. The devices can be solution-processed at low temperature and in air, which may be further developed into printable electronics. We explored the influence of different metal electrodes and device structures on memristor performance and the results indicated the great potential of methyl ammonium lead halide perovskite for information storage and computing. Our work provides new application prospects for these materials and may also contribute to the better understanding of other perovskite-based optoelectronic devices.